UCSB Nanofab Wiki - User contributions [en]

Lift-off DUV Lift-off: LOR Underlayers

2026-09-23T22:43:28Z

John d: /* LOR10A - ~1µm underlayer */ link to LOR10A datasheet

=== LOR10A - ~1µm underlayer ===
{| class="wikitable"
|Dehydration bake
|≥150°C
|5 min
|-
|Spin LOR10A
|Recipe 5: 3000 rpm
|[[Media:Lor pds.pdf|See datasheet for spin curves]]
|-
|Backside clean
|Spin/spray: Remover PG / Acetone / IPA
|required for ASML DUV
|-
|Softbake
|200°C on lift-pins.
Use recipe: "''STD 200C 5min''"
|5 min
|-
|Spin LOR10A
|Recipe 5: 3000 rpm
|
|-
|Backside clean
|Spin/spray: Remover PG / Acetone / IPA
|
|-
|Softbake
|200 C on pins. Use recipe 200 C 5 min.
|5 min
|-
|Spin UV6-0.8
|Recipe 6 3500 rpm
|
|-
|Softbake
|135C
|1 min
|-
|Backside clean
|Spin/spray Acetone/IPA
|
|-
|Expose
|~21-25mJ - you may need to optimize
Focus = +0.2
|ASML
|-
|Post exposure bake
|135C
|90 sec
|-
|Develop AZ726MIF
|no agitation
|usually > 2.5min
|-
|Microscope Inspect
|Check undercut
|Typ. ~1-2µm
|}
<code>''Contributed by Alex Spott.''</code>

=== LOR30C - ~30µm underlayer ===

# Dehydrate (O2 plasma or 150°C, 2 min+), no adhesion promoter
# Spin LOR30C at various speeds depending on thickness desired
## [[Media:Lor pds.pdf|See datasheet for spin-curves]].
# 180°C, 4 min
# Spin/bake imaging layer - according to Imaging PR recipe
# Expose ASML
# Post-bake imaging layer - according to Imaging PR recipe
# Develop AZ 300MiF - varies:
## Develop times range between 2 min to as long as 6 or 8 minutes (it's consistent for the same mask and same materials, but varies for process steps, topography, and materials).
# Strips in 80C NMP 20–30 min

'''Pros''': Thick in a single layer, excellent coverage for tall features, varying topography, and filling vias. Rarely has cracking issues, no ramp baking required, typically minimal bubbles from feature corners.

'''Cons''': High and uncontrollable undercut. You can't switch to flood expose / 101A like you can with PMGI so you're stuck with the undercut you get whenever it's done developing. Not suitable for close features.

<code>''Contributed by Alex Spott.''</code>

Lift-off DUV Lift-off: LOR Underlayers

2026-09-23T22:39:20Z

John d: added LOR 10A recipe from alex spott

=== LOR10A - ~1µm underlayer ===
{| class="wikitable"
|Dehydration bake
|≥150°C
|5 min
|-
|Spin LOR10A
|Recipe 5: 3000 rpm
|
|-
|Backside clean
|Spin/spray: Remover PG / Acetone / IPA
|required for ASML DUV
|-
|Softbake
|200°C on lift-pins.
Use recipe: "''STD 200C 5min''"
|5 min
|-
|Spin LOR10A
|Recipe 5: 3000 rpm
|
|-
|Backside clean
|Spin/spray: Remover PG / Acetone / IPA
|
|-
|Softbake
|200 C on pins. Use recipe 200 C 5 min.
|5 min
|-
|Spin UV6-0.8
|Recipe 6 3500 rpm
|
|-
|Softbake
|135C
|1 min
|-
|Backside clean
|Spin/spray Acetone/IPA
|
|-
|Expose
|~21-25mJ - you may need to optimize
Focus = +0.2
|ASML
|-
|Post exposure bake
|135C
|90 sec
|-
|Develop AZ726MIF
|no agitation
|usually > 2.5min
|-
|Microscope Inspect
|Check undercut
|Typ. ~1-2µm
|}

=== LOR30C - ~30µm underlayer ===

# Dehydrate (O2 plasma or 150°C, 2 min+), no adhesion promoter
# Spin LOR30C at various speeds depending on thickness desired
## [[Media:Lor pds.pdf|See datasheet for spin-curves]].
# 180°C, 4 min
# Spin/bake imaging layer - according to Imaging PR recipe
# Expose ASML
# Post-bake imaging layer - according to Imaging PR recipe
# Develop AZ 300MiF - varies:
## Develop times range between 2 min to as long as 6 or 8 minutes (it's consistent for the same mask and same materials, but varies for process steps, topography, and materials).
# Strips in 80C NMP 20–30 min

'''Pros''': Thick in a single layer, excellent coverage for tall features, varying topography, and filling vias. Rarely has cracking issues, no ramp baking required, typically minimal bubbles from feature corners.

'''Cons''': High and uncontrollable undercut. You can't switch to flood expose / 101A like you can with PMGI so you're stuck with the undercut you get whenever it's done developing. Not suitable for close features.

<code>Contributed by Alex Spott.</code>

Lithography Recipes

2026-09-23T22:35:06Z

John d: /* Lift-Off Recipes */ link to LOR lift-off

__NOTOC__
{| class="wikitable"
|+
!Table of Contents
|-
|
==='''<big>Photolithography Processes</big>'''===

#'''UV Optical Lithography'''
#*[[#PositivePR |'''Stocked Lithography Chemical + Datasheets''']]
#**''Lists all stocked photolith. chemicals, PRs, strippers, developers, and links to the chemical's application notes/datasheet, which detail the spin curves and nominal processes.''
#*[[#Photolithography_Recipes |'''Photo Lithography Recipe section''']]
#**''Starting recipes (spin, bake, exposure, develop etc.) for all photolith. tools.''
#**''Substrate/surface materials/pattern size can affect process parameters. Users may need to run Focus/Exposure Arrays/Matrix (FEA's/FEM's) with these processes to achieve high-resolution.''
#**[[Contact Alignment Recipes|Contact Aligner Recipes]]
#***[[Contact Alignment Recipes#Suss Aligners .28SUSS MJB-3.29|Suss MJB Aligners]]
#***[[Contact Alignment Recipes#Contact Aligner .28SUSS MA-6.29|Suss MA6]]
#**[[Stepper Recipes|Stepper Recipes]]
#***[[Stepper Recipes#Stepper 1 .28GCA 6300.29|Stepper #1: GCA 6300]] (I-Line)
#***[[Stepper Recipes#Stepper 2 .28AutoStep 200.29|Stepper #2: GCA Autostep 200]] (I-Line)
#***[[Stepper Recipes#Stepper 3 .28ASML DUV.29|Stepper #3: ASML PAS 5500/300]] (DUV)
#**[[Direct-Write Lithography Recipes|Direct-Write Recipes]]
#***[[Direct-Write Lithography Recipes#Maskless Aligner .28Heidelberg MLA150.29|Heidelberg MLA150 (I-Line)]]
#***[[Direct-Write Lithography Recipes#E-Beam Lithography Recipes (Raith EBPG 5150+)|Raith EBPG 5150+ (Electron-Beam)]]
#***[[Lithography Recipes#FIB Lithography Recipes .28Raith Velion.29|Raith Velion FIB (Ion Beam)]]
#**[[Lithography Recipes#Automated Coat.2FDevelop System Recipes .28S-Cubed Flexi.29|Automated Coater Recipes (S-Cubed Flexi)]]
#[[Lithography Recipes#General Photolithography Techniques|'''General Photolithography Techniques''']]
#*''Techniques for improving litho. or solving common photolith. problems.''
#*[[Photolithography - Improving Adhesion Photoresist Adhesion|HMDS Process for Improving Adhesion]]
#*[[Photolithography - Manual Edge-Bead Removal Techniques|Edge-Bead Removal Techniques]]
#*[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf Photoresist reflow (MicroChem)]
#*[[Lithography Calibration - Analyzing a Focus-Exposure Matrix]]
#'''[[Lithography Recipes#Lift-Off Recipes|Lift-Off Recipes]]'''
#*''Verified Recipes for lift-off using various photolith. tools''
#*''General educational description of this technique and it's limitations/considerations.''
#'''E-beam Lithography'''
#*[[#E-Beam_Lithography_Recipes |E-Beam Lithography Recipes]]
#**''Has links to starting recipes. Substrates and patterns play a large role in process parameters.''
#*[[#EBLPR |EBL Photoresist Datasheets]]
#**''Provided for reference, also showing starting recipes and usage info.''
#'''[[Lithography Recipes#Holography Recipes|Holography]]'''
#*''For 1-D and 2-D gratings with 220nm nominal period, available on substrates up to 1 inch square.''
#*''Recipes for silicon substrates are provided, and have been translated to other substrates by users.''
#*''Datasheets are provided with starting recipes and usage info.''
#'''[[Lithography Recipes#Edge-Bead Removal Techniques|Edge-Bead Removal]]'''
#*''Edge photoresist removal methods needed for clamp-based etchers''
#*''Improves resolution for contact lithography''
|-
|

==='''<big>Photolithography Chemicals/Materials</big>'''===

#'''[[#Underlayers |Underlayers]]'''
#*''These are used beneath resists for both adhesive purposes and to enable bi-layer lift-off profiles for use with photoresist.''
#*''Datasheets are provided.''
#'''[[#AntiReflectionCoatings |Anti-Reflection Coatings]]''':
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Bottom Anti-Reflection Coatings (BARC) are used in the stepper systems, underneath the resists to eliminate substrate reflections that can affect resolution and repeatability for small, near resolution limited, feature sizes.''
#*''Datasheets are provided for reference on use of the materials.''
#'''[[#ContrastEnhancement |Contrast Enhancement Materials (CEM)]]'''
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Used for resolution enhancement. Not for use in contact aligners, typically used on I-Line Steppers.''
#*''Datasheets provided with usage info.''
#'''[[#AdhesionPromoters |Adhesion Promoters]]'''
#*''These are used to improve wetting of photoresists to your substrate.''
#*''Datasheets are provided on use of these materials.''
#'''[[#SpinOnDielectrics |Low-K Spin-on Dielectrics]]'''
#*[[Lithography Recipes#SpinOnDielectrics|Spin-On Dielectrics]]
#**''Datasheets for BCB, Photo-BCB, and SOG (spin-on-glass) for reference on use.''
#*[[#Low-K_Spin-On_Dielectric_Recipes |Low-K Spin-On Dielectric Recipes]]
#**''Recipes for usage of some spin-on dielectrics.''
#'''[[#Developers |Developers and Removers]]'''
#*''Datasheets provided for reference.''
#*''Remover and Photoresist Strippers are used to dissolve PR during lift-off or after etching.''
|}

==General Photolithography Techniques==

====[[Photolithography - Improving Adhesion Photoresist Adhesion|'''HMDS Process for Improving Adhesion''']]====

*''Use these procedures if you are finding poor adhesion PR lifting-off), or for chemicals (like BHF) that attack the PR adhesion interface strongly.''

====[[Photolithography - Manual Edge-Bead Removal Techniques|'''Edge-Bead Removal Techniques''']]====

*''These techniques are required for loading full-wafers into etchers that use top-side clamps, to prevent photoresist from sticking to the clamp (and potentially destroying your wafer).''
*''For contact lithography, this improves the proximity of the mask plate and sample, improving resolution. For some projection systems, such as the [[Maskless Aligner (Heidelberg MLA150)|Maskless Aligner]], EBR can help with autofocus issues.''
*''For small samples (<1cm) some techniques here to reduce edge-bead via shims.''

====[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf '''Photoresist reflow (MicroChem)''']====

*''To create slanted sidewalls or curved surfaces.''
[[Lithography Calibration - Analyzing a Focus-Exposure Matrix|'''Lithography Calibration - Analyzing a Focus-Exposure Matrix''']]

* ''On tools with autofocus (steppers & direct-write litho tools), you calibrate your litho by shooting a "Focus Exposure Matrix/Array", or "FEM/FEA", which exposes a grid with Dose varying in one axis, and Focus varying in the other.''
* ''Explains how to locate the'' ''"Process Window" for your lithography.''

==Photolithography Recipes==

==== Process Maturity Ranking ====

* <code>'''R6'''</code> - most mature process with regular calibrations recorded on SPC charts.
* …
* <code>'''R1'''</code> - least mature - "possible" but you'll have to figure it out.
* '''<code>A</code>''': Material is available for use, but no recipes are provided.

''The Key/Legend for this table's <code>R1...R6</code> values is at the [[Lithography Recipes#Process Ranking Table|bottom of the table]].''

''Click the tool title to go to recipes for that tool.''

''Click the photoresist title to get the datasheet, also found in [[Lithography Recipes#Chemicals Stocked .2B Datasheets|Stocked Chemicals + Datasheets]].''
{| class="wikitable" style="border: 1px solid #D0E7FF; background-color:#ffffff; text-align:center;" border="1"
|-
! colspan="8" height="45" |<div style="font-size: 150%;">Photolithography Recipes</div>

|-
| bgcolor="#EAECF0" |
! colspan="2" align="center" |'''[[Contact Alignment Recipes|<big>Contact Aligner Recipes</big>]]'''
! colspan="3" align="center" |'''[[Stepper Recipes|<big>Stepper Recipes</big>]]'''
! colspan="2" align="center" |[[Direct-Write Lithography Recipes|Direct-Write Litho. Recipes]]
|-
! width="150" bgcolor="#D0E7FF" align="center" |'''Positive Resists'''
{{LithRecipe Table}}
|Picomaster XF200 (Raith)
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[[:File:AXP4000pb-Datasheet.pdf|AZ4110]]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4210]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4330RS]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)|R1}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/a2/Az_p4620_photoresist_data_package.pdf AZ4620]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/8b/OCG825-Positive-Resist-Datasheet.pdf OCG 825-35CS]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-0.9]
|A
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R5}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-1.8]
|A
|A
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-3.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-7.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive_Resist_.28MLA150.29}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/be/3600_D%2C_D2v_Spin_Speed_Curve.pdf THMR-IP3600 HP D]
|
|
|A
|A
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)|R5}}
|
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/ff/UV210-Positive-Resist-Datasheet.pdf UV210-0.3]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/UV26-Positive-Resist-Datasheet.pdf UV26-2.5]
|
|
|
|
|A
|
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Negative Resists'''
{{LithRecipe Table}}
|Picomaster XF200 (Raith)
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/b0/AZ5214-Negative-Resist-Datasheet.pdf AZ5214-EIR]
|{{rl|Contact_Alignment_Recipes|Negative Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2020]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2035]
| bgcolor="#D0E7FF" |A
| {{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)|R1}}
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |
| bgcolor="EEFFFF" |A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2070]
|A
|A
|{{Rl|Stepper_Recipes|Negative_Resist_.28GCA_6300.29|R2}}
|A
|
|A
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/82/AZnLOF5510-Negative-Resist-Datasheet.pdf AZnLOF 5510]
|A
|A
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/c/c9/UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf UVN30-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Negative Resist (ASML DUV)|R6}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/7/78/SU-8-2015-revA.pdf SU-8 2005,2010,2015]
|A
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/2c/SU-8-2075-revA.pdf SU-8 2075]
|A
|A
|A
|A
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |NR9-[//wiki.nanotech.ucsb.edu/w/images/8/8f/NR9-1000PY-revA.pdf 1000],[//wiki.nanotech.ucsb.edu/w/images/7/71/NR9-3000PY-revA.pdf 3000],[//wiki.nanotech.ucsb.edu/w/images/f/f9/NR9-6000PY-revA.pdf 6000]PY
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|A
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Anti-Reflection Coatings'''
{{LithRecipe Table}}
|Picomaster XF200 (Raith)
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/33/XHRiC-Anti-Reflective-Coating.pdf XHRiC-11]
|
|
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/DUV42P-Anti-Reflective-Coating.pdf DUV42-P]
|
|
|
|
|{{rl|Stepper Recipes|DUV-42P-6|R3}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101-304]
|
|
|
|
|{{rl|Stepper Recipes|DS-K101-304|R3}}
|
|-
! bgcolor="#D0E7FF" align="center" |
{{LithRecipe Table}}
|Picomaster XF200 (Raith)
|}


==='''Process Ranking Table'''===
Processes in the table above are ranked by their "''Process Maturity Level''" as follows:
{| class="wikitable"
!Process Level
! colspan="11" |Description of Process Level Ranking
|-
|A
| colspan="11" |Process '''A'''llowed and materials available but never done
|-
|R1
| colspan="11" |Process has been ran at least once
|-
|R2
| colspan="11" |Process has been ran and procedure is documented
|-
|R3
| colspan="11" |Process has been ran, procedure is documented, and data is available
|-
|R4
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''no''' in-Situ control available
|-
|R5
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''and''' in-Situ control available
|-
|R6
| colspan="11" |Process has a documented procedure and control charts/limits available. Controlled process.
|}
==Lift-Off Recipes==

*{{fl|Liftoff-Techniques.pdf|Lift-Off Description/Tutorial}}
**How it works, process limits and considerations for designing your process
*[[Lift-Off with I-Line Imaging Resist + LOL2000 Underlayer|I-Line Lift-Off: Bi-Layer Process with LOL2000 Underlayer]]
**''Single Expose/Develop process for simplicity''
**''Up to ~130nm metal thickness & ≥500nm-1000nm gap between metal.''
**''Can use any I-Line litho tool (GCA Stepper, Contact aligner, MLA)''
*{{fl|Bi-LayerContactprocesswithPMGI.pdf|I-Line Lift-Off: Bi-Layer Process with PMGI Underlayer and Contact Aligner}}
**''Multiple processes for Metal thicknesses ~800nm to ~2.5µm''
**''Uses multiple [[DUV Flood Expose|DUV Flood exposure]]/develop cycles to create undercut.''
**''Can be transferred to other I-Line litho tools (Stepper, MLA etc.)''
**Updates to the process:
***You now only need to do 5min [[DUV Flood Expose|DUV Flood exposure]] each cycle (lamp optics were replaced)
***Use the new "101B" developer, which replaced the "SAL/101A" developers but works the same.
**There are 2 [[DUV Flood Expose|DUV Flood exposure]] + 101B develop steps because the first exposure doesn't expose the entire PMGI - because PMGI absorbs DUV very strongly so the light doesn't penetrate to the bottom of thick PMGI on the first exposure.
*[[Lift-off DUV Lift-off: LOR Underlayers|DUV Lift-off: LOR Underlayers]]
**1µm (LOR-10A) & 30µm (LOR-30C) versions
**Written for ASML DUV Stepper, but should work for any Imaging (top) resist, incl. I-Line tools.
*[[Lift-Off with DUV Imaging + PMGI Underlayer|DUV Lift-Off: UV6 Imaging Resist + PMGI Underlayer]]
**''Single-expose/develop process''
**''Up to ~65nm metal thickness & ~350nm gap between metal''
**''Use thicker PMGI for thicker metals''

==[[E-Beam Lithography System (JEOL JBX-6300FS)|E-Beam Lithography Recipes (JEOL JBX-6300FS)]]==

*Under Development.

==[[Focused Ion-Beam Lithography (Raith Velion)|FIB Lithography Recipes (Raith Velion)]]==
''To Be Added''

==[[Automated Coat/Develop System (S-Cubed Flexi)|Automated Coat/Develop System Recipes (S-Cubed Flexi)]]==
Recipes pre-loaded on the S-Cubed Flexi automated coat/bake/develop system. Only staff may write new recipes, contact the tool supervisor for more info.

===Available Variations===

*We have different recipes with varyious UV6 spin speeds - the same spin speed optionss as found on our manual Headway spinners. This allows for PR thickness control. See the linked UV6 datasheets below for thickness vs. rpm spin curves. '''Note''' that exact spin RPM may be slightly different between Headway spinners (on benches) vs. S-Cubed.
*DSK is recommended to be spun at 1.5krpm (~40nm) for best anti-reflection properties. 5krpm (~20nm) recipes are also provided for historical/legacy processes.
*DSK can be baked at either 220C to act as a Dry-etchable BARC (similar to DUV-42P), or at lower temps as a developable BARC (no dry etch required).
*"Chain" recipes (with DSK+UV6 spin/cured in succession) are only available for DSK Baked at 185C & 220C, and all UV6 Spin-speed variations. For the other DSK temps you can use the single-PR "Routes".
*Developer recipes are now available for 300 MiF Developer. '''Note''' that developer is flowing continuously during the develop, so develop times are shorter by ~50% compared to beaker developing.
**'''DO NOT EDIT developer recipes''', they can damage the tool when programmed incorrectly!
*"Chain" recipes for 135*C Post-exposure Bake + Develop have been made.
*ASML cassettes can be placed directly on this tool for spin / exposure / develop process. Please make sure all cassettes are kept back at their respecting tools when done.

===Recipes Table (S-Cubed Flexi)===
{| class="wikitable"
|+''Ask [[Tony Bosch|Staff]] if you need a new recipe.''
|'''''Coating Material'''''
|'''''Route/Chain'''''
|'''''Name''': (User: "UCSB Users")''
|'''''Spin Speed (krpm)'''''
|'''''Bake Temp'''''
|'''''Notes'''''
|-
! colspan="6" |
|-
! colspan="6" |BEFORE LITHOGRAPHY (PR Coat and Bake)
|-
! colspan="6" |
|-
|'''''Hotplate Set'''''
|Route
| colspan="4" |To pre-set the DSK Hotplate temp (HP4).
Note: Only HP4 can be changed.

HP1-HP3 remains fixed at: HP1=135°C, HP2=170°C & HP3=170°C
|-
|
|
|HP4-SET-'''220C'''
|
|220°C
|Will over shoot +-2°C when done.
|-
|
|
|HP4-SET-'''210C'''
|
|210°C
|
|-
|
|
|HP4-SET-'''200C'''
|
|200°C
|
|-
|
|
|HP4-SET-'''185C'''
|
|185°C
|
|-
| colspan="6" |'''''Bottom Anti-Reflection Coating (BARC), DSK101 only:'''''
|-
|'''''[https://wiki.nanotech.ucsb.edu/wiki/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101]'''''
|Route
| colspan="4" |''DSK101 Develop Rate depends on Bake temp - you can use this to control undercut.'' ''See: [[DS-K101-304 Bake Temp. versus Develop Rate|DSK Bake vs. Dev rate]]''
DSK101 spun at 1.5K is equivalent to DUV-42P. See: [[Stepper Recipes#Anti-Reflective Coatings]]

'''185°C bake''' allows the DSK to dissolve during develop, and allows for undercut (may lift-off small features)

'''220°C bake''' allows DSK to be used as dry-etchable BARC (equiv. to DUV42P), requiring O2 etch to remove. Better for small features. See [[Stepper Recipes#Anti-Reflective Coatings|here for relevant processing info from DUV42P]].

'''Note: All PR coat recipes have EBR backside clean steps included in the recipe.'''
|-
|''1.5krpm recipes''
|
|COAT-DSK101-304[1.5K]-'''185C'''
|1.5krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[1.5K]-'''200C'''
|1.5krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''210C'''
|1.5krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''220C'''
|1.5krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |
|-
|''5krpm recipes''
|
|COAT-DSK101-304[5K]-'''185C'''
|5.0krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[5K]-'''200C'''
|5.0krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[5K]-'''210C'''
|5.0krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[5K]-'''220C'''
|5.0krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |'''''Imaging resist (UV6) only:'''''
|-
|'''''[https://wiki.nanofab.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]'''''
|Route
|COAT-UV6['''2K''']-135C
|2.0krpm
|135°C
|Requires: HP1=135°C
|-
|''varying spin speed''
|
|COAT-UV6['''2.5K''']-135C
|2.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3K''']-135C
|3.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3.5K''']-135C
|3.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''4K''']-135C
|4.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''5K''']-135C
|5.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''6K''']-135C
|6.0krpm
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |'''''UV6 Coat with Developable BARC underlayer:'''''
|-
|'''''DS-K101 @ 185°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-185C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 185°C
UV6: 135°C
|Requires:
– HP4=185°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-185C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-185C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |'''''UV6 Coat with Dry-Etchable BARC underlayer:'''''
|-
|'''''DS-K101 @ 220°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-220C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 220°C
UV6: 135°C
|Requires:
– HP4=220°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-220C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-220C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
! colspan="6" |
|-
! colspan="6" |AFTER LITHOGRAPHY (PEB and Developing)
|-
! colspan="6" |
|-
|'''''PEB Wafer Bake'''''
|Route
| colspan="4" |To bake wafer with UV6 after exposure (PEB) for 90sec and cool for 15sec
|-
|
|
|BAKE-135C-90S
|
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |
|-
|'''''PEB and Developing'''''
|Route
| colspan="4" |To post-exposure bake wafer after exposure (std. PEB for UV6) 90sec, cool 15sec, develop using AZ300MIF and water rinse 60sec

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
| colspan="6" |
|-
|'''Developing'''
|Route
| colspan="4" |To only develop wafer using AZ300MIF and water rinse 60sec (No PEB)

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
|
|
|
|
|
|
|}
==[[Holographic Lith/PL Setup (Custom)|Holography Recipes]]==
''The Holography recipes here use the BARC layer XHRiC-11 & the high-res. I-Line photoresist THMR-IP3600HP-D.''

*{{fl|Holography_Process_for_1D-lines_and_2D-dots_%28ARC-11_%26_THMR-IP3600HP-D%29-updated-4-8-2021.pdf|Standard Holography Process - on SiO2 on Si}}
*{{fl|Holography-Process-Variation-revA.pdf|Holography Process Variations - Set-up Angle - Etching into SiO2 and Si}}
*{{fl|05-SiO2_Nano-structure_Etch.pdf|Etch SiO2 Nano-structure - Changing Side-wall Angle - Etching into Si with a different line-width}}
*{{fl|30-Redicing_Nanowire_Diameter_by_Thermal_Oxidation_and_Vapored_HF_Etch.pdf|Reduce SiO2 Nanowire Diameter - Thermal Oxidation - Vapor HF Etching}}

==Low-K Spin-On Dielectric Recipes==

*{{fl|Lithography-BCB-photo-lowk-dielectric-spinon-4024-40-revA.docx|Photo BCB (4024-40)}}
*{{fl|BCB-cyclotene-3000-revA.pdf|Standard BCB (3022-46)}}
*{{fl|512B-Application-Data-Bake-revA.pdf|SOG (T512B)}}

==Chemicals Stocked + Datasheets==
''The following is a list of the lithography chemicals we stock in the lab, with links to the datasheets for each. The datasheets will often have important processing info such as spin-speed vs. thickness curves, typical process parameters, bake temps/times etc.''

Item numbers in (parentheses) indicate the specific stocked formulation, when the datasheet shows multiple formulations.
{|
|- valign="top"
| width="400" |
;<div id="PositivePR"><big>Positive Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AXP4000pb-Datasheet.pdf|AZP4000 (AZ4110, AZ4210, AZ4330)}}
*{{Fl|Az_p4620_photoresist_data_package.pdf|AZ P4620}}
*{{fl|OCG825-Positive-Resist-Datasheet.pdf|OCG825}}
*{{fl|SPR220-Positive-Resist-Datasheet.pdf|SPR220 (SPR220-3, SPR220-7)}}
*{{fl|SPR955-Positive-Resist-Datasheet.pdf|SPR955CM (SPR955CM-0.9, SPR955CM-1.8)}}
*THMR-3600HP (Thin I-Line & Holography)
**{{fl|THMR_iP_3500_iP3600.pdf|Evaluation Results: THMR-3600HP}}
**{{fl|3600_D,_D2v_Spin_Speed_Curve.pdf|Spin Curves for THMR-3600HP}}
**{{fl|THMR-iP3600_HP_D_20140801_(B)_GHS_US.pdf|Safety Datasheet for THMR-3600HP}}

'''''DUV-248nm'''''

*{{fl|UV210-Positive-Resist-Datasheet.pdf|UV210-0.3}}
*{{fl|UV6-Positive-Resist-Datasheet.pdf|UV6-0.8}}
*{{fl|UV26-Positive-Resist-Datasheet.pdf|UV26-2.5}}

;<div id="NegativePR"><big>Negative Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AZ5214-Negative-Resist-Datasheet.pdf|AZ5214}}
*{{fl|AZnLOF5510-Negative-Resist-Datasheet.pdf|AZnLOF5510}}
*{{fl|AZnLOF2020-Negative-Resist-Datasheet.pdf|AZnLOF2000 (AZnLOF2020, AZnLOF2035, AZnLOF2070)}}
*{{fl|NR9-1000PY-revA.pdf|Futurrex NR9-1000PY(use AZ300MIF dev)}}
*{{fl|NR9-3000PY-revA.pdf|Futurrex NR9-3000PY(use AZ300MIF dev)}}
*{{fl|NR9-6000PY-revA.pdf|Futurrex NR9-6000PY(use AZ300MIF dev)}}
*{{fl|SU-8-2015-revA.pdf|SU-8-2005,2010, 2015}}
*{{fl|SU-8-2075-revA.pdf|SU-8-2075}}

'''''DUV-248nm'''''

*{{fl|UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf|UVN-30-0.8}}

;<div id="Underlayers"><big>Underlayers</big></div>
See [[Lithography Recipes#Lift-Off Recipes|this page for lift-off recipes.]]
*{{fl|PMGI-Underlayer-Datasheet.pdf|PMGI (PMGI SF3,5,8,11,15)}}
*LOR ([[Media:Lor pds.pdf|LOR 10A & LOR 30C]])
*{{fl|LOL2000-Underlayer-Datasheet.pdf|Shipley LOL2000}}

;<div id="EBLPR"><big>E-beam resists</big></div>

*{{fl|PMMA-E-Beam-Resist-Datasheet.pdf|PMMA (PMMA, P(MMA-MAA) copolymer)}}
*{{fl|maN2403-E-Beam-Resist-Datasheet.pdf|maN 2403}}

;<div id="NanoImprinting"><big>Nanoimprinting</big></div>

*{{fl|NX1020-Nanoimprinting-Datasheet.pdf|NX1020}}
*{{fl|MRI-7020-Nanoimprinting-Datasheet.pdf|MRI-7020}}
*{{fl|Mr-UVCur21.pdf|MR-UVCur21}}
*{{fl|OrmoStamp-NIL-Lithography-UV-Soft-RevA.pdf|Ormostamp}}

|
;<div id="ContrastEnhancement"><big>Contrast Enhancement Materials</big></div>

*{{fl|CEM365iS-Contrast-Enhancement-Datasheet.pdf|CEM365iS}}

;<div id="AntiReflectionCoatings"><big>Anti-Reflection Coatings</big></div>

*{{fl|XHRiC-Anti-Reflective-Coating.pdf|XHRiC-11 (i-line)}}
*{{fl|DUV42P-Anti-Reflective-Coating.pdf|DUV42P-6 (DUV) (For AR2 replacement)}}
*{{fl|DS-K101-304-Anti-Reflective-Coating.pdf|DS-K101-304 (DUV developable BARC)}}

;<div id="AdhesionPromoters"><big>Adhesion Promoters</big></div>

*HMDS
*AP3000 BCB Adhesion Promoter
*{{fl|OMNICOAT-revA.pdf|Omnicoat, SU-8 Adhesion Promoter}}
*{{fl|OrmoPrime-NIL-Adhesion-RevA.pdf|Ormoprime08-Ormostsmp Adhesion Promoter}}

;<div id="SpinOnDielectrics"><big>Spin-On Dielectrics</big></div>

''Low-K Spin-On Dielectrics such as Benzocyclobutane and Spin-on Glass''

*{{fl|BCB-cyclotene-3000-revA.pdf|BCB, Cyclotene 3022-46(Not Photosensitive)}}
*{{fl|BCB-cyclotene-4000-revA.pdf|PhotoBCB, Cyclotene 4024-40(Negative Polarity)}}
*{{fl|BCB-adhesion.pdf|BCB Adhesion Notes from Vendor}}
*{{fl|BCB-rework.pdf|BCB rework Notes from Vendor}}

;<div id="Developers"><big>Developers</big></div>

*{{fl|AZ400K-Developer-Datasheet.pdf|AZ400K (AZ400K, AZ400K1:4)}}
*{{fl|AZ300MIF-Developer-Datasheet.pdf|AZ300MIF}}
*DS2100 BCB Developer
*SU-8 Developer
*101A Developer (for DUV Flood Exposed PMGI)

;<div id="PRRemovers"><big>Photoresist Removers</big></div>

*[http://www.microchemicals.com/products/remover_stripper/nmp.html AZ NMP]
**''This replaces {{fl|1165-Resist-Remover.pdf|1165}}''
*{{fl|AZ300T-Resist-Remover.pdf|AZ300T}}
*{{fl|RemoverPG-revA.pdf|Remover PG, SU-8 stripper}}
*AZ EBR ("Edge Bead Remover", PGMEA)

|}

[[Category: Processing]]
[[category: Lithography]]
[[category: Recipes]]

Lift-off DUV Lift-off: UV6 imaging resist + LOR Underlayers

2026-09-23T22:32:25Z

John d: John d moved page Lift-off DUV Lift-off: UV6 imaging resist + LOR Underlayers to Lift-off DUV Lift-off: LOR Underlayers: need more generic process title

#REDIRECT [[Lift-off DUV Lift-off: LOR Underlayers]]

Lift-off DUV Lift-off: LOR Underlayers

2026-09-23T22:32:25Z

John d: John d moved page Lift-off DUV Lift-off: UV6 imaging resist + LOR Underlayers to Lift-off DUV Lift-off: LOR Underlayers: need more generic process title

=== LOR30C ===

# Dehydrate (O2 plasma or 150°C, 2 min+), no adhesion promoter
# Spin LOR30C at various speeds depending on thickness desired
## [[Media:Lor pds.pdf|See datasheet for spin-curves]].
# 180°C, 4 min
# Spin/bake imaging layer - according to Imaging PR recipe
# Expose ASML
# Post-bake imaging layer - according to Imaging PR recipe
# Develop AZ 300MiF - varies:
## Develop times range between 2 min to as long as 6 or 8 minutes (it's consistent for the same mask and same materials, but varies for process steps, topography, and materials).
# Strips in 80C NMP 20–30 min

'''Pros''': Thick in a single layer, excellent coverage for tall features, varying topography, and filling vias. Rarely has cracking issues, no ramp baking required, typically minimal bubbles from feature corners.

'''Cons''': High and uncontrollable undercut. You can't switch to flood expose / 101A like you can with PMGI so you're stuck with the undercut you get whenever it's done developing. Not suitable for close features.

<code>Contributed by Alex Spott.</code>

Lift-off DUV Lift-off: LOR Underlayers

2026-09-23T22:31:46Z

John d: alex spott's recipe

Lithography Recipes

2026-09-23T22:30:54Z

John d: /* Photolithography Recipes */ added col for Picomaster - looks bad, need to fix,

__NOTOC__
{| class="wikitable"
|+
!Table of Contents
|-
|
==='''<big>Photolithography Processes</big>'''===

#'''UV Optical Lithography'''
#*[[#PositivePR |'''Stocked Lithography Chemical + Datasheets''']]
#**''Lists all stocked photolith. chemicals, PRs, strippers, developers, and links to the chemical's application notes/datasheet, which detail the spin curves and nominal processes.''
#*[[#Photolithography_Recipes |'''Photo Lithography Recipe section''']]
#**''Starting recipes (spin, bake, exposure, develop etc.) for all photolith. tools.''
#**''Substrate/surface materials/pattern size can affect process parameters. Users may need to run Focus/Exposure Arrays/Matrix (FEA's/FEM's) with these processes to achieve high-resolution.''
#**[[Contact Alignment Recipes|Contact Aligner Recipes]]
#***[[Contact Alignment Recipes#Suss Aligners .28SUSS MJB-3.29|Suss MJB Aligners]]
#***[[Contact Alignment Recipes#Contact Aligner .28SUSS MA-6.29|Suss MA6]]
#**[[Stepper Recipes|Stepper Recipes]]
#***[[Stepper Recipes#Stepper 1 .28GCA 6300.29|Stepper #1: GCA 6300]] (I-Line)
#***[[Stepper Recipes#Stepper 2 .28AutoStep 200.29|Stepper #2: GCA Autostep 200]] (I-Line)
#***[[Stepper Recipes#Stepper 3 .28ASML DUV.29|Stepper #3: ASML PAS 5500/300]] (DUV)
#**[[Direct-Write Lithography Recipes|Direct-Write Recipes]]
#***[[Direct-Write Lithography Recipes#Maskless Aligner .28Heidelberg MLA150.29|Heidelberg MLA150 (I-Line)]]
#***[[Direct-Write Lithography Recipes#E-Beam Lithography Recipes (Raith EBPG 5150+)|Raith EBPG 5150+ (Electron-Beam)]]
#***[[Lithography Recipes#FIB Lithography Recipes .28Raith Velion.29|Raith Velion FIB (Ion Beam)]]
#**[[Lithography Recipes#Automated Coat.2FDevelop System Recipes .28S-Cubed Flexi.29|Automated Coater Recipes (S-Cubed Flexi)]]
#[[Lithography Recipes#General Photolithography Techniques|'''General Photolithography Techniques''']]
#*''Techniques for improving litho. or solving common photolith. problems.''
#*[[Photolithography - Improving Adhesion Photoresist Adhesion|HMDS Process for Improving Adhesion]]
#*[[Photolithography - Manual Edge-Bead Removal Techniques|Edge-Bead Removal Techniques]]
#*[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf Photoresist reflow (MicroChem)]
#*[[Lithography Calibration - Analyzing a Focus-Exposure Matrix]]
#'''[[Lithography Recipes#Lift-Off Recipes|Lift-Off Recipes]]'''
#*''Verified Recipes for lift-off using various photolith. tools''
#*''General educational description of this technique and it's limitations/considerations.''
#'''E-beam Lithography'''
#*[[#E-Beam_Lithography_Recipes |E-Beam Lithography Recipes]]
#**''Has links to starting recipes. Substrates and patterns play a large role in process parameters.''
#*[[#EBLPR |EBL Photoresist Datasheets]]
#**''Provided for reference, also showing starting recipes and usage info.''
#'''[[Lithography Recipes#Holography Recipes|Holography]]'''
#*''For 1-D and 2-D gratings with 220nm nominal period, available on substrates up to 1 inch square.''
#*''Recipes for silicon substrates are provided, and have been translated to other substrates by users.''
#*''Datasheets are provided with starting recipes and usage info.''
#'''[[Lithography Recipes#Edge-Bead Removal Techniques|Edge-Bead Removal]]'''
#*''Edge photoresist removal methods needed for clamp-based etchers''
#*''Improves resolution for contact lithography''
|-
|

==='''<big>Photolithography Chemicals/Materials</big>'''===

#'''[[#Underlayers |Underlayers]]'''
#*''These are used beneath resists for both adhesive purposes and to enable bi-layer lift-off profiles for use with photoresist.''
#*''Datasheets are provided.''
#'''[[#AntiReflectionCoatings |Anti-Reflection Coatings]]''':
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Bottom Anti-Reflection Coatings (BARC) are used in the stepper systems, underneath the resists to eliminate substrate reflections that can affect resolution and repeatability for small, near resolution limited, feature sizes.''
#*''Datasheets are provided for reference on use of the materials.''
#'''[[#ContrastEnhancement |Contrast Enhancement Materials (CEM)]]'''
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Used for resolution enhancement. Not for use in contact aligners, typically used on I-Line Steppers.''
#*''Datasheets provided with usage info.''
#'''[[#AdhesionPromoters |Adhesion Promoters]]'''
#*''These are used to improve wetting of photoresists to your substrate.''
#*''Datasheets are provided on use of these materials.''
#'''[[#SpinOnDielectrics |Low-K Spin-on Dielectrics]]'''
#*[[Lithography Recipes#SpinOnDielectrics|Spin-On Dielectrics]]
#**''Datasheets for BCB, Photo-BCB, and SOG (spin-on-glass) for reference on use.''
#*[[#Low-K_Spin-On_Dielectric_Recipes |Low-K Spin-On Dielectric Recipes]]
#**''Recipes for usage of some spin-on dielectrics.''
#'''[[#Developers |Developers and Removers]]'''
#*''Datasheets provided for reference.''
#*''Remover and Photoresist Strippers are used to dissolve PR during lift-off or after etching.''
|}

==General Photolithography Techniques==

====[[Photolithography - Improving Adhesion Photoresist Adhesion|'''HMDS Process for Improving Adhesion''']]====

*''Use these procedures if you are finding poor adhesion PR lifting-off), or for chemicals (like BHF) that attack the PR adhesion interface strongly.''

====[[Photolithography - Manual Edge-Bead Removal Techniques|'''Edge-Bead Removal Techniques''']]====

*''These techniques are required for loading full-wafers into etchers that use top-side clamps, to prevent photoresist from sticking to the clamp (and potentially destroying your wafer).''
*''For contact lithography, this improves the proximity of the mask plate and sample, improving resolution. For some projection systems, such as the [[Maskless Aligner (Heidelberg MLA150)|Maskless Aligner]], EBR can help with autofocus issues.''
*''For small samples (<1cm) some techniques here to reduce edge-bead via shims.''

====[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf '''Photoresist reflow (MicroChem)''']====

*''To create slanted sidewalls or curved surfaces.''
[[Lithography Calibration - Analyzing a Focus-Exposure Matrix|'''Lithography Calibration - Analyzing a Focus-Exposure Matrix''']]

* ''On tools with autofocus (steppers & direct-write litho tools), you calibrate your litho by shooting a "Focus Exposure Matrix/Array", or "FEM/FEA", which exposes a grid with Dose varying in one axis, and Focus varying in the other.''
* ''Explains how to locate the'' ''"Process Window" for your lithography.''

==Photolithography Recipes==

==== Process Maturity Ranking ====

* <code>'''R6'''</code> - most mature process with regular calibrations recorded on SPC charts.
* …
* <code>'''R1'''</code> - least mature - "possible" but you'll have to figure it out.
* '''<code>A</code>''': Material is available for use, but no recipes are provided.

''The Key/Legend for this table's <code>R1...R6</code> values is at the [[Lithography Recipes#Process Ranking Table|bottom of the table]].''

''Click the tool title to go to recipes for that tool.''

''Click the photoresist title to get the datasheet, also found in [[Lithography Recipes#Chemicals Stocked .2B Datasheets|Stocked Chemicals + Datasheets]].''
{| class="wikitable" style="border: 1px solid #D0E7FF; background-color:#ffffff; text-align:center;" border="1"
|-
! colspan="8" height="45" |<div style="font-size: 150%;">Photolithography Recipes</div>

|-
| bgcolor="#EAECF0" |
! colspan="2" align="center" |'''[[Contact Alignment Recipes|<big>Contact Aligner Recipes</big>]]'''
! colspan="3" align="center" |'''[[Stepper Recipes|<big>Stepper Recipes</big>]]'''
! colspan="2" align="center" |[[Direct-Write Lithography Recipes|Direct-Write Litho. Recipes]]
|-
! width="150" bgcolor="#D0E7FF" align="center" |'''Positive Resists'''
{{LithRecipe Table}}
|Picomaster XF200 (Raith)
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[[:File:AXP4000pb-Datasheet.pdf|AZ4110]]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4210]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4330RS]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)|R1}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/a2/Az_p4620_photoresist_data_package.pdf AZ4620]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/8b/OCG825-Positive-Resist-Datasheet.pdf OCG 825-35CS]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-0.9]
|A
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R5}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-1.8]
|A
|A
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-3.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-7.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive_Resist_.28MLA150.29}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/be/3600_D%2C_D2v_Spin_Speed_Curve.pdf THMR-IP3600 HP D]
|
|
|A
|A
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)|R5}}
|
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/ff/UV210-Positive-Resist-Datasheet.pdf UV210-0.3]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/UV26-Positive-Resist-Datasheet.pdf UV26-2.5]
|
|
|
|
|A
|
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Negative Resists'''
{{LithRecipe Table}}
|Picomaster XF200 (Raith)
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/b0/AZ5214-Negative-Resist-Datasheet.pdf AZ5214-EIR]
|{{rl|Contact_Alignment_Recipes|Negative Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2020]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2035]
| bgcolor="#D0E7FF" |A
| {{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)|R1}}
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |
| bgcolor="EEFFFF" |A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2070]
|A
|A
|{{Rl|Stepper_Recipes|Negative_Resist_.28GCA_6300.29|R2}}
|A
|
|A
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/82/AZnLOF5510-Negative-Resist-Datasheet.pdf AZnLOF 5510]
|A
|A
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/c/c9/UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf UVN30-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Negative Resist (ASML DUV)|R6}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/7/78/SU-8-2015-revA.pdf SU-8 2005,2010,2015]
|A
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/2c/SU-8-2075-revA.pdf SU-8 2075]
|A
|A
|A
|A
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |NR9-[//wiki.nanotech.ucsb.edu/w/images/8/8f/NR9-1000PY-revA.pdf 1000],[//wiki.nanotech.ucsb.edu/w/images/7/71/NR9-3000PY-revA.pdf 3000],[//wiki.nanotech.ucsb.edu/w/images/f/f9/NR9-6000PY-revA.pdf 6000]PY
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|A
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Anti-Reflection Coatings'''
{{LithRecipe Table}}
|Picomaster XF200 (Raith)
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/33/XHRiC-Anti-Reflective-Coating.pdf XHRiC-11]
|
|
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/DUV42P-Anti-Reflective-Coating.pdf DUV42-P]
|
|
|
|
|{{rl|Stepper Recipes|DUV-42P-6|R3}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101-304]
|
|
|
|
|{{rl|Stepper Recipes|DS-K101-304|R3}}
|
|-
! bgcolor="#D0E7FF" align="center" |
{{LithRecipe Table}}
|Picomaster XF200 (Raith)
|}


==='''Process Ranking Table'''===
Processes in the table above are ranked by their "''Process Maturity Level''" as follows:
{| class="wikitable"
!Process Level
! colspan="11" |Description of Process Level Ranking
|-
|A
| colspan="11" |Process '''A'''llowed and materials available but never done
|-
|R1
| colspan="11" |Process has been ran at least once
|-
|R2
| colspan="11" |Process has been ran and procedure is documented
|-
|R3
| colspan="11" |Process has been ran, procedure is documented, and data is available
|-
|R4
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''no''' in-Situ control available
|-
|R5
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''and''' in-Situ control available
|-
|R6
| colspan="11" |Process has a documented procedure and control charts/limits available. Controlled process.
|}
==Lift-Off Recipes==

*{{fl|Liftoff-Techniques.pdf|Lift-Off Description/Tutorial}}
**How it works, process limits and considerations for designing your process
*[[Lift-Off with I-Line Imaging Resist + LOL2000 Underlayer|I-Line Lift-Off: Bi-Layer Process with LOL2000 Underlayer]]
**''Single Expose/Develop process for simplicity''
**''Up to ~130nm metal thickness & ≥500nm-1000nm gap between metal.''
**''Can use any I-Line litho tool (GCA Stepper, Contact aligner, MLA)''
*{{fl|Bi-LayerContactprocesswithPMGI.pdf|I-Line Lift-Off: Bi-Layer Process with PMGI Underlayer and Contact Aligner}}
**''Multiple processes for Metal thicknesses ~800nm to ~2.5µm''
**''Uses multiple [[DUV Flood Expose|DUV Flood exposure]]/develop cycles to create undercut.''
**''Can be transferred to other I-Line litho tools (Stepper, MLA etc.)''
**Updates to the process:
***You now only need to do 5min [[DUV Flood Expose|DUV Flood exposure]] each cycle (lamp optics were replaced)
***Use the new "101B" developer, which replaced the "SAL/101A" developers but works the same.
**There are 2 [[DUV Flood Expose|DUV Flood exposure]] + 101B develop steps because the first exposure doesn't expose the entire PMGI - because PMGI absorbs DUV very strongly so the light doesn't penetrate to the bottom of thick PMGI on the first exposure.
*[[Lift-Off with DUV Imaging + PMGI Underlayer|DUV Lift-Off: UV6 Imaging Resist + PMGI Underlayer]]
**''Single-expose/develop process''
**''Up to ~65nm metal thickness & ~350nm gap between metal''
**''Use thicker PMGI for thicker metals''

==[[E-Beam Lithography System (JEOL JBX-6300FS)|E-Beam Lithography Recipes (JEOL JBX-6300FS)]]==

*Under Development.

==[[Focused Ion-Beam Lithography (Raith Velion)|FIB Lithography Recipes (Raith Velion)]]==
''To Be Added''

==[[Automated Coat/Develop System (S-Cubed Flexi)|Automated Coat/Develop System Recipes (S-Cubed Flexi)]]==
Recipes pre-loaded on the S-Cubed Flexi automated coat/bake/develop system. Only staff may write new recipes, contact the tool supervisor for more info.

===Available Variations===

*We have different recipes with varyious UV6 spin speeds - the same spin speed optionss as found on our manual Headway spinners. This allows for PR thickness control. See the linked UV6 datasheets below for thickness vs. rpm spin curves. '''Note''' that exact spin RPM may be slightly different between Headway spinners (on benches) vs. S-Cubed.
*DSK is recommended to be spun at 1.5krpm (~40nm) for best anti-reflection properties. 5krpm (~20nm) recipes are also provided for historical/legacy processes.
*DSK can be baked at either 220C to act as a Dry-etchable BARC (similar to DUV-42P), or at lower temps as a developable BARC (no dry etch required).
*"Chain" recipes (with DSK+UV6 spin/cured in succession) are only available for DSK Baked at 185C & 220C, and all UV6 Spin-speed variations. For the other DSK temps you can use the single-PR "Routes".
*Developer recipes are now available for 300 MiF Developer. '''Note''' that developer is flowing continuously during the develop, so develop times are shorter by ~50% compared to beaker developing.
**'''DO NOT EDIT developer recipes''', they can damage the tool when programmed incorrectly!
*"Chain" recipes for 135*C Post-exposure Bake + Develop have been made.
*ASML cassettes can be placed directly on this tool for spin / exposure / develop process. Please make sure all cassettes are kept back at their respecting tools when done.

===Recipes Table (S-Cubed Flexi)===
{| class="wikitable"
|+''Ask [[Tony Bosch|Staff]] if you need a new recipe.''
|'''''Coating Material'''''
|'''''Route/Chain'''''
|'''''Name''': (User: "UCSB Users")''
|'''''Spin Speed (krpm)'''''
|'''''Bake Temp'''''
|'''''Notes'''''
|-
! colspan="6" |
|-
! colspan="6" |BEFORE LITHOGRAPHY (PR Coat and Bake)
|-
! colspan="6" |
|-
|'''''Hotplate Set'''''
|Route
| colspan="4" |To pre-set the DSK Hotplate temp (HP4).
Note: Only HP4 can be changed.

HP1-HP3 remains fixed at: HP1=135°C, HP2=170°C & HP3=170°C
|-
|
|
|HP4-SET-'''220C'''
|
|220°C
|Will over shoot +-2°C when done.
|-
|
|
|HP4-SET-'''210C'''
|
|210°C
|
|-
|
|
|HP4-SET-'''200C'''
|
|200°C
|
|-
|
|
|HP4-SET-'''185C'''
|
|185°C
|
|-
| colspan="6" |'''''Bottom Anti-Reflection Coating (BARC), DSK101 only:'''''
|-
|'''''[https://wiki.nanotech.ucsb.edu/wiki/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101]'''''
|Route
| colspan="4" |''DSK101 Develop Rate depends on Bake temp - you can use this to control undercut.'' ''See: [[DS-K101-304 Bake Temp. versus Develop Rate|DSK Bake vs. Dev rate]]''
DSK101 spun at 1.5K is equivalent to DUV-42P. See: [[Stepper Recipes#Anti-Reflective Coatings]]

'''185°C bake''' allows the DSK to dissolve during develop, and allows for undercut (may lift-off small features)

'''220°C bake''' allows DSK to be used as dry-etchable BARC (equiv. to DUV42P), requiring O2 etch to remove. Better for small features. See [[Stepper Recipes#Anti-Reflective Coatings|here for relevant processing info from DUV42P]].

'''Note: All PR coat recipes have EBR backside clean steps included in the recipe.'''
|-
|''1.5krpm recipes''
|
|COAT-DSK101-304[1.5K]-'''185C'''
|1.5krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[1.5K]-'''200C'''
|1.5krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''210C'''
|1.5krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''220C'''
|1.5krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |
|-
|''5krpm recipes''
|
|COAT-DSK101-304[5K]-'''185C'''
|5.0krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[5K]-'''200C'''
|5.0krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[5K]-'''210C'''
|5.0krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[5K]-'''220C'''
|5.0krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |'''''Imaging resist (UV6) only:'''''
|-
|'''''[https://wiki.nanofab.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]'''''
|Route
|COAT-UV6['''2K''']-135C
|2.0krpm
|135°C
|Requires: HP1=135°C
|-
|''varying spin speed''
|
|COAT-UV6['''2.5K''']-135C
|2.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3K''']-135C
|3.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3.5K''']-135C
|3.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''4K''']-135C
|4.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''5K''']-135C
|5.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''6K''']-135C
|6.0krpm
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |'''''UV6 Coat with Developable BARC underlayer:'''''
|-
|'''''DS-K101 @ 185°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-185C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 185°C
UV6: 135°C
|Requires:
– HP4=185°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-185C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-185C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |'''''UV6 Coat with Dry-Etchable BARC underlayer:'''''
|-
|'''''DS-K101 @ 220°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-220C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 220°C
UV6: 135°C
|Requires:
– HP4=220°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-220C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-220C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
! colspan="6" |
|-
! colspan="6" |AFTER LITHOGRAPHY (PEB and Developing)
|-
! colspan="6" |
|-
|'''''PEB Wafer Bake'''''
|Route
| colspan="4" |To bake wafer with UV6 after exposure (PEB) for 90sec and cool for 15sec
|-
|
|
|BAKE-135C-90S
|
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |
|-
|'''''PEB and Developing'''''
|Route
| colspan="4" |To post-exposure bake wafer after exposure (std. PEB for UV6) 90sec, cool 15sec, develop using AZ300MIF and water rinse 60sec

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
| colspan="6" |
|-
|'''Developing'''
|Route
| colspan="4" |To only develop wafer using AZ300MIF and water rinse 60sec (No PEB)

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
|
|
|
|
|
|
|}
==[[Holographic Lith/PL Setup (Custom)|Holography Recipes]]==
''The Holography recipes here use the BARC layer XHRiC-11 & the high-res. I-Line photoresist THMR-IP3600HP-D.''

*{{fl|Holography_Process_for_1D-lines_and_2D-dots_%28ARC-11_%26_THMR-IP3600HP-D%29-updated-4-8-2021.pdf|Standard Holography Process - on SiO2 on Si}}
*{{fl|Holography-Process-Variation-revA.pdf|Holography Process Variations - Set-up Angle - Etching into SiO2 and Si}}
*{{fl|05-SiO2_Nano-structure_Etch.pdf|Etch SiO2 Nano-structure - Changing Side-wall Angle - Etching into Si with a different line-width}}
*{{fl|30-Redicing_Nanowire_Diameter_by_Thermal_Oxidation_and_Vapored_HF_Etch.pdf|Reduce SiO2 Nanowire Diameter - Thermal Oxidation - Vapor HF Etching}}

==Low-K Spin-On Dielectric Recipes==

*{{fl|Lithography-BCB-photo-lowk-dielectric-spinon-4024-40-revA.docx|Photo BCB (4024-40)}}
*{{fl|BCB-cyclotene-3000-revA.pdf|Standard BCB (3022-46)}}
*{{fl|512B-Application-Data-Bake-revA.pdf|SOG (T512B)}}

==Chemicals Stocked + Datasheets==
''The following is a list of the lithography chemicals we stock in the lab, with links to the datasheets for each. The datasheets will often have important processing info such as spin-speed vs. thickness curves, typical process parameters, bake temps/times etc.''

Item numbers in (parentheses) indicate the specific stocked formulation, when the datasheet shows multiple formulations.
{|
|- valign="top"
| width="400" |
;<div id="PositivePR"><big>Positive Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AXP4000pb-Datasheet.pdf|AZP4000 (AZ4110, AZ4210, AZ4330)}}
*{{Fl|Az_p4620_photoresist_data_package.pdf|AZ P4620}}
*{{fl|OCG825-Positive-Resist-Datasheet.pdf|OCG825}}
*{{fl|SPR220-Positive-Resist-Datasheet.pdf|SPR220 (SPR220-3, SPR220-7)}}
*{{fl|SPR955-Positive-Resist-Datasheet.pdf|SPR955CM (SPR955CM-0.9, SPR955CM-1.8)}}
*THMR-3600HP (Thin I-Line & Holography)
**{{fl|THMR_iP_3500_iP3600.pdf|Evaluation Results: THMR-3600HP}}
**{{fl|3600_D,_D2v_Spin_Speed_Curve.pdf|Spin Curves for THMR-3600HP}}
**{{fl|THMR-iP3600_HP_D_20140801_(B)_GHS_US.pdf|Safety Datasheet for THMR-3600HP}}

'''''DUV-248nm'''''

*{{fl|UV210-Positive-Resist-Datasheet.pdf|UV210-0.3}}
*{{fl|UV6-Positive-Resist-Datasheet.pdf|UV6-0.8}}
*{{fl|UV26-Positive-Resist-Datasheet.pdf|UV26-2.5}}

;<div id="NegativePR"><big>Negative Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AZ5214-Negative-Resist-Datasheet.pdf|AZ5214}}
*{{fl|AZnLOF5510-Negative-Resist-Datasheet.pdf|AZnLOF5510}}
*{{fl|AZnLOF2020-Negative-Resist-Datasheet.pdf|AZnLOF2000 (AZnLOF2020, AZnLOF2035, AZnLOF2070)}}
*{{fl|NR9-1000PY-revA.pdf|Futurrex NR9-1000PY(use AZ300MIF dev)}}
*{{fl|NR9-3000PY-revA.pdf|Futurrex NR9-3000PY(use AZ300MIF dev)}}
*{{fl|NR9-6000PY-revA.pdf|Futurrex NR9-6000PY(use AZ300MIF dev)}}
*{{fl|SU-8-2015-revA.pdf|SU-8-2005,2010, 2015}}
*{{fl|SU-8-2075-revA.pdf|SU-8-2075}}

'''''DUV-248nm'''''

*{{fl|UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf|UVN-30-0.8}}

;<div id="Underlayers"><big>Underlayers</big></div>
See [[Lithography Recipes#Lift-Off Recipes|this page for lift-off recipes.]]
*{{fl|PMGI-Underlayer-Datasheet.pdf|PMGI (PMGI SF3,5,8,11,15)}}
*LOR ([[Media:Lor pds.pdf|LOR 10A & LOR 30C]])
*{{fl|LOL2000-Underlayer-Datasheet.pdf|Shipley LOL2000}}

;<div id="EBLPR"><big>E-beam resists</big></div>

*{{fl|PMMA-E-Beam-Resist-Datasheet.pdf|PMMA (PMMA, P(MMA-MAA) copolymer)}}
*{{fl|maN2403-E-Beam-Resist-Datasheet.pdf|maN 2403}}

;<div id="NanoImprinting"><big>Nanoimprinting</big></div>

*{{fl|NX1020-Nanoimprinting-Datasheet.pdf|NX1020}}
*{{fl|MRI-7020-Nanoimprinting-Datasheet.pdf|MRI-7020}}
*{{fl|Mr-UVCur21.pdf|MR-UVCur21}}
*{{fl|OrmoStamp-NIL-Lithography-UV-Soft-RevA.pdf|Ormostamp}}

|
;<div id="ContrastEnhancement"><big>Contrast Enhancement Materials</big></div>

*{{fl|CEM365iS-Contrast-Enhancement-Datasheet.pdf|CEM365iS}}

;<div id="AntiReflectionCoatings"><big>Anti-Reflection Coatings</big></div>

*{{fl|XHRiC-Anti-Reflective-Coating.pdf|XHRiC-11 (i-line)}}
*{{fl|DUV42P-Anti-Reflective-Coating.pdf|DUV42P-6 (DUV) (For AR2 replacement)}}
*{{fl|DS-K101-304-Anti-Reflective-Coating.pdf|DS-K101-304 (DUV developable BARC)}}

;<div id="AdhesionPromoters"><big>Adhesion Promoters</big></div>

*HMDS
*AP3000 BCB Adhesion Promoter
*{{fl|OMNICOAT-revA.pdf|Omnicoat, SU-8 Adhesion Promoter}}
*{{fl|OrmoPrime-NIL-Adhesion-RevA.pdf|Ormoprime08-Ormostsmp Adhesion Promoter}}

;<div id="SpinOnDielectrics"><big>Spin-On Dielectrics</big></div>

''Low-K Spin-On Dielectrics such as Benzocyclobutane and Spin-on Glass''

*{{fl|BCB-cyclotene-3000-revA.pdf|BCB, Cyclotene 3022-46(Not Photosensitive)}}
*{{fl|BCB-cyclotene-4000-revA.pdf|PhotoBCB, Cyclotene 4024-40(Negative Polarity)}}
*{{fl|BCB-adhesion.pdf|BCB Adhesion Notes from Vendor}}
*{{fl|BCB-rework.pdf|BCB rework Notes from Vendor}}

;<div id="Developers"><big>Developers</big></div>

*{{fl|AZ400K-Developer-Datasheet.pdf|AZ400K (AZ400K, AZ400K1:4)}}
*{{fl|AZ300MIF-Developer-Datasheet.pdf|AZ300MIF}}
*DS2100 BCB Developer
*SU-8 Developer
*101A Developer (for DUV Flood Exposed PMGI)

;<div id="PRRemovers"><big>Photoresist Removers</big></div>

*[http://www.microchemicals.com/products/remover_stripper/nmp.html AZ NMP]
**''This replaces {{fl|1165-Resist-Remover.pdf|1165}}''
*{{fl|AZ300T-Resist-Remover.pdf|AZ300T}}
*{{fl|RemoverPG-revA.pdf|Remover PG, SU-8 stripper}}
*AZ EBR ("Edge Bead Remover", PGMEA)

|}

[[Category: Processing]]
[[category: Lithography]]
[[category: Recipes]]

Lithography Recipes

2026-09-23T22:16:59Z

John d: /* Chemicals Stocked + Datasheets */ added LOR datasheets + link to lift-off recipes

__NOTOC__
{| class="wikitable"
|+
!Table of Contents
|-
|
==='''<big>Photolithography Processes</big>'''===

#'''UV Optical Lithography'''
#*[[#PositivePR |'''Stocked Lithography Chemical + Datasheets''']]
#**''Lists all stocked photolith. chemicals, PRs, strippers, developers, and links to the chemical's application notes/datasheet, which detail the spin curves and nominal processes.''
#*[[#Photolithography_Recipes |'''Photo Lithography Recipe section''']]
#**''Starting recipes (spin, bake, exposure, develop etc.) for all photolith. tools.''
#**''Substrate/surface materials/pattern size can affect process parameters. Users may need to run Focus/Exposure Arrays/Matrix (FEA's/FEM's) with these processes to achieve high-resolution.''
#**[[Contact Alignment Recipes|Contact Aligner Recipes]]
#***[[Contact Alignment Recipes#Suss Aligners .28SUSS MJB-3.29|Suss MJB Aligners]]
#***[[Contact Alignment Recipes#Contact Aligner .28SUSS MA-6.29|Suss MA6]]
#**[[Stepper Recipes|Stepper Recipes]]
#***[[Stepper Recipes#Stepper 1 .28GCA 6300.29|Stepper #1: GCA 6300]] (I-Line)
#***[[Stepper Recipes#Stepper 2 .28AutoStep 200.29|Stepper #2: GCA Autostep 200]] (I-Line)
#***[[Stepper Recipes#Stepper 3 .28ASML DUV.29|Stepper #3: ASML PAS 5500/300]] (DUV)
#**[[Direct-Write Lithography Recipes|Direct-Write Recipes]]
#***[[Direct-Write Lithography Recipes#Maskless Aligner .28Heidelberg MLA150.29|Heidelberg MLA150 (I-Line)]]
#***[[Direct-Write Lithography Recipes#E-Beam Lithography Recipes (Raith EBPG 5150+)|Raith EBPG 5150+ (Electron-Beam)]]
#***[[Lithography Recipes#FIB Lithography Recipes .28Raith Velion.29|Raith Velion FIB (Ion Beam)]]
#**[[Lithography Recipes#Automated Coat.2FDevelop System Recipes .28S-Cubed Flexi.29|Automated Coater Recipes (S-Cubed Flexi)]]
#[[Lithography Recipes#General Photolithography Techniques|'''General Photolithography Techniques''']]
#*''Techniques for improving litho. or solving common photolith. problems.''
#*[[Photolithography - Improving Adhesion Photoresist Adhesion|HMDS Process for Improving Adhesion]]
#*[[Photolithography - Manual Edge-Bead Removal Techniques|Edge-Bead Removal Techniques]]
#*[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf Photoresist reflow (MicroChem)]
#*[[Lithography Calibration - Analyzing a Focus-Exposure Matrix]]
#'''[[Lithography Recipes#Lift-Off Recipes|Lift-Off Recipes]]'''
#*''Verified Recipes for lift-off using various photolith. tools''
#*''General educational description of this technique and it's limitations/considerations.''
#'''E-beam Lithography'''
#*[[#E-Beam_Lithography_Recipes |E-Beam Lithography Recipes]]
#**''Has links to starting recipes. Substrates and patterns play a large role in process parameters.''
#*[[#EBLPR |EBL Photoresist Datasheets]]
#**''Provided for reference, also showing starting recipes and usage info.''
#'''[[Lithography Recipes#Holography Recipes|Holography]]'''
#*''For 1-D and 2-D gratings with 220nm nominal period, available on substrates up to 1 inch square.''
#*''Recipes for silicon substrates are provided, and have been translated to other substrates by users.''
#*''Datasheets are provided with starting recipes and usage info.''
#'''[[Lithography Recipes#Edge-Bead Removal Techniques|Edge-Bead Removal]]'''
#*''Edge photoresist removal methods needed for clamp-based etchers''
#*''Improves resolution for contact lithography''
|-
|

==='''<big>Photolithography Chemicals/Materials</big>'''===

#'''[[#Underlayers |Underlayers]]'''
#*''These are used beneath resists for both adhesive purposes and to enable bi-layer lift-off profiles for use with photoresist.''
#*''Datasheets are provided.''
#'''[[#AntiReflectionCoatings |Anti-Reflection Coatings]]''':
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Bottom Anti-Reflection Coatings (BARC) are used in the stepper systems, underneath the resists to eliminate substrate reflections that can affect resolution and repeatability for small, near resolution limited, feature sizes.''
#*''Datasheets are provided for reference on use of the materials.''
#'''[[#ContrastEnhancement |Contrast Enhancement Materials (CEM)]]'''
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Used for resolution enhancement. Not for use in contact aligners, typically used on I-Line Steppers.''
#*''Datasheets provided with usage info.''
#'''[[#AdhesionPromoters |Adhesion Promoters]]'''
#*''These are used to improve wetting of photoresists to your substrate.''
#*''Datasheets are provided on use of these materials.''
#'''[[#SpinOnDielectrics |Low-K Spin-on Dielectrics]]'''
#*[[Lithography Recipes#SpinOnDielectrics|Spin-On Dielectrics]]
#**''Datasheets for BCB, Photo-BCB, and SOG (spin-on-glass) for reference on use.''
#*[[#Low-K_Spin-On_Dielectric_Recipes |Low-K Spin-On Dielectric Recipes]]
#**''Recipes for usage of some spin-on dielectrics.''
#'''[[#Developers |Developers and Removers]]'''
#*''Datasheets provided for reference.''
#*''Remover and Photoresist Strippers are used to dissolve PR during lift-off or after etching.''
|}

==General Photolithography Techniques==

====[[Photolithography - Improving Adhesion Photoresist Adhesion|'''HMDS Process for Improving Adhesion''']]====

*''Use these procedures if you are finding poor adhesion PR lifting-off), or for chemicals (like BHF) that attack the PR adhesion interface strongly.''

====[[Photolithography - Manual Edge-Bead Removal Techniques|'''Edge-Bead Removal Techniques''']]====

*''These techniques are required for loading full-wafers into etchers that use top-side clamps, to prevent photoresist from sticking to the clamp (and potentially destroying your wafer).''
*''For contact lithography, this improves the proximity of the mask plate and sample, improving resolution. For some projection systems, such as the [[Maskless Aligner (Heidelberg MLA150)|Maskless Aligner]], EBR can help with autofocus issues.''
*''For small samples (<1cm) some techniques here to reduce edge-bead via shims.''

====[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf '''Photoresist reflow (MicroChem)''']====

*''To create slanted sidewalls or curved surfaces.''
[[Lithography Calibration - Analyzing a Focus-Exposure Matrix|'''Lithography Calibration - Analyzing a Focus-Exposure Matrix''']]

* ''On tools with autofocus (steppers & direct-write litho tools), you calibrate your litho by shooting a "Focus Exposure Matrix/Array", or "FEM/FEA", which exposes a grid with Dose varying in one axis, and Focus varying in the other.''
* ''Explains how to locate the'' ''"Process Window" for your lithography.''

==Photolithography Recipes==

*'''R''': ''Recipe is available. Clicking this link will take you to the recipe.''
*'''A''': ''Material is available for use, but no recipes are provided.''

==='''Process Ranking Table'''===
Processes in the table above are ranked by their "''Process Maturity Level''" as follows:
{| class="wikitable"
!Process Level
! colspan="11" |Description of Process Level Ranking
|-
|A
| colspan="11" |Process '''A'''llowed and materials available but never done
|-
|R1
| colspan="11" |Process has been ran at least once
|-
|R2
| colspan="11" |Process has been ran and procedure is documented
|-
|R3
| colspan="11" |Process has been ran, procedure is documented, and data is available
|-
|R4
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''no''' in-Situ control available
|-
|R5
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''and''' in-Situ control available
|-
|R6
| colspan="11" |Process has a documented procedure and control charts/limits available. Controlled process.
|}
''Click the tool title to go to recipes for that tool.''

''Click the photoresist title to get the datasheet, also found in [[Lithography Recipes#Chemicals Stocked .2B Datasheets|Stocked Chemicals + Datasheets]].''
{| class="wikitable" style="border: 1px solid #D0E7FF; background-color:#ffffff; text-align:center;" border="1"
|-
! colspan="8" height="45" |<div style="font-size: 150%;">Photolithography Recipes</div>

|-
| bgcolor="#EAECF0" |
! colspan="2" align="center" |'''[[Contact Alignment Recipes|<big>Contact Aligner Recipes</big>]]'''
! colspan="3" align="center" |'''[[Stepper Recipes|<big>Stepper Recipes</big>]]'''
! colspan="2" align="center" |[[Direct-Write Lithography Recipes|Direct-Write Litho. Recipes]]
|-
! width="150" bgcolor="#D0E7FF" align="center" |'''Positive Resists'''
{{LithRecipe Table}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[[:File:AXP4000pb-Datasheet.pdf|AZ4110]]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4210]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4330RS]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)|R1}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/a2/Az_p4620_photoresist_data_package.pdf AZ4620]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/8b/OCG825-Positive-Resist-Datasheet.pdf OCG 825-35CS]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-0.9]
|A
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R5}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-1.8]
|A
|A
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-3.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-7.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive_Resist_.28MLA150.29}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/be/3600_D%2C_D2v_Spin_Speed_Curve.pdf THMR-IP3600 HP D]
|
|
|A
|A
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)|R5}}
|
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/ff/UV210-Positive-Resist-Datasheet.pdf UV210-0.3]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/UV26-Positive-Resist-Datasheet.pdf UV26-2.5]
|
|
|
|
|A
|
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Negative Resists'''
{{LithRecipe Table}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/b0/AZ5214-Negative-Resist-Datasheet.pdf AZ5214-EIR]
|{{rl|Contact_Alignment_Recipes|Negative Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2020]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2035]
| bgcolor="#D0E7FF" |A
| {{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)|R1}}
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |
| bgcolor="EEFFFF" |A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2070]
|A
|A
|{{Rl|Stepper_Recipes|Negative_Resist_.28GCA_6300.29|R2}}
|A
|
|A
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/82/AZnLOF5510-Negative-Resist-Datasheet.pdf AZnLOF 5510]
|A
|A
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/c/c9/UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf UVN30-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Negative Resist (ASML DUV)|R6}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/7/78/SU-8-2015-revA.pdf SU-8 2005,2010,2015]
|A
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/2c/SU-8-2075-revA.pdf SU-8 2075]
|A
|A
|A
|A
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |NR9-[//wiki.nanotech.ucsb.edu/w/images/8/8f/NR9-1000PY-revA.pdf 1000],[//wiki.nanotech.ucsb.edu/w/images/7/71/NR9-3000PY-revA.pdf 3000],[//wiki.nanotech.ucsb.edu/w/images/f/f9/NR9-6000PY-revA.pdf 6000]PY
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|A
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Anti-Reflection Coatings'''
{{LithRecipe Table}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/33/XHRiC-Anti-Reflective-Coating.pdf XHRiC-11]
|
|
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/DUV42P-Anti-Reflective-Coating.pdf DUV42-P]
|
|
|
|
|{{rl|Stepper Recipes|DUV-42P-6|R3}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101-304]
|
|
|
|
|{{rl|Stepper Recipes|DS-K101-304|R3}}
|
|-
! bgcolor="#D0E7FF" align="center" |
{{LithRecipe Table}}
|}


==Lift-Off Recipes==

*{{fl|Liftoff-Techniques.pdf|Lift-Off Description/Tutorial}}
**How it works, process limits and considerations for designing your process
*[[Lift-Off with I-Line Imaging Resist + LOL2000 Underlayer|I-Line Lift-Off: Bi-Layer Process with LOL2000 Underlayer]]
**''Single Expose/Develop process for simplicity''
**''Up to ~130nm metal thickness & ≥500nm-1000nm gap between metal.''
**''Can use any I-Line litho tool (GCA Stepper, Contact aligner, MLA)''
*{{fl|Bi-LayerContactprocesswithPMGI.pdf|I-Line Lift-Off: Bi-Layer Process with PMGI Underlayer and Contact Aligner}}
**''Multiple processes for Metal thicknesses ~800nm to ~2.5µm''
**''Uses multiple [[DUV Flood Expose|DUV Flood exposure]]/develop cycles to create undercut.''
**''Can be transferred to other I-Line litho tools (Stepper, MLA etc.)''
**Updates to the process:
***You now only need to do 5min [[DUV Flood Expose|DUV Flood exposure]] each cycle (lamp optics were replaced)
***Use the new "101B" developer, which replaced the "SAL/101A" developers but works the same.
**There are 2 [[DUV Flood Expose|DUV Flood exposure]] + 101B develop steps because the first exposure doesn't expose the entire PMGI - because PMGI absorbs DUV very strongly so the light doesn't penetrate to the bottom of thick PMGI on the first exposure.
*[[Lift-Off with DUV Imaging + PMGI Underlayer|DUV Lift-Off: UV6 Imaging Resist + PMGI Underlayer]]
**''Single-expose/develop process''
**''Up to ~65nm metal thickness & ~350nm gap between metal''
**''Use thicker PMGI for thicker metals''

==[[E-Beam Lithography System (JEOL JBX-6300FS)|E-Beam Lithography Recipes (JEOL JBX-6300FS)]]==

*Under Development.

==[[Focused Ion-Beam Lithography (Raith Velion)|FIB Lithography Recipes (Raith Velion)]]==
''To Be Added''

==[[Automated Coat/Develop System (S-Cubed Flexi)|Automated Coat/Develop System Recipes (S-Cubed Flexi)]]==
Recipes pre-loaded on the S-Cubed Flexi automated coat/bake/develop system. Only staff may write new recipes, contact the tool supervisor for more info.

===Available Variations===

*We have different recipes with varyious UV6 spin speeds - the same spin speed optionss as found on our manual Headway spinners. This allows for PR thickness control. See the linked UV6 datasheets below for thickness vs. rpm spin curves. '''Note''' that exact spin RPM may be slightly different between Headway spinners (on benches) vs. S-Cubed.
*DSK is recommended to be spun at 1.5krpm (~40nm) for best anti-reflection properties. 5krpm (~20nm) recipes are also provided for historical/legacy processes.
*DSK can be baked at either 220C to act as a Dry-etchable BARC (similar to DUV-42P), or at lower temps as a developable BARC (no dry etch required).
*"Chain" recipes (with DSK+UV6 spin/cured in succession) are only available for DSK Baked at 185C & 220C, and all UV6 Spin-speed variations. For the other DSK temps you can use the single-PR "Routes".
*Developer recipes are now available for 300 MiF Developer. '''Note''' that developer is flowing continuously during the develop, so develop times are shorter by ~50% compared to beaker developing.
**'''DO NOT EDIT developer recipes''', they can damage the tool when programmed incorrectly!
*"Chain" recipes for 135*C Post-exposure Bake + Develop have been made.
*ASML cassettes can be placed directly on this tool for spin / exposure / develop process. Please make sure all cassettes are kept back at their respecting tools when done.

===Recipes Table (S-Cubed Flexi)===
{| class="wikitable"
|+''Ask [[Tony Bosch|Staff]] if you need a new recipe.''
|'''''Coating Material'''''
|'''''Route/Chain'''''
|'''''Name''': (User: "UCSB Users")''
|'''''Spin Speed (krpm)'''''
|'''''Bake Temp'''''
|'''''Notes'''''
|-
! colspan="6" |
|-
! colspan="6" |BEFORE LITHOGRAPHY (PR Coat and Bake)
|-
! colspan="6" |
|-
|'''''Hotplate Set'''''
|Route
| colspan="4" |To pre-set the DSK Hotplate temp (HP4).
Note: Only HP4 can be changed.

HP1-HP3 remains fixed at: HP1=135°C, HP2=170°C & HP3=170°C
|-
|
|
|HP4-SET-'''220C'''
|
|220°C
|Will over shoot +-2°C when done.
|-
|
|
|HP4-SET-'''210C'''
|
|210°C
|
|-
|
|
|HP4-SET-'''200C'''
|
|200°C
|
|-
|
|
|HP4-SET-'''185C'''
|
|185°C
|
|-
| colspan="6" |'''''Bottom Anti-Reflection Coating (BARC), DSK101 only:'''''
|-
|'''''[https://wiki.nanotech.ucsb.edu/wiki/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101]'''''
|Route
| colspan="4" |''DSK101 Develop Rate depends on Bake temp - you can use this to control undercut.'' ''See: [[DS-K101-304 Bake Temp. versus Develop Rate|DSK Bake vs. Dev rate]]''
DSK101 spun at 1.5K is equivalent to DUV-42P. See: [[Stepper Recipes#Anti-Reflective Coatings]]

'''185°C bake''' allows the DSK to dissolve during develop, and allows for undercut (may lift-off small features)

'''220°C bake''' allows DSK to be used as dry-etchable BARC (equiv. to DUV42P), requiring O2 etch to remove. Better for small features. See [[Stepper Recipes#Anti-Reflective Coatings|here for relevant processing info from DUV42P]].

'''Note: All PR coat recipes have EBR backside clean steps included in the recipe.'''
|-
|''1.5krpm recipes''
|
|COAT-DSK101-304[1.5K]-'''185C'''
|1.5krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[1.5K]-'''200C'''
|1.5krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''210C'''
|1.5krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''220C'''
|1.5krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |
|-
|''5krpm recipes''
|
|COAT-DSK101-304[5K]-'''185C'''
|5.0krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[5K]-'''200C'''
|5.0krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[5K]-'''210C'''
|5.0krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[5K]-'''220C'''
|5.0krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |'''''Imaging resist (UV6) only:'''''
|-
|'''''[https://wiki.nanofab.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]'''''
|Route
|COAT-UV6['''2K''']-135C
|2.0krpm
|135°C
|Requires: HP1=135°C
|-
|''varying spin speed''
|
|COAT-UV6['''2.5K''']-135C
|2.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3K''']-135C
|3.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3.5K''']-135C
|3.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''4K''']-135C
|4.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''5K''']-135C
|5.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''6K''']-135C
|6.0krpm
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |'''''UV6 Coat with Developable BARC underlayer:'''''
|-
|'''''DS-K101 @ 185°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-185C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 185°C
UV6: 135°C
|Requires:
– HP4=185°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-185C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-185C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |'''''UV6 Coat with Dry-Etchable BARC underlayer:'''''
|-
|'''''DS-K101 @ 220°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-220C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 220°C
UV6: 135°C
|Requires:
– HP4=220°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-220C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-220C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
! colspan="6" |
|-
! colspan="6" |AFTER LITHOGRAPHY (PEB and Developing)
|-
! colspan="6" |
|-
|'''''PEB Wafer Bake'''''
|Route
| colspan="4" |To bake wafer with UV6 after exposure (PEB) for 90sec and cool for 15sec
|-
|
|
|BAKE-135C-90S
|
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |
|-
|'''''PEB and Developing'''''
|Route
| colspan="4" |To post-exposure bake wafer after exposure (std. PEB for UV6) 90sec, cool 15sec, develop using AZ300MIF and water rinse 60sec

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
| colspan="6" |
|-
|'''Developing'''
|Route
| colspan="4" |To only develop wafer using AZ300MIF and water rinse 60sec (No PEB)

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
|
|
|
|
|
|
|}
==[[Holographic Lith/PL Setup (Custom)|Holography Recipes]]==
''The Holography recipes here use the BARC layer XHRiC-11 & the high-res. I-Line photoresist THMR-IP3600HP-D.''

*{{fl|Holography_Process_for_1D-lines_and_2D-dots_%28ARC-11_%26_THMR-IP3600HP-D%29-updated-4-8-2021.pdf|Standard Holography Process - on SiO2 on Si}}
*{{fl|Holography-Process-Variation-revA.pdf|Holography Process Variations - Set-up Angle - Etching into SiO2 and Si}}
*{{fl|05-SiO2_Nano-structure_Etch.pdf|Etch SiO2 Nano-structure - Changing Side-wall Angle - Etching into Si with a different line-width}}
*{{fl|30-Redicing_Nanowire_Diameter_by_Thermal_Oxidation_and_Vapored_HF_Etch.pdf|Reduce SiO2 Nanowire Diameter - Thermal Oxidation - Vapor HF Etching}}

==Low-K Spin-On Dielectric Recipes==

*{{fl|Lithography-BCB-photo-lowk-dielectric-spinon-4024-40-revA.docx|Photo BCB (4024-40)}}
*{{fl|BCB-cyclotene-3000-revA.pdf|Standard BCB (3022-46)}}
*{{fl|512B-Application-Data-Bake-revA.pdf|SOG (T512B)}}

==Chemicals Stocked + Datasheets==
''The following is a list of the lithography chemicals we stock in the lab, with links to the datasheets for each. The datasheets will often have important processing info such as spin-speed vs. thickness curves, typical process parameters, bake temps/times etc.''

Item numbers in (parentheses) indicate the specific stocked formulation, when the datasheet shows multiple formulations.
{|
|- valign="top"
| width="400" |
;<div id="PositivePR"><big>Positive Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AXP4000pb-Datasheet.pdf|AZP4000 (AZ4110, AZ4210, AZ4330)}}
*{{Fl|Az_p4620_photoresist_data_package.pdf|AZ P4620}}
*{{fl|OCG825-Positive-Resist-Datasheet.pdf|OCG825}}
*{{fl|SPR220-Positive-Resist-Datasheet.pdf|SPR220 (SPR220-3, SPR220-7)}}
*{{fl|SPR955-Positive-Resist-Datasheet.pdf|SPR955CM (SPR955CM-0.9, SPR955CM-1.8)}}
*THMR-3600HP (Thin I-Line & Holography)
**{{fl|THMR_iP_3500_iP3600.pdf|Evaluation Results: THMR-3600HP}}
**{{fl|3600_D,_D2v_Spin_Speed_Curve.pdf|Spin Curves for THMR-3600HP}}
**{{fl|THMR-iP3600_HP_D_20140801_(B)_GHS_US.pdf|Safety Datasheet for THMR-3600HP}}

'''''DUV-248nm'''''

*{{fl|UV210-Positive-Resist-Datasheet.pdf|UV210-0.3}}
*{{fl|UV6-Positive-Resist-Datasheet.pdf|UV6-0.8}}
*{{fl|UV26-Positive-Resist-Datasheet.pdf|UV26-2.5}}

;<div id="NegativePR"><big>Negative Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AZ5214-Negative-Resist-Datasheet.pdf|AZ5214}}
*{{fl|AZnLOF5510-Negative-Resist-Datasheet.pdf|AZnLOF5510}}
*{{fl|AZnLOF2020-Negative-Resist-Datasheet.pdf|AZnLOF2000 (AZnLOF2020, AZnLOF2035, AZnLOF2070)}}
*{{fl|NR9-1000PY-revA.pdf|Futurrex NR9-1000PY(use AZ300MIF dev)}}
*{{fl|NR9-3000PY-revA.pdf|Futurrex NR9-3000PY(use AZ300MIF dev)}}
*{{fl|NR9-6000PY-revA.pdf|Futurrex NR9-6000PY(use AZ300MIF dev)}}
*{{fl|SU-8-2015-revA.pdf|SU-8-2005,2010, 2015}}
*{{fl|SU-8-2075-revA.pdf|SU-8-2075}}

'''''DUV-248nm'''''

*{{fl|UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf|UVN-30-0.8}}

;<div id="Underlayers"><big>Underlayers</big></div>
See [[Lithography Recipes#Lift-Off Recipes|this page for lift-off recipes.]]
*{{fl|PMGI-Underlayer-Datasheet.pdf|PMGI (PMGI SF3,5,8,11,15)}}
*LOR ([[Media:Lor pds.pdf|LOR 10A & LOR 30C]])
*{{fl|LOL2000-Underlayer-Datasheet.pdf|Shipley LOL2000}}

;<div id="EBLPR"><big>E-beam resists</big></div>

*{{fl|PMMA-E-Beam-Resist-Datasheet.pdf|PMMA (PMMA, P(MMA-MAA) copolymer)}}
*{{fl|maN2403-E-Beam-Resist-Datasheet.pdf|maN 2403}}

;<div id="NanoImprinting"><big>Nanoimprinting</big></div>

*{{fl|NX1020-Nanoimprinting-Datasheet.pdf|NX1020}}
*{{fl|MRI-7020-Nanoimprinting-Datasheet.pdf|MRI-7020}}
*{{fl|Mr-UVCur21.pdf|MR-UVCur21}}
*{{fl|OrmoStamp-NIL-Lithography-UV-Soft-RevA.pdf|Ormostamp}}

|
;<div id="ContrastEnhancement"><big>Contrast Enhancement Materials</big></div>

*{{fl|CEM365iS-Contrast-Enhancement-Datasheet.pdf|CEM365iS}}

;<div id="AntiReflectionCoatings"><big>Anti-Reflection Coatings</big></div>

*{{fl|XHRiC-Anti-Reflective-Coating.pdf|XHRiC-11 (i-line)}}
*{{fl|DUV42P-Anti-Reflective-Coating.pdf|DUV42P-6 (DUV) (For AR2 replacement)}}
*{{fl|DS-K101-304-Anti-Reflective-Coating.pdf|DS-K101-304 (DUV developable BARC)}}

;<div id="AdhesionPromoters"><big>Adhesion Promoters</big></div>

*HMDS
*AP3000 BCB Adhesion Promoter
*{{fl|OMNICOAT-revA.pdf|Omnicoat, SU-8 Adhesion Promoter}}
*{{fl|OrmoPrime-NIL-Adhesion-RevA.pdf|Ormoprime08-Ormostsmp Adhesion Promoter}}

;<div id="SpinOnDielectrics"><big>Spin-On Dielectrics</big></div>

''Low-K Spin-On Dielectrics such as Benzocyclobutane and Spin-on Glass''

*{{fl|BCB-cyclotene-3000-revA.pdf|BCB, Cyclotene 3022-46(Not Photosensitive)}}
*{{fl|BCB-cyclotene-4000-revA.pdf|PhotoBCB, Cyclotene 4024-40(Negative Polarity)}}
*{{fl|BCB-adhesion.pdf|BCB Adhesion Notes from Vendor}}
*{{fl|BCB-rework.pdf|BCB rework Notes from Vendor}}

;<div id="Developers"><big>Developers</big></div>

*{{fl|AZ400K-Developer-Datasheet.pdf|AZ400K (AZ400K, AZ400K1:4)}}
*{{fl|AZ300MIF-Developer-Datasheet.pdf|AZ300MIF}}
*DS2100 BCB Developer
*SU-8 Developer
*101A Developer (for DUV Flood Exposed PMGI)

;<div id="PRRemovers"><big>Photoresist Removers</big></div>

*[http://www.microchemicals.com/products/remover_stripper/nmp.html AZ NMP]
**''This replaces {{fl|1165-Resist-Remover.pdf|1165}}''
*{{fl|AZ300T-Resist-Remover.pdf|AZ300T}}
*{{fl|RemoverPG-revA.pdf|Remover PG, SU-8 stripper}}
*AZ EBR ("Edge Bead Remover", PGMEA)

|}

[[Category: Processing]]
[[category: Lithography]]
[[category: Recipes]]

Lithography Recipes

2026-09-23T22:15:33Z

John d: /* Lift-Off Recipes */ added UV6 + LOR link

__NOTOC__
{| class="wikitable"
|+
!Table of Contents
|-
|
==='''<big>Photolithography Processes</big>'''===

#'''UV Optical Lithography'''
#*[[#PositivePR |'''Stocked Lithography Chemical + Datasheets''']]
#**''Lists all stocked photolith. chemicals, PRs, strippers, developers, and links to the chemical's application notes/datasheet, which detail the spin curves and nominal processes.''
#*[[#Photolithography_Recipes |'''Photo Lithography Recipe section''']]
#**''Starting recipes (spin, bake, exposure, develop etc.) for all photolith. tools.''
#**''Substrate/surface materials/pattern size can affect process parameters. Users may need to run Focus/Exposure Arrays/Matrix (FEA's/FEM's) with these processes to achieve high-resolution.''
#**[[Contact Alignment Recipes|Contact Aligner Recipes]]
#***[[Contact Alignment Recipes#Suss Aligners .28SUSS MJB-3.29|Suss MJB Aligners]]
#***[[Contact Alignment Recipes#Contact Aligner .28SUSS MA-6.29|Suss MA6]]
#**[[Stepper Recipes|Stepper Recipes]]
#***[[Stepper Recipes#Stepper 1 .28GCA 6300.29|Stepper #1: GCA 6300]] (I-Line)
#***[[Stepper Recipes#Stepper 2 .28AutoStep 200.29|Stepper #2: GCA Autostep 200]] (I-Line)
#***[[Stepper Recipes#Stepper 3 .28ASML DUV.29|Stepper #3: ASML PAS 5500/300]] (DUV)
#**[[Direct-Write Lithography Recipes|Direct-Write Recipes]]
#***[[Direct-Write Lithography Recipes#Maskless Aligner .28Heidelberg MLA150.29|Heidelberg MLA150 (I-Line)]]
#***[[Direct-Write Lithography Recipes#E-Beam Lithography Recipes (Raith EBPG 5150+)|Raith EBPG 5150+ (Electron-Beam)]]
#***[[Lithography Recipes#FIB Lithography Recipes .28Raith Velion.29|Raith Velion FIB (Ion Beam)]]
#**[[Lithography Recipes#Automated Coat.2FDevelop System Recipes .28S-Cubed Flexi.29|Automated Coater Recipes (S-Cubed Flexi)]]
#[[Lithography Recipes#General Photolithography Techniques|'''General Photolithography Techniques''']]
#*''Techniques for improving litho. or solving common photolith. problems.''
#*[[Photolithography - Improving Adhesion Photoresist Adhesion|HMDS Process for Improving Adhesion]]
#*[[Photolithography - Manual Edge-Bead Removal Techniques|Edge-Bead Removal Techniques]]
#*[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf Photoresist reflow (MicroChem)]
#*[[Lithography Calibration - Analyzing a Focus-Exposure Matrix]]
#'''[[Lithography Recipes#Lift-Off Recipes|Lift-Off Recipes]]'''
#*''Verified Recipes for lift-off using various photolith. tools''
#*''General educational description of this technique and it's limitations/considerations.''
#'''E-beam Lithography'''
#*[[#E-Beam_Lithography_Recipes |E-Beam Lithography Recipes]]
#**''Has links to starting recipes. Substrates and patterns play a large role in process parameters.''
#*[[#EBLPR |EBL Photoresist Datasheets]]
#**''Provided for reference, also showing starting recipes and usage info.''
#'''[[Lithography Recipes#Holography Recipes|Holography]]'''
#*''For 1-D and 2-D gratings with 220nm nominal period, available on substrates up to 1 inch square.''
#*''Recipes for silicon substrates are provided, and have been translated to other substrates by users.''
#*''Datasheets are provided with starting recipes and usage info.''
#'''[[Lithography Recipes#Edge-Bead Removal Techniques|Edge-Bead Removal]]'''
#*''Edge photoresist removal methods needed for clamp-based etchers''
#*''Improves resolution for contact lithography''
|-
|

==='''<big>Photolithography Chemicals/Materials</big>'''===

#'''[[#Underlayers |Underlayers]]'''
#*''These are used beneath resists for both adhesive purposes and to enable bi-layer lift-off profiles for use with photoresist.''
#*''Datasheets are provided.''
#'''[[#AntiReflectionCoatings |Anti-Reflection Coatings]]''':
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Bottom Anti-Reflection Coatings (BARC) are used in the stepper systems, underneath the resists to eliminate substrate reflections that can affect resolution and repeatability for small, near resolution limited, feature sizes.''
#*''Datasheets are provided for reference on use of the materials.''
#'''[[#ContrastEnhancement |Contrast Enhancement Materials (CEM)]]'''
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Used for resolution enhancement. Not for use in contact aligners, typically used on I-Line Steppers.''
#*''Datasheets provided with usage info.''
#'''[[#AdhesionPromoters |Adhesion Promoters]]'''
#*''These are used to improve wetting of photoresists to your substrate.''
#*''Datasheets are provided on use of these materials.''
#'''[[#SpinOnDielectrics |Low-K Spin-on Dielectrics]]'''
#*[[Lithography Recipes#SpinOnDielectrics|Spin-On Dielectrics]]
#**''Datasheets for BCB, Photo-BCB, and SOG (spin-on-glass) for reference on use.''
#*[[#Low-K_Spin-On_Dielectric_Recipes |Low-K Spin-On Dielectric Recipes]]
#**''Recipes for usage of some spin-on dielectrics.''
#'''[[#Developers |Developers and Removers]]'''
#*''Datasheets provided for reference.''
#*''Remover and Photoresist Strippers are used to dissolve PR during lift-off or after etching.''
|}

==General Photolithography Techniques==

====[[Photolithography - Improving Adhesion Photoresist Adhesion|'''HMDS Process for Improving Adhesion''']]====

*''Use these procedures if you are finding poor adhesion PR lifting-off), or for chemicals (like BHF) that attack the PR adhesion interface strongly.''

====[[Photolithography - Manual Edge-Bead Removal Techniques|'''Edge-Bead Removal Techniques''']]====

*''These techniques are required for loading full-wafers into etchers that use top-side clamps, to prevent photoresist from sticking to the clamp (and potentially destroying your wafer).''
*''For contact lithography, this improves the proximity of the mask plate and sample, improving resolution. For some projection systems, such as the [[Maskless Aligner (Heidelberg MLA150)|Maskless Aligner]], EBR can help with autofocus issues.''
*''For small samples (<1cm) some techniques here to reduce edge-bead via shims.''

====[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf '''Photoresist reflow (MicroChem)''']====

*''To create slanted sidewalls or curved surfaces.''
[[Lithography Calibration - Analyzing a Focus-Exposure Matrix|'''Lithography Calibration - Analyzing a Focus-Exposure Matrix''']]

* ''On tools with autofocus (steppers & direct-write litho tools), you calibrate your litho by shooting a "Focus Exposure Matrix/Array", or "FEM/FEA", which exposes a grid with Dose varying in one axis, and Focus varying in the other.''
* ''Explains how to locate the'' ''"Process Window" for your lithography.''

==Photolithography Recipes==

*'''R''': ''Recipe is available. Clicking this link will take you to the recipe.''
*'''A''': ''Material is available for use, but no recipes are provided.''

==='''Process Ranking Table'''===
Processes in the table above are ranked by their "''Process Maturity Level''" as follows:
{| class="wikitable"
!Process Level
! colspan="11" |Description of Process Level Ranking
|-
|A
| colspan="11" |Process '''A'''llowed and materials available but never done
|-
|R1
| colspan="11" |Process has been ran at least once
|-
|R2
| colspan="11" |Process has been ran and procedure is documented
|-
|R3
| colspan="11" |Process has been ran, procedure is documented, and data is available
|-
|R4
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''no''' in-Situ control available
|-
|R5
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''and''' in-Situ control available
|-
|R6
| colspan="11" |Process has a documented procedure and control charts/limits available. Controlled process.
|}
''Click the tool title to go to recipes for that tool.''

''Click the photoresist title to get the datasheet, also found in [[Lithography Recipes#Chemicals Stocked .2B Datasheets|Stocked Chemicals + Datasheets]].''
{| class="wikitable" style="border: 1px solid #D0E7FF; background-color:#ffffff; text-align:center;" border="1"
|-
! colspan="8" height="45" |<div style="font-size: 150%;">Photolithography Recipes</div>

|-
| bgcolor="#EAECF0" |
! colspan="2" align="center" |'''[[Contact Alignment Recipes|<big>Contact Aligner Recipes</big>]]'''
! colspan="3" align="center" |'''[[Stepper Recipes|<big>Stepper Recipes</big>]]'''
! colspan="2" align="center" |[[Direct-Write Lithography Recipes|Direct-Write Litho. Recipes]]
|-
! width="150" bgcolor="#D0E7FF" align="center" |'''Positive Resists'''
{{LithRecipe Table}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[[:File:AXP4000pb-Datasheet.pdf|AZ4110]]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4210]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4330RS]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)|R1}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/a2/Az_p4620_photoresist_data_package.pdf AZ4620]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/8b/OCG825-Positive-Resist-Datasheet.pdf OCG 825-35CS]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-0.9]
|A
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R5}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-1.8]
|A
|A
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-3.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-7.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive_Resist_.28MLA150.29}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/be/3600_D%2C_D2v_Spin_Speed_Curve.pdf THMR-IP3600 HP D]
|
|
|A
|A
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)|R5}}
|
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/ff/UV210-Positive-Resist-Datasheet.pdf UV210-0.3]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/UV26-Positive-Resist-Datasheet.pdf UV26-2.5]
|
|
|
|
|A
|
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Negative Resists'''
{{LithRecipe Table}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/b0/AZ5214-Negative-Resist-Datasheet.pdf AZ5214-EIR]
|{{rl|Contact_Alignment_Recipes|Negative Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2020]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2035]
| bgcolor="#D0E7FF" |A
| {{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)|R1}}
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |
| bgcolor="EEFFFF" |A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2070]
|A
|A
|{{Rl|Stepper_Recipes|Negative_Resist_.28GCA_6300.29|R2}}
|A
|
|A
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/82/AZnLOF5510-Negative-Resist-Datasheet.pdf AZnLOF 5510]
|A
|A
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/c/c9/UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf UVN30-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Negative Resist (ASML DUV)|R6}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/7/78/SU-8-2015-revA.pdf SU-8 2005,2010,2015]
|A
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/2c/SU-8-2075-revA.pdf SU-8 2075]
|A
|A
|A
|A
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |NR9-[//wiki.nanotech.ucsb.edu/w/images/8/8f/NR9-1000PY-revA.pdf 1000],[//wiki.nanotech.ucsb.edu/w/images/7/71/NR9-3000PY-revA.pdf 3000],[//wiki.nanotech.ucsb.edu/w/images/f/f9/NR9-6000PY-revA.pdf 6000]PY
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|A
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Anti-Reflection Coatings'''
{{LithRecipe Table}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/33/XHRiC-Anti-Reflective-Coating.pdf XHRiC-11]
|
|
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/DUV42P-Anti-Reflective-Coating.pdf DUV42-P]
|
|
|
|
|{{rl|Stepper Recipes|DUV-42P-6|R3}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101-304]
|
|
|
|
|{{rl|Stepper Recipes|DS-K101-304|R3}}
|
|-
! bgcolor="#D0E7FF" align="center" |
{{LithRecipe Table}}
|}


==Lift-Off Recipes==

*{{fl|Liftoff-Techniques.pdf|Lift-Off Description/Tutorial}}
**How it works, process limits and considerations for designing your process
*[[Lift-Off with I-Line Imaging Resist + LOL2000 Underlayer|I-Line Lift-Off: Bi-Layer Process with LOL2000 Underlayer]]
**''Single Expose/Develop process for simplicity''
**''Up to ~130nm metal thickness & ≥500nm-1000nm gap between metal.''
**''Can use any I-Line litho tool (GCA Stepper, Contact aligner, MLA)''
*{{fl|Bi-LayerContactprocesswithPMGI.pdf|I-Line Lift-Off: Bi-Layer Process with PMGI Underlayer and Contact Aligner}}
**''Multiple processes for Metal thicknesses ~800nm to ~2.5µm''
**''Uses multiple [[DUV Flood Expose|DUV Flood exposure]]/develop cycles to create undercut.''
**''Can be transferred to other I-Line litho tools (Stepper, MLA etc.)''
**Updates to the process:
***You now only need to do 5min [[DUV Flood Expose|DUV Flood exposure]] each cycle (lamp optics were replaced)
***Use the new "101B" developer, which replaced the "SAL/101A" developers but works the same.
**There are 2 [[DUV Flood Expose|DUV Flood exposure]] + 101B develop steps because the first exposure doesn't expose the entire PMGI - because PMGI absorbs DUV very strongly so the light doesn't penetrate to the bottom of thick PMGI on the first exposure.
*[[Lift-Off with DUV Imaging + PMGI Underlayer|DUV Lift-Off: UV6 Imaging Resist + PMGI Underlayer]]
**''Single-expose/develop process''
**''Up to ~65nm metal thickness & ~350nm gap between metal''
**''Use thicker PMGI for thicker metals''
*[[Lift-off DUV Lift-off: UV6 imaging resist + LOR Underlayers|DUV Lift-off: UV6 imaging resist + LOR Underlayers]]
**''Single expose/develop process''
**''Allows for thicker metals, but wider undercut.''

==[[E-Beam Lithography System (JEOL JBX-6300FS)|E-Beam Lithography Recipes (JEOL JBX-6300FS)]]==

*Under Development.

==[[Focused Ion-Beam Lithography (Raith Velion)|FIB Lithography Recipes (Raith Velion)]]==
''To Be Added''

==[[Automated Coat/Develop System (S-Cubed Flexi)|Automated Coat/Develop System Recipes (S-Cubed Flexi)]]==
Recipes pre-loaded on the S-Cubed Flexi automated coat/bake/develop system. Only staff may write new recipes, contact the tool supervisor for more info.

===Available Variations===

*We have different recipes with varyious UV6 spin speeds - the same spin speed optionss as found on our manual Headway spinners. This allows for PR thickness control. See the linked UV6 datasheets below for thickness vs. rpm spin curves. '''Note''' that exact spin RPM may be slightly different between Headway spinners (on benches) vs. S-Cubed.
*DSK is recommended to be spun at 1.5krpm (~40nm) for best anti-reflection properties. 5krpm (~20nm) recipes are also provided for historical/legacy processes.
*DSK can be baked at either 220C to act as a Dry-etchable BARC (similar to DUV-42P), or at lower temps as a developable BARC (no dry etch required).
*"Chain" recipes (with DSK+UV6 spin/cured in succession) are only available for DSK Baked at 185C & 220C, and all UV6 Spin-speed variations. For the other DSK temps you can use the single-PR "Routes".
*Developer recipes are now available for 300 MiF Developer. '''Note''' that developer is flowing continuously during the develop, so develop times are shorter by ~50% compared to beaker developing.
**'''DO NOT EDIT developer recipes''', they can damage the tool when programmed incorrectly!
*"Chain" recipes for 135*C Post-exposure Bake + Develop have been made.
*ASML cassettes can be placed directly on this tool for spin / exposure / develop process. Please make sure all cassettes are kept back at their respecting tools when done.

===Recipes Table (S-Cubed Flexi)===
{| class="wikitable"
|+''Ask [[Tony Bosch|Staff]] if you need a new recipe.''
|'''''Coating Material'''''
|'''''Route/Chain'''''
|'''''Name''': (User: "UCSB Users")''
|'''''Spin Speed (krpm)'''''
|'''''Bake Temp'''''
|'''''Notes'''''
|-
! colspan="6" |
|-
! colspan="6" |BEFORE LITHOGRAPHY (PR Coat and Bake)
|-
! colspan="6" |
|-
|'''''Hotplate Set'''''
|Route
| colspan="4" |To pre-set the DSK Hotplate temp (HP4).
Note: Only HP4 can be changed.

HP1-HP3 remains fixed at: HP1=135°C, HP2=170°C & HP3=170°C
|-
|
|
|HP4-SET-'''220C'''
|
|220°C
|Will over shoot +-2°C when done.
|-
|
|
|HP4-SET-'''210C'''
|
|210°C
|
|-
|
|
|HP4-SET-'''200C'''
|
|200°C
|
|-
|
|
|HP4-SET-'''185C'''
|
|185°C
|
|-
| colspan="6" |'''''Bottom Anti-Reflection Coating (BARC), DSK101 only:'''''
|-
|'''''[https://wiki.nanotech.ucsb.edu/wiki/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101]'''''
|Route
| colspan="4" |''DSK101 Develop Rate depends on Bake temp - you can use this to control undercut.'' ''See: [[DS-K101-304 Bake Temp. versus Develop Rate|DSK Bake vs. Dev rate]]''
DSK101 spun at 1.5K is equivalent to DUV-42P. See: [[Stepper Recipes#Anti-Reflective Coatings]]

'''185°C bake''' allows the DSK to dissolve during develop, and allows for undercut (may lift-off small features)

'''220°C bake''' allows DSK to be used as dry-etchable BARC (equiv. to DUV42P), requiring O2 etch to remove. Better for small features. See [[Stepper Recipes#Anti-Reflective Coatings|here for relevant processing info from DUV42P]].

'''Note: All PR coat recipes have EBR backside clean steps included in the recipe.'''
|-
|''1.5krpm recipes''
|
|COAT-DSK101-304[1.5K]-'''185C'''
|1.5krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[1.5K]-'''200C'''
|1.5krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''210C'''
|1.5krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''220C'''
|1.5krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |
|-
|''5krpm recipes''
|
|COAT-DSK101-304[5K]-'''185C'''
|5.0krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[5K]-'''200C'''
|5.0krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[5K]-'''210C'''
|5.0krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[5K]-'''220C'''
|5.0krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |'''''Imaging resist (UV6) only:'''''
|-
|'''''[https://wiki.nanofab.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]'''''
|Route
|COAT-UV6['''2K''']-135C
|2.0krpm
|135°C
|Requires: HP1=135°C
|-
|''varying spin speed''
|
|COAT-UV6['''2.5K''']-135C
|2.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3K''']-135C
|3.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3.5K''']-135C
|3.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''4K''']-135C
|4.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''5K''']-135C
|5.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''6K''']-135C
|6.0krpm
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |'''''UV6 Coat with Developable BARC underlayer:'''''
|-
|'''''DS-K101 @ 185°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-185C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 185°C
UV6: 135°C
|Requires:
– HP4=185°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-185C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-185C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |'''''UV6 Coat with Dry-Etchable BARC underlayer:'''''
|-
|'''''DS-K101 @ 220°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-220C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 220°C
UV6: 135°C
|Requires:
– HP4=220°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-220C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-220C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
! colspan="6" |
|-
! colspan="6" |AFTER LITHOGRAPHY (PEB and Developing)
|-
! colspan="6" |
|-
|'''''PEB Wafer Bake'''''
|Route
| colspan="4" |To bake wafer with UV6 after exposure (PEB) for 90sec and cool for 15sec
|-
|
|
|BAKE-135C-90S
|
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |
|-
|'''''PEB and Developing'''''
|Route
| colspan="4" |To post-exposure bake wafer after exposure (std. PEB for UV6) 90sec, cool 15sec, develop using AZ300MIF and water rinse 60sec

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
| colspan="6" |
|-
|'''Developing'''
|Route
| colspan="4" |To only develop wafer using AZ300MIF and water rinse 60sec (No PEB)

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
|
|
|
|
|
|
|}
==[[Holographic Lith/PL Setup (Custom)|Holography Recipes]]==
''The Holography recipes here use the BARC layer XHRiC-11 & the high-res. I-Line photoresist THMR-IP3600HP-D.''

*{{fl|Holography_Process_for_1D-lines_and_2D-dots_%28ARC-11_%26_THMR-IP3600HP-D%29-updated-4-8-2021.pdf|Standard Holography Process - on SiO2 on Si}}
*{{fl|Holography-Process-Variation-revA.pdf|Holography Process Variations - Set-up Angle - Etching into SiO2 and Si}}
*{{fl|05-SiO2_Nano-structure_Etch.pdf|Etch SiO2 Nano-structure - Changing Side-wall Angle - Etching into Si with a different line-width}}
*{{fl|30-Redicing_Nanowire_Diameter_by_Thermal_Oxidation_and_Vapored_HF_Etch.pdf|Reduce SiO2 Nanowire Diameter - Thermal Oxidation - Vapor HF Etching}}

==Low-K Spin-On Dielectric Recipes==

*{{fl|Lithography-BCB-photo-lowk-dielectric-spinon-4024-40-revA.docx|Photo BCB (4024-40)}}
*{{fl|BCB-cyclotene-3000-revA.pdf|Standard BCB (3022-46)}}
*{{fl|512B-Application-Data-Bake-revA.pdf|SOG (T512B)}}

==Chemicals Stocked + Datasheets==
''The following is a list of the lithography chemicals we stock in the lab, with links to the datasheets for each. The datasheets will often have important processing info such as spin-speed vs. thickness curves, typical process parameters, bake temps/times etc.''

Item numbers in (parentheses) indicate the specific stocked formulation, when the datasheet shows multiple formulations.
{|
|- valign="top"
| width="400" |
;<div id="PositivePR"><big>Positive Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AXP4000pb-Datasheet.pdf|AZP4000 (AZ4110, AZ4210, AZ4330)}}
*{{Fl|Az_p4620_photoresist_data_package.pdf|AZ P4620}}
*{{fl|OCG825-Positive-Resist-Datasheet.pdf|OCG825}}
*{{fl|SPR220-Positive-Resist-Datasheet.pdf|SPR220 (SPR220-3, SPR220-7)}}
*{{fl|SPR955-Positive-Resist-Datasheet.pdf|SPR955CM (SPR955CM-0.9, SPR955CM-1.8)}}
*THMR-3600HP (Thin I-Line & Holography)
**{{fl|THMR_iP_3500_iP3600.pdf|Evaluation Results: THMR-3600HP}}
**{{fl|3600_D,_D2v_Spin_Speed_Curve.pdf|Spin Curves for THMR-3600HP}}
**{{fl|THMR-iP3600_HP_D_20140801_(B)_GHS_US.pdf|Safety Datasheet for THMR-3600HP}}

'''''DUV-248nm'''''

*{{fl|UV210-Positive-Resist-Datasheet.pdf|UV210-0.3}}
*{{fl|UV6-Positive-Resist-Datasheet.pdf|UV6-0.8}}
*{{fl|UV26-Positive-Resist-Datasheet.pdf|UV26-2.5}}

;<div id="NegativePR"><big>Negative Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AZ5214-Negative-Resist-Datasheet.pdf|AZ5214}}
*{{fl|AZnLOF5510-Negative-Resist-Datasheet.pdf|AZnLOF5510}}
*{{fl|AZnLOF2020-Negative-Resist-Datasheet.pdf|AZnLOF2000 (AZnLOF2020, AZnLOF2035, AZnLOF2070)}}
*{{fl|NR9-1000PY-revA.pdf|Futurrex NR9-1000PY(use AZ300MIF dev)}}
*{{fl|NR9-3000PY-revA.pdf|Futurrex NR9-3000PY(use AZ300MIF dev)}}
*{{fl|NR9-6000PY-revA.pdf|Futurrex NR9-6000PY(use AZ300MIF dev)}}
*{{fl|SU-8-2015-revA.pdf|SU-8-2005,2010, 2015}}
*{{fl|SU-8-2075-revA.pdf|SU-8-2075}}

'''''DUV-248nm'''''

*{{fl|UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf|UVN-30-0.8}}

;<div id="Underlayers"><big>Underlayers</big></div>

*{{fl|PMGI-Underlayer-Datasheet.pdf|PMGI (PMGI SF3,5,8,11,15)}}
*{{fl|LOL2000-Underlayer-Datasheet.pdf|Shipley LOL2000}}

;<div id="EBLPR"><big>E-beam resists</big></div>

*{{fl|PMMA-E-Beam-Resist-Datasheet.pdf|PMMA (PMMA, P(MMA-MAA) copolymer)}}
*{{fl|maN2403-E-Beam-Resist-Datasheet.pdf|maN 2403}}

;<div id="NanoImprinting"><big>Nanoimprinting</big></div>

*{{fl|NX1020-Nanoimprinting-Datasheet.pdf|NX1020}}
*{{fl|MRI-7020-Nanoimprinting-Datasheet.pdf|MRI-7020}}
*{{fl|Mr-UVCur21.pdf|MR-UVCur21}}
*{{fl|OrmoStamp-NIL-Lithography-UV-Soft-RevA.pdf|Ormostamp}}

|
;<div id="ContrastEnhancement"><big>Contrast Enhancement Materials</big></div>

*{{fl|CEM365iS-Contrast-Enhancement-Datasheet.pdf|CEM365iS}}

;<div id="AntiReflectionCoatings"><big>Anti-Reflection Coatings</big></div>

*{{fl|XHRiC-Anti-Reflective-Coating.pdf|XHRiC-11 (i-line)}}
*{{fl|DUV42P-Anti-Reflective-Coating.pdf|DUV42P-6 (DUV) (For AR2 replacement)}}
*{{fl|DS-K101-304-Anti-Reflective-Coating.pdf|DS-K101-304 (DUV developable BARC)}}

;<div id="AdhesionPromoters"><big>Adhesion Promoters</big></div>

*HMDS
*AP3000 BCB Adhesion Promoter
*{{fl|OMNICOAT-revA.pdf|Omnicoat, SU-8 Adhesion Promoter}}
*{{fl|OrmoPrime-NIL-Adhesion-RevA.pdf|Ormoprime08-Ormostsmp Adhesion Promoter}}

;<div id="SpinOnDielectrics"><big>Spin-On Dielectrics</big></div>

''Low-K Spin-On Dielectrics such as Benzocyclobutane and Spin-on Glass''

*{{fl|BCB-cyclotene-3000-revA.pdf|BCB, Cyclotene 3022-46(Not Photosensitive)}}
*{{fl|BCB-cyclotene-4000-revA.pdf|PhotoBCB, Cyclotene 4024-40(Negative Polarity)}}
*{{fl|BCB-adhesion.pdf|BCB Adhesion Notes from Vendor}}
*{{fl|BCB-rework.pdf|BCB rework Notes from Vendor}}

;<div id="Developers"><big>Developers</big></div>

*{{fl|AZ400K-Developer-Datasheet.pdf|AZ400K (AZ400K, AZ400K1:4)}}
*{{fl|AZ300MIF-Developer-Datasheet.pdf|AZ300MIF}}
*DS2100 BCB Developer
*SU-8 Developer
*101A Developer (for DUV Flood Exposed PMGI)

;<div id="PRRemovers"><big>Photoresist Removers</big></div>

*[http://www.microchemicals.com/products/remover_stripper/nmp.html AZ NMP]
**''This replaces {{fl|1165-Resist-Remover.pdf|1165}}''
*{{fl|AZ300T-Resist-Remover.pdf|AZ300T}}
*{{fl|RemoverPG-revA.pdf|Remover PG, SU-8 stripper}}
*AZ EBR ("Edge Bead Remover", PGMEA)

|}

[[Category: Processing]]
[[category: Lithography]]
[[category: Recipes]]

File:Lor pds.pdf

2026-09-23T22:12:32Z

John d: John d uploaded a new version of File:Lor pds.pdf

== Summary ==
Microchem LOR underlayer "lift-off resist" data sheet from somewhere online

File:Lor pds.pdf

2026-09-23T22:08:22Z

John d: Microchem LOR underlayer "lift-off resist" data sheet from somewhere online

== Summary ==
Microchem LOR underlayer "lift-off resist" data sheet from somewhere online

ICP Etching Recipes

2026-09-22T19:59:56Z

John d: /* ICP Etch 2 (Panasonic E626I) */ added Cr etch from BT's AT process, and added O2 plasma recipe number

{{recipes|Dry Etching}}

=[[DSEIII_(PlasmaTherm/Deep_Silicon_Etcher)]]=

=== Process Tips ===

* Use the Santovac oil for mounting small pieces to Silicon carrier wafers, or else your resist will burn! Increases thermal conduction to the cooled carrier wafer. (Full-wafers instead get direct Helium cooling.) Careful that the oil does not get anywhere near the outer clamp that holds the wafer down, or your wafer will get stuck.
** The oil fully dissolves in Acetone or NMP. You can clean oil off the back by wiping the back of the sample against an ACE-soaked wipe.
* See the '''[[ICP Etching Recipes#Process Control Data (DSEiii)|Process Control Data below]]''' - Staff/Intern-run Etches Weekly, tracked over time.
** This tells you whether the chamber and tool are operating properly before you run your etch.
** You can follow the intern's travelers for details of their etch.

==Edge-Bead Removal (DSEiii)==
Make sure to remove photoresist from edges of wafer, or PR may stick to the top-side wafer clamp and destroy your wafer during unload!

*[[ASML DUV: Edge Bead Removal via Photolithography|Edge Bead Removal via Photolithography]]: use a custom metal mask to pattern the photoresist with a flood exposure.
**If you are etching fully through a wafer, remember that removal of edge-bead will cause full etching in the exposed areas. To prevent a wafer from falling into the machine after the etch, you can [[Packaging Recipes#Wafer Bonder .28Logitech WBS7.29|mount to a carrier wafer using wax]].
*[[Photolithography - Manual Edge-Bead Removal Techniques|Manual PR Edge-Bead Removal]] - using swabs and EBR100. This is prone to error and easy to accidentally leave a blob of PR on the edge - so be extra careful to ensure NO PR is left on the edges!

==High Rate Bosch Etch (DSEIII)==
*[//wiki.nanotech.ucsb.edu/wiki/images/4/4a/10-Si_Etch_Bosch_DSEIII.pdf Bosch Process Recipe and Characterization] - Standard recipe on the tool.[[File:DSEiii Bosch Ecth SEM Example 01.png|alt=Example SEM image|thumb|188x188px|Example of 100µm Deep Bosch Etched Silicon posts with Al2O3 hard mask. Close inspection shows the horizontal "scalloping" from the cycling nature of the etch. (Image Credit: [[Demis D. John]], 2021-07)]]
**'''STD_Bosch_Si (⭐️Production)''' - Developed 2024-10
***Old Recipe Name: "'''''Plasma-Therm Standard DSE'''''" - lower EtchA, less tolerant
**Standard [https://en.wikipedia.org/wiki/Deep_reactive-ion_etching#Bosch_process Bosch Process] for high aspect-ratio, high-selectivity Silicon etching.
***Cycles between polymer deposition "Dep" / Polymer etch "Etch A" / Si etch "Etch B" steps. Step Times gives fine control.
***To reduce roughening/grassing ("black silicon"), Increase "''Etch A''" ''t''ime by ~50%. Alternatively, reduce "''Dep''" step time by ~20%.
**Patterns with different exposed/etched areas will have different "optimal" parameters.
**This recipe has 2s Etch A time compared to "'''''Plasma-Therm Standard DSE'''''" (which has 1.5s Etch A) below - this reduced the undercut of mask to ~1% of the etch depth and the effect of [https://wiki.nanofab.ucsb.edu/w/images/a/a1/Cal_vs_Legacy_DSE.png aspect ratio on etch rate]. All other recipe parameters are the same.
**Selectivity to Photoresist ~60.
**Selectivity to SiO2 should be higher, not yet measured.
**Selectivity to Al2O3 is extremely high, >9000. See below TSV process for processing tips with Al2O3 hardmask.
**If you need to pattern all the way to the edge of the wafer, PR won't work because you have to remove the edge-bead of photoresist (see above). Instead use hardmask process (See "Through Silicon Via" etch below).
**Larger open area → lower selectivity & lower etch rate.
***<1% center to edge variability in etch rate for small open area.
***More variation across wafer for larger open area (eg. plasma dicing)
**Thick PR's approx ≥10µm tend to burn, avoid thick PR's. They also make edge-bead removal very difficult. Instead use an SiO2 hardmask or the Al2O3/SiO2 hardmask below.
{|
|[[File:Plasmatherm DSE - 40um deep Si etch Cal 241007 - 30D 002.jpg|alt=Tilted SEM of 40um deep etch|none|thumb|250x250px|~40µm deep Silicon etch, run as Process Control "EtchCal" (''Process Development and Image: [[Noah Dutra]], 2024-10-07'')]]
|[[File:DSE_16um_Bosch_Etch_-_22_013.jpg|alt=Example SEM image|none|thumb|250x250px|Example of 16.32µm Deep Etched Silicon with 650nm thick UV6 Photoresist mask, 2µm Pitch. (''Image Credit: [[Noah Dutra]] 2024-08'')]]
|}

=== '''Si Etching C4F8/SF6/Ar (PlasmaTherm DSEiii)''' ===
[[File:DSE plot.png|alt=example of Process Control Charts|thumb|[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281|232x232px]]
* Recipe: ''STD_Bosch_Si (⭐️Production),'' on 100mm Si Wafer with ~50% open area, photoresist mask, ~40µm deep

*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=0#gid=0 Si Etching with C4F8/SF6/Ar - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/Ar - '''Plots''']

===Through Silicon Via (TSV) etch (DSEiii)===
Since the topside clamp requires the removal of photoresist on the outermost ~5-7mm of the wafer, this makes PR incompatible with through-silicon etching (as the outer edges would be etched-through, dropping the inner portion into the chamber). In addition, in practice we have found that thick PR often roughens and burns during long ~30-60min etches, making removal very difficult.

Instead, we recommend the following process with Al2O3 hardmask:
We have a new wafer-mounting process for through-silicon etching, using the UV-Release Dicing tape. Contact [[Demis D. John|staff]] for more info.
-- [[Demis D. John|Demis]] 2026-02-10

'''NOTE''':
'''DO NOT RUN''' the wax-mounting process without discussing with staff first. The wax-mounting process process can leave wax on the wafer clamp, causing the next user's wafer to get stuck and fail transfer!
''(Through-wafer process with no wax is still acceptable.)'' -- [[Demis D. John|Demis]] 2024-03-11

{| class="wikitable"
! colspan="2" |Process for Through-Wafer Silicon Etching
with wax-mounting (small pieces only)
|-
|Process to etch through ~550µm Silicon
|''[[Demis D. John]] & [[Biljana Stamenic]] 2022-11-11. Please consider our [[Frequently Asked Questions#Publications acknowledging the Nanofab|publication policy]] if you use/modify this process.''
|-
|Deposit 150nm Al2O3 on either:

*[https://wiki.nanotech.ucsb.edu/w/index.php?title=Sputtering_Recipes#Al2O3_deposition_.28IBD.29 Veeco Nexus IBD]
*AJA Sputter [https://wiki.nanotech.ucsb.edu/wiki/Sputtering_Recipes#Materials_Table_.28Sputter_3.29 3]/[https://wiki.nanotech.ucsb.edu/wiki/Sputtering_Recipes#Al2O3_Deposition_.28Sputter_4.29 4]/[https://wiki.nanotech.ucsb.edu/wiki/Sputtering_Recipes#Materials_Table_.28Sputter_5.29 5] (Check which has Al target installed)
|May need to do dep. rate check beforehand.
|-
|Deposit ~3nm SiO2, ''in situ'' (same machine as above)
|This improves adhesion to photoresist and prevents developer attacking the Al2O3.
|-
|Lithography - your preferred method. Needs approx. ≥500nm thick PR.
|
|-
|Etch the [https://wiki.nanotech.ucsb.edu/w/index.php?title=ICP_Etching_Recipes#Al2O3_Etching_.28Panasonic_2.29 Al2O3 in Panasonic ICP 1/2]
|Use 50W version. Overetch by ~20%, will also etch through the thin SiO2 layer.
|-
|Strip PR - either ''[https://wiki.nanotech.ucsb.edu/w/index.php?title=ICP_Etching_Recipes#Photoresist_Etch.2FStrip_.28Panasonic_2.29 in situ]'', or via NMP 80°C soak followed by [https://wiki.nanotech.ucsb.edu/wiki/Oxygen_Plasma_System_Recipes#Ashers_.28Technics_PEII.29 PEii Technics ashing].
|''In situ'' PR strip appears to give better + faster results.
|-
|If pieces of the wafer are at risk of falling into the chamber, mount the product wafer to a carrier wafer:
[https://wiki.nanotech.ucsb.edu/wiki/Logitech_WBS7_-_Procedure_for_Wax_Mounting_with_bulk_Crystalbond_Stick Logitech Wax Mounting Recipe - Bulk Crystal Bond]

If you are only etching small holes through the wafer (majority of wafer is intact), then wax-mounting is not necessary.
|'''CONTACT [[Demis D. John|STAFF]]''' before attempting this step!

Critical - Ensure no wax is present on either side or edge of wafer prior to DSE etching, or wafer may break in the DSE during robot unload!
|-
|Use POLOS spinners with ACE/ISO to clean front and back of wafer.
'''''IMPORTANT''''' for wax-mounting, to ensure wax does not stick your wafer to the DSE clamp.

Observe ''carefully'' for any wax protruding from between wafers - redo spin-clean as needed.
|Also make sure wax thickness is not too thick, of long etches could cause wax to seep out from between the wafers.
|-
|DSEiii etch - to eliminate grassing:

* Increase EtchA LF-Bias Power and Duration
** EtchA: 300W for 3.5–4sec
** New method as of ~2025
Old method: reduce Dep step:

*Bosch Cycles: Dep: 1.2sec / Etch A: 1.5sec / Etch B: 2.0sec
*Rate ≈ 4.25µm / min
|Can use Lasermonitor and/or Camera to observe when etch is fully through. Trenches may get black/rough, but then clear up when fully etched.

*Record Helium FLOW during recipe run, for next step (if He leaks).

*Ok to remove wafer, observe/measure, and re-load for etching.

*If see black grass and etch rate drops, may need to run an O2 plasma with [[Ashers (Technics PEII)|Technics PEii]] few min to remove polymer, Increase EtchA step time (eg. by 50-100%) and then continue the etch.
|-
|If you did not wax-mount your wafer, the recipe will eventually fail for Helium Pressure/Flow out of compliance. This is because the cooling Helium leaks through the wafer when the openings get fully etched through.
Once this happens,

*Leave your wafer in the chamber, then

*Edit recipe to set Helium Cooling (first step only) to "Flow Control Only".
*Set to typical flow of normal process from above (Something like ~6sccm? Not sure. Exact value is not critical)
*Re-run the recipe with He on Flow-control only until etch is complete.
|
|-
|Strip Al2O3/SiO2 either with Buffered HF, or same Pan1/2 dry etch as above.
BHF: Eg. ~2min to fully remove SiO2 + Al2O3, with overetch.
|See etch BHF rates of the thin-films on [[Wet Etching Recipes#Table of Wet Etching Recipes|this table]].
|-
|IF wax-mounted - either

*dissolve in Acetone overnight (make sure to excess-fill enough and cover tightly with tinfoil so it doesn't dry up), complete with ACE/ISO rinse

OR

*place wafer on tinfoil-covered hotplate at 150°C, and slide product wafer off, then
**ACE/ISO clean (eg. POLOS) to remove wax.
|
|-
| colspan="2" |''If you '''publish''' using the above process, please consider our [[Frequently Asked Questions#Publications acknowledging the Nanofab|publication policy]]. This process was developed by [[Biljana Stamenic]] and [[Demis D. John]], 2022.''
|}

=== Plasma Dicing (DSEIII) ===
'''''Coming Soon''''': Plasma Dicing process with Dicing Tape as backing film.

This process has been developed by staff, is currently in the final stages of finalizing a public recipe. [[Demis D. John|'''''Contact staff''''']] if you want to use it sooner.

==Silicon: Single-Step, Low Etch Rate, Smooth Sidewall Process (DSEIII)==

*'''SF6-C4F8-CF4 Si Etch v1 (⭐️Production)''' - Developed 2026-01 by [[Noah Dutra]]
**12mT, 20/850W, C4F8/SF6/CF4=68.3/32.5/32.4sccm
**E.R. = 339.4nm/min, Selectivity (to UV6) = 4.9
**Smooth, Vertical, E.R. uniformity is within 5% on wafer
**Tested with 4" wafers that are ~50% open with UV6 PR
*[//wiki.nanotech.ucsb.edu/wiki/images/8/8f/10-Si_Etch_Single_Step_Smooth_Sidewall_DSEIII.pdf Single Step Silicon Etch Recipe and Characterization]
**Older, alternate Si "shallow/smooth" etch recipe.
**Recipe Name: "'''''Nano Trench Etch'''''" (''Production'' - copy to your ''Personal'' category)
**Used instead of Bosch Process, to avoid scalloping on the sidewall.
**Lower selectivity, lower etch rate, smoother sidewalls.

== SiO2 Etch (DSEiii) ==
These recipes were developed to serve as secondary pathways to the calibrated FICP SiO2 and Si etch calibrations [[Process Group - Process Control Data#PlasmaTherm SLR Fluorine Etcher - Process Control|here]]. [https://wiki.nanofab.ucsb.edu/w/images/b/b3/FICP-DSE_Analogous_Recipes.pdf Click here for SEMs comparing both cals].
*'''CF4-C4F8 SiO2 Etch v1 (⭐️Production)''' - Developed 2026-01 by [[Noah Dutra]]
**3mT, 70/800W, C4F8/CF4=7.5/32.5sccm
**E.R. = 270nm/min, Selectivity (to SPR955) = 1.3
**Vertical/Smooth
**Tested by mounting 1cmx1cm piece with oil on 4" Si

==F-ICP Backup Recipes (DSEiii)==
These recipes were developed to serve as backup processes for the calibrated [[Fluorine ICP Etcher (PlasmaTherm/SLR Fluorine ICP)|'''Fluorine-ICP''']] SiO2 and Si etches [[Process Group - Process Control Data#PlasmaTherm SLR Fluorine Etcher - Process Control|here]].

[https://wiki.nanofab.ucsb.edu/w/images/b/b3/FICP-DSE_Analogous_Recipes.pdf Click here for SEMs comparing FICP to DSE etch processes].

*'''[[ICP Etching Recipes#Single-Step Low Etch Rate Smooth Sidewall Process (DSEIII)|Si Etch v1 (⭐️Production)]]'''
*'''[[ICP Etching Recipes#SiO2 Etch (DSEiii)|SiO2 Etch v1 (⭐️Production)]]'''

=[[Fluorine ICP Etcher (PlasmaTherm/SLR Fluorine ICP)|PlasmaTherm/SLR Fluorine Etcher]]=

=== Process Tips ===

* Use the Santovac oil for mounting small pieces to Silicon carrier wafers, or else your resist will burn! Increases thermal conduction to the cooled carrier wafer. (Full-wafers instead get direct Helium cooling.) Careful that the oil does not get anywhere near the outer clamp that holds the wafer down, or your wafer will get stuck.
** The oil fully dissolves in Acetone or NMP. You can clean oil off the back by wiping the back of the sample against an ACE-soaked wipe.
* '''[[Process Group - Process Control Data#PlasmaTherm SLR Fluorine Etcher - Process Control|Process Control Data for this tool]]''' - [[Process Group Internships|Intern-run Etches Weekly]], tracked over time.
** SiO2 and Silicon etche performance is regularly tracked.
** This tells you whether the chamber and tool are operating properly before you run your etch.
** You can follow the intern's travelers for details of their etch.

===Recipe Tips===

*RF1: Bias Power (with DCV readback)
*RF2: ICP Power
*For trouble igniting ICP plasma, add 15 to 75 W of bias power during ignition step. Typical ignition pressures 5 to 10 mT.

==Si Etch Recipes (Fluorine ICP Etcher)==
[[File:PRStrip 019 (1).jpg|alt=Example SEM image|thumb|180x180px|Example of 1.65µm Deep Etched Silicon, 2µm Pitch. (Image Credit: Noah Dutra 2024-09)]]
*'''"SiVertHFv2" (⭐️Production)'''
**20mTorr, RF=18W, ICP=950W, C4F8/SF6/CF4=120/48/54sccm
***This recipe has 2x gas flow compared to "'''''SiVertHF'''''" below - this reduced the loading effect (dependence on % etched area).
**Selectivity Silicon:Photoresist ≈ 5
**Etch Rates: Si ≈ 300-350 nm/min; SiO2 ≈ 30-35 nm/min
**89-90 degree etch angle, ie, vertical.
**High selectivity to Al2O3 masks.
***For high aspect ratio Si etching, try [[Atomic Layer Deposition (Oxford FlexAL)|ALD]] [[Atomic Layer Deposition Recipes#Al2O3 deposition .28ALD CHAMBER 3.29|Al2O3]] (~20-30nm) + [[Atomic Layer Deposition Recipes#SiO2 deposition .28ALD CHAMBER 3.29|SiO2]] (2nm, for PR adhesion) hardmasks followed by [https://wiki.nanotech.ucsb.edu/w/index.php?title=ICP_Etching_Recipes#Al2O3_Etching_.28Panasonic_2.29 Pan2 Al2O3 etch] (will go straight through the thin SiO2 without additional etch time). Works well for allowing thin PR's (eg. [[Stepper 3 (ASML)|DUV]] or [[E-Beam Lithography System (JEOL JBX-6300FS)|EBL]] PR's) to enable deep etches.
**[[ICP Etching Recipes#Process Control: Si Etching C4F8/SF6/CF4 (Fluorine ICP Etcher)|Process Control Data below]] - Staff/Intern-run Etches Weekly, tracked over time (with no BARC layer).
*Old Recipe: [//wiki.nanotech.ucsb.edu/wiki/images/b/b8/SLR_-_SiVertHF.pdf SiVertHF] - Si Vertical Etch using C4F8/SF6/CF4 and resist mask

===Process Notes/Observations===

*Due to high selectivity against SiO2, it may be necessary to run a ~10sec 50W SiO2 etch (below) to remove native oxide on Si. This can be performed ''in situ'' before the Si etch. It's possible this is actually an effect of photoresist open-area - we have conflicting results.
**If you see very low etch rates, try the above SiO2 etch, or try a short [[ICP Etching Recipes#PR/BARC Etch (Fluorine ICP Etcher)|PR/BARC etch]].
*We have observed that full-wafers with small open area in ''photoresist masks'' might require a recalibration of the C4F8/SF6 ratio in order to prevent very low etch rates.

=== Process Control: Si Etching C4F8/SF6/CF4 (Fluorine ICP Etcher) ===
[[File:FICP-Si.png|alt=example of Process Control Charts|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281]]''Full Wafer Si etching with ~50% open area and resist mask, run weekly by [[Process Group Interns|NanoFab Interns]].''

*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=0#gid=0 Si Etching with C4F8/SF6/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/CF4 - '''Plots''']

==SiO2 Etch Recipes (Fluorine ICP Etcher)==
[[File:FL-ICP_50W_SiO2_etch_with_Ru_Hard_Mask.png|alt=SEM of FL-ICP 50W SiO2 etch with Ru Hard Mask|thumb|266x266px|50W SiO2 Etch w/ Ru Hardmask]]
[[File:FL-ICP_200W_SiO2_Etch_with_Ru_Hardmask_-_Ning_Cao.png|alt=SEM of FL-ICP 200W SiO2 Etch with Ru Hardmask - Ning Cao|thumb|266x266px|200W SiO2 Etch w/ Ru Hardmask (Ning Cao)]]
*'''"SiO2 Etch-50W" (⭐️Production)'''
**3.8mT, RF=50W, ICP=900W, CHF3/CF4=10/30sccm
**SiO2 etch rate: ~250nm/min
**Selectivity SiO2:Photoresist ≈ 1.10–1.20
**Selectivity SiO2:Ru ≈ 36
**[[ICP Etching Recipes#SiO2 Etching with CHF3/CF4 (Fluorine ICP Etcher)|Process Control Data Above]] - Staff/Intern-run Etches Weekly, tracked over time.

=== [//wiki.nanotech.ucsb.edu/w/images/f/f6/SiO2_Etch%2C_Ru_HardMask_-_Fluorine_ICP_Etch_Process_-_Ning_Cao_2019-06.pdf SiO2 Etching using Ruthenium Hardmask] ===

* Click above for [http://wiki.nanotech.ucsb.edu/w/images/f/f6/SiO2_Etch%2C_Ru_HardMask_-_Fluorine_ICP_Etch_Process_-_Ning_Cao_2019-06.pdf Full Process Traveler]
** Process written for Sputtered Ru & I-Line GCA Stepper litho
** Can be transferred to ALD Ru or DUV/EBL Litho.

*''Ning Cao & Bill Mitchell, 2019-06''
*''High-selectivity and deep etching using sputtered Ru hardmask and I-Line litho.''
*''Etch also works well with PR masking''
*''Chemistry: CHF3/CF4''
*''Variations in SiO2 etch Bias Power: 50 / 200 / 400W bias.''
*Ru etch selectivity to PR: 0.18 (less than 1): 150nm Ru / 800nm PR
*50W Bias: ('''recommended''')
**Selectivity to photoresist: 1.10–1.20
**SiO2 selectivity to Ru: 36
**SiO2 etch rate: 263nm/min
**''Smoothest vertical etch for SiO2.''
*200W Bias: (higher etch rate)
**SiO2 selectivity to Ru: 38
**SiO2 etch rate: 471nm/min
*This etch is detailed in the following article: [[Template:Publications#Highly Selective and Vertical Etch of Silicon Dioxide using Ruthenium Films as an Etch Mask|W.J. Mitchell ''et al.'', JVST-A, May 2021]]
*Updates: Many users have found that SiO2-masking the Ru hardmask results in vastly improved photoresist selectivity, making litho+etch of small features much better.
**Layer stack looks like: SiO2 (or other dielectric target layer to etch) / Ru hardmask / SiO2 hardmask (thin) / Photoresist.
**Typically strip the masks+PR with all dry etching. That means the entire etch process (all etches and strips) can be run ''in situ'' on the Panasonic ICP in a rapid single-tool etch process.
===Process Control: SiO2 Etching with CHF3/CF4 (Fluorine ICP Etcher)===
[[File:FL-ICP Process Control Data Example.jpg|alt=example of Process Control Charts|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281]]''Full Wafer Si etching with ~50% open area and resist mask, run weekly by [[Process Group Interns|NanoFab Interns]].''
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit?usp=sharing SiO2 Etching with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 SiO2 Etching with CHF3/CF4 - '''Plots''']

==Si3N4 Etching (Fluorine ICP Etcher)==
<code>Developed by Bill Mitchell. Please see [[Frequently Asked Questions#Publications acknowledging the Nanofab|publication policy]].</code>

*ICP = 950/75W
*Pressure = 5mT
*Low Polymer Dep: CF4 = 60sccm
**Etch Rate = 420nm/min (PECVD Si3N4)
*Higher verticality: CF4 = 35 / CHF3 = 25 sccm
**Etch Rate = 380nm/min (PECVD Si3N4)

==Photoresist & ARC (Fluorine ICP Etcher)==
Chain multiple Recipes in a Flow, to allow you to to do ''in situ'' BARC etching, and follow up with ''in situ'' Photoresist Strip.

===PR/BARC Etch (Fluorine ICP Etcher)===
[[File:SEM Image.png|thumb|New PR Strip recipe: Wafer had UV6 or UVN30 as mask. 5min Si etch followed by '''PostBARC Etch/PR Strip (STD)_V2''' with 2min over etch (Credit: [[Gopikrishnan G M|Gopi Meena]])]]
[[File:SEM Image of wafer after PR strip.png|thumb|294x294px|Old PR strip recipe: Wafer had UV6 or UVN30 as mask. 5min Si etch followed by '''PostBARC Etch/PR Strip (STD)''' with 2min over etch (Credit: [[Gopikrishnan G M|Gopi Meena]])]]
*Etching [[Stepper Recipes#DUV-42P|DUV42P-6]] Bottom Anti-Reflection Coating
**~60nm thick (2500krpm)
**O2=20sccm / 10mT / RF1(bias)=100W / RF2(icp)=0W
**45sec-1min

=== Photoresist Strip/Polymer Removal (Fluorine ICP Etcher) ===
'''Old''' PR strip recipe: '''PostBARC Etch/PR Strip (STD)'''
*O2=100sccm / 5mT / RF1(bias)=10W / RF2(icp)=825W
*75W Bias can be helpful for difficult to remove polymers, eg. 2min
*Use laser monitor to check for complete removal, overetch to remove Fluorocarbon polymers.
*Not able to completely remove PR (both negative & positive) after prolonged over etching (over etching of +2min)
*Leaves behind residue on the sides

'''New''' PR strip recipe: '''PostBARC Etch/PR Strip (STD)_V2'''
*O2=100sccm / 5mT / RF1(bias)=100W / RF2(icp)=825W
*RF bias increased by 10x to 100W
*Able to completely remove PR (both negative & positive) after over etching (over etching of +2min)
*Clean surface with no residue

==Cleaning Procedures (Fluorine ICP Etcher)==

* [https://wiki.nanotech.ucsb.edu/w/images/6/69/Cleaning_Rules_for_Fluorine_ICP_Etch_tool.pdf '''Cleaning Rules'''] - for various etches. All cleans are O2 plasma.

=[[ICP Etch 1 (Panasonic E646V)]]=
'''Panasonic ICP#1 is currently down -''' Use Panasonic ICP#2 instead. Most processes directly transfer with only small change in etch rate. Data kept here for historical purposes only.

==SiO2 Etching (Panasonic 1)==

===Recipes===

*[//wiki.nanotech.ucsb.edu/wiki/images/3/3e/Panasonic1-SiO-Etch.pdf SiO2 Vertical Etch Recipe Parameters - CHF3 "SiOVert"]
**Etch rate ≈ 2300Å/min (users must calibrate)
**Selectivity (SiO2:Photoresist) ≈ greater than 1:1 (users must calibrate)

===Recipe Variations===
''Use these to determine how each etch parameter affects the process.''

*[//wiki.nanotech.ucsb.edu/wiki/images/5/5e/Panasonic1-SiO2-Data-Process-Variation-CHF3-revA.pdf SiO2 CHF3 Etch Variations] - CHF3 with varying Bias and Pressure & Slanted SiO2 etching

==SiNx Etching (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/c/ce/Panasonic1-SiN-Etch-Plasma-CF4-O2-ICP-revA.pdf SiNx Etch Rates and Variations - CF4-O2]

==Al Etch (Panasonic 1)==

*[https://wiki.nanotech.ucsb.edu/wiki/images/3/3b/Panasonic-1-Al-Etch-RevA.pdf Al Etch Recipes - Cl2BCl3]
*[https://wiki.nanotech.ucsb.edu/wiki/images/6/60/32-Reducing_AlCl3_Corrosion_with_CHF3_plasma.pdf AlCl3 Erosion Issue and the Solution]

==Cr Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/8/88/Panasonic-1-Cr-Etch-revA.pdf Cr Etch Recipes - Cl2O2]

==Ta Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/f/f2/104_Ta_Etch.pdf Ta Etch Recipe] - Cl2/BCl3

==Ti Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/4/47/Panasonic-1-Ti-Etch-Deep-RevA.pdf Ti Deep Etch Recipes - Cl2Ar]
**See [[doi:10.1149/1.2006647|E. Parker, ''et. al.'' Jnl. Electrochem. Soc., 152 (10) C675-C683 2005]].

==W-TiW Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/7/76/Panasonic1-TiW-W-Etch-Plasma-RIE-RevA.pdf Ti-TiW Etch Recipes - SF6Ar]

==GaAs-AlGaAs Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/b/bb/Panasonic1-GaAs-PhotonicCrystal-RIE-Plasma-Nanoscale-Etch-RevA.pdf GaAs-Nanoscale Etch Recipe - PR mask - Cl2-BCl3-Ar]
*[//wiki.nanotech.ucsb.edu/wiki/images/2/26/12-Plasma_Etching_of_AlGaAs-Panasonic_ICP-1-Etcher.pdf AlGaAs Etch Recipes - Cl2N2]
*[//wiki.nanotech.ucsb.edu/wiki/images/0/04/Panasonic1-GaAs-Via-Etch-Plasma-RIE-Fast-DRIE-RevA.pdf GaAs DRIE via Etch Recipes - Cl2-BCl3-Ar PR passivation]

==GaN Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/d/d6/07-GaN_Etch-Panasonic-ICP-1.pdf GaN Etch Recipes Cl2N2]
*[//wiki.nanotech.ucsb.edu/wiki/images/6/60/Panasonic1-GaN-AlGaN-Selective-Etch-Plasma-RIE-ICP-RevA.pdf GaN Selective Etch over AlGaN Recipes BCl3-SF6]

==Photoresist and ARC Etching (Panasonic 1)==
[https://wiki.nanotech.ucsb.edu/w/index.php?title=ICP_Etching_Recipes#Photoresist_and_ARC_etching_.28Panasonic_2.29 Please see the recipes for Panasonic ICP#2] - the same recipes apply.

Etching of DUV42P at standard spin/bake parameters also completes in 45 seconds.

==SiC Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/d/d0/Panasonic_1-SiC-ICP-RIE-Etch-Plasma-SF6-RevA.pdf SiC Etch Recipes Ni Mask - SF6]

==Sapphire Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/3/3a/Panasonic1-sapphire-etch-RIE-Plasma-BCl3-ICP-RevA.pdf Sapphire Etch Recipes Ni and PR Mask - BCl3-Cl2]

==Cleaning Recipes==
'''''To Be Added'''''

==Old Deleted Recipes==
Since there are a limited number of recipe slots on the tool, we occasionally have to delete old, unused recipes.

If you need to free up a recipe slot, please contact the [[ICP Etch 1 (Panasonic E626I)|tool's Supervisor]] and they'll help you find an old recipe to replace. We take photographs of old recipes, and save them in case a group needs to revive the recipe. Contact us if your old recipe went missing.

==Process Control Data (Panasonic 1)==

===SiO2 Etch with CHF3/CF4 - Process Control Data (Panasonic 1)===

*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP1 Process Control Data Example.jpg|alt=example chart of ICP1 SiO2 Process Control Chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281]]

=[[ICP Etch 2 (Panasonic E626I)]]=
Recipes starting points for materials without processes listed can be obtained from Panasonic1 recipe files. The chambers are slightly different, but essentially the same, requiring only small program changes to obtain similar results.

=== Process Tips ===

* Use the Santovac oil for mounting small pieces to Silicon carrier wafers, or else your resist will burn! Increases thermal conduction to the cooled carrier wafer. (Full-wafers instead get direct Helium cooling.) Careful that the oil does not get on the ''back'' of the carrier wafer or you will get Helium cooling errors.
** The oil fully dissolves in Acetone or NMP. You can clean oil off the back by wiping the back of the sample against an ACE-soaked wipe.
* See the '''Process Control sections below''' - [[Process Group Interns|NanoFab Interns]] run Etches Weekly, tracked over time.
** This tells you whether the chamber and tool are operating properly before you run your etch.
** You can follow the intern's travelers for details of their etch, and see their SEM's.

==Al Etch (Panasonic 2)==

*[https://wiki.nanotech.ucsb.edu/wiki/images/3/3b/Panasonic-1-Al-Etch-RevA.pdf Al Etch Recipes - use panasonic 1 parameters, etch rate 50% higher]

==Al2O3 Etching (Panasonic 2)==
[//wiki.nanotech.ucsb.edu/wiki/images/d/d2/Brian_Markman_-_Al2O3_ICP2_Etch_Rates_2018.pdf ALD Al2O3 Etch Rates in BCl3 Chemistry] (click for plots of etch rate)

''Contributed by Brian Markman, 2018''

*BCl3 = 30sccm
*Pressure = 0.50 Pa
*ICP Source RF = 500
*Bias RF = 50W or 250W (250W can burn PR)
*Cooling He Flow/Pressure = 15.0 sccm / 400 Pa
*Etch Rate 50W: 39.6nm/min (0.66nm/sec)
*Etch Rate 250W: 60.0nm/min (1.0 nm/sec)

== Cr Etching (Panasonic 2) ==

* Cl2=48, O2=12sccm, 1.33Pa, ICP=600W, RF=50W
** Recipe #154 (please revert when done)
* Handles larger area etching with less loading effect
* Etch Rate: 24–33 nm/min
* Use PR mask. selectivity not measured but ~500nm PR works easily for etching ~85nm Cr.
* Strip PR in O2 plasma (in situ optional): [[ICP Etching Recipes#Photoresist Etch/Strip (Panasonic 2)|Photoresist Etch/Strip (Panasonic 2)]]
* [[Laser Etch Monitoring|Laser Monitor]] recommended

==GaAs Etch (Panasonic 2)==

*GaAs Etch Cal - ''Noah Dutra & Fatt Foong, 2025-02-12''
**Etch Rates ~1um/min, Selectivity to SiO2 ~ 27:1, Sidewalls ~ 90°
**Etch Rate/Selectivity [https://wiki.nanofab.ucsb.edu/w/images/7/76/GaAs_pressure_experiment.png highly sensitive to pressure] (image credit: Terry Guerrero)
**Cal Sample: ~1cm sample etched mounted with oil onto 150mm Si carrier
**Recipe: 0.5Pa, 100/900W, N2/Cl2=10/20sccm
*[//wiki.nanotech.ucsb.edu/wiki/images/f/ff/16-GaAs_etch-ICP-2.pdf Non-Calibration GaAs Etch Recipes - Panasonic 2 - Cl2N2]

===Process Control: GaAs Etch with N2/Cl2 (Panasonic 2)===
[[File:GaAs Etch ICP2 SPC.png|alt=example ICP2 process control chart|thumb|249x249px|[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts] for GaAs etching.|link=https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281]]
*[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=0#gid=0 GaAs Etch with N2/Cl2 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 GaAs Etch with N2/Cl2 - '''Plots''']

==Photoresist and ARC etching (Panasonic 2)==
Basic recipes for etching photoresist and Bottom Anti-Reflection Coating (BARC) underlayers are as follows:

===ARC Etching: DUV-42P or AR6 (Panasonic 2)===

*O2 = 40 sccm // 0.5 Pa
*ICP = 75W // RF = 75W
*45 sec for full etching (incl. overetch) of ~60nm [[Stepper Recipes#DUV-42P-6|DUV-42P]] (same as for AR6; 2018-2019, [[Demis D. John|Demis]]/[[Brian Thibeault|BrianT]])

===Photoresist Etch/Strip (Panasonic 2)===
Works very well for photoresist stripping

*O2 = 40 sccm // 1.0 Pa
*ICP = 350W // RF = 100W
*Etch Rate for UV6-0.8 (DUV PR) = 518.5nm / 1min (2019, [[Demis D. John|Demis]])
*2m30sec to fully remove UV6-0.8 with ~200% overetch (2019, [[Demis D. John|Demis]])
*Recipe #152 (Please revert when done)

==Ru (Ruthenium) Etch (Panasonic 2)==

*[https://wiki.nanotech.ucsb.edu/wiki/images/e/e9/194_Ru_Etch_O2%2CCl2.pdf Ru Etch] - ''[[Bill Mitchell]] 2019-09-19''
**''This etch is used in the following publication:'' [[Template:Publications#Highly Selective and Vertical Etch of Silicon Dioxide using Ruthenium Films as an Etch Mask|W.J. Mitchell, "Highly Selective and Vertical Etch of Silicon Dioxide using Ruthenium Films as an Etch Mask" (JVST-A, 2021)]]

==SiO2 Etching (Panasonic 2)==

===Recipes===

*[//wiki.nanotech.ucsb.edu/wiki/images/9/9e/33-Etching_SiO2_with_Vertical_Side-wall.pdf SiO2 Vertical Etch Recipe#2 - CF4/CHF3]
**''This etch is used in our Process Control weekly cals run by [[Process Group Interns|NanoFab Interns]]. Very stable over time ±5%.''
*[//wiki.nanotech.ucsb.edu/wiki/images/1/1e/Panasonic2-ICP-Plasma-Etch-SiO2-nanoscale-rev1.pdf SiO2 Nanoscale Etch Recipe - CHF3/O2]
*[//wiki.nanotech.ucsb.edu/wiki/images/d/d5/Panasonic2-SiOx-Recipe.pdf SiO2 Vertical Etch Recipe - CHF3 "SiOVert"]
**Direct copy of "SiOVert" from ICP#1, [[ICP_Etching_Recipes#SiO2_Etching_.28Panasonic_1.29|see parameters there]].

===Recipe Variations===
''Use these to determine how etch parameters affect the process.''

*[https://wiki.nanotech.ucsb.edu/wiki/images/1/1e/05-SiO2_Nano-structure_Etch.pdf Angled SiO2 sidewall recipes]

===Process Control: SiO2 Etch with CHF3/CF4 (Panasonic 2)===
[[File:ICP2 Process Control Data Example.jpg|alt=example ICP2 process control chart|thumb|269x269px|[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 Click for Process Control Charts] for SiO2 etching.|link=https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281]]''Weekly cal etches of the CF4/CHF3 SiO2 etch, run by [[Process Group Interns|NanoFab Interns]].''
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots''']

==SiNx Etching (Panasonic 2)==

*[//wiki.nanotech.ucsb.edu/wiki/images/0/06/Panasonic2-ICP-Plasma-Etch-SiN-nanoscale-rev1.pdf SiNx Nanoscale Etch Recipe - CHF3/O2]

=[[Oxford ICP Etcher (PlasmaPro 100 Cobra)]]=

=== Process Tips ===
* Use the Santovac oil for mounting small pieces to Silicon carrier wafers, or else your resist will burn! Increases thermal conduction to the cooled carrier wafer. (Full-wafers instead get direct Helium cooling.) Careful that the oil does not get anywhere near the outer clamp that holds the wafer down, or your wafer will get stuck.
** The oil fully dissolves in Acetone or NMP. You can clean oil off the back by wiping the back of the sample against an ACE-soaked wipe.
* InP requires fairly high temperatures for making the Indium products volatile - so going to full-wafers (which are cooler) may requiring the table temperature. We have found that temperatures of ~150⁰C minimum may be required for preventing grassing etc.
* See the '''Process Control sections below''' - [[Process Group Interns|NanoFab Interns]] run Etches Weekly, tracked over time.
** This tells you whether the chamber and tool are operating properly before you run your etch.
** You can follow the intern's travelers for details of their etch.

==InP Ridge Etch (Oxford ICP Etcher)==
===High-Temp (200°C) InP Etch Process===

*InP Ridge Etch 200°C - ''Noah Dutra & Fatt Foong, 2025-08-12''
**Etch rates ~2 um/min, Selectivity to SiO2 ~ 30:1, Sidewalls ~90°
**Very dependent on open area, more area => lower E.R.s
**Cal Sample: ~1cm sample etched with 1 quarter of blank 50mm InP seasoning wafer placed '''without''' mounting adhesive on blank Silicon carriers (rough side up).
**Recipe: Cl2/H2/Ar - 200°C

==== Process Control: High-Temp (200°C) InP Etch ====
[[File:200C InP.png|alt=example SPC chart for Oxford ICP Etcher|thumb|218x218px|[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts] for 200°C InP Etch|link=https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281]]''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/H2/Ar @ 200°C, 1cm piece with ~50% SiO2 hardmask.''
*[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Plots''']

===Low-Temp (60°C) InP Etch Process===
*[[Media:Oxford Etcher - InP Ridge Etch using Oxford PlasmaPro 100 Cobra - 2021-09-08.pdf|Low-Temp InP Ridge Etch Characterization]] - ''Ning Cao, 2021-09-08''
**''No longer calibrating 60°C process as of 05-2025''.
**InP etches were characterized with '''no''' mounting adhesive used, 1/4-wafer of 50mm wafer placed on blank Silicon carriers (rough side up).
**Recipe: Cl2/CH4/H2 - 60°C
**NOTE: Rates in these 2021-09 characterizations are lower than current due to a software timing bug, fixed in 2022-01
*See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning.

==== Process Control: Low-Temp (60°C) InP Etch ====
[[File:Oxford-ICP-Etch Process Control Data Example.jpg|alt=example SPC chart for Oxford ICP Etcher|thumb|225x225px|[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 Click for Process Control Charts] for 60°C InP Etch|link=https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281]]
2025-08-12: No longer run as weekly cal process, replaced by above 200°C Cl2/H2/Ar etch. Data below is for historical purposes only.
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/CH4/H2 @ 60°C, 1cm piece with ~50% SiO2 hardmask.''

*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?usp=sharing "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Plots''']

====[[Oxford Etcher - Sample Size Effect on Etch Rate|Sample Size effect on Etch Rate]]====
''See the above table for data showing effect on sample size/exposed etched area.''

==InP Grating Etch (Oxford ICP Etcher)==

*[[Media:Oxford Etcher - InP Grating Etch at 20 C - Oxford Cobra 300 2021-08-26.pdf|InP/InGaAsP Grating Etch Characterization]] - ''Ning Cao, 2021-08-26''
**InP/InGaAsP etches were characterized with '''no''' mounting adhesive used, 1/4-wafer of 50mm wafer placed on Silicon carriers (rough side up).
**Recipe: Cl2/CH4/H2/Ar - 20°C
**NOTE: Rates in these 2021-09 characterizations are lower than current due to a software timing bug, fixed in 2022-01
*See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning.

== GaN Etch (Oxford ICP Etcher) ==
*''OLD 4" configuration: [https://drive.google.com/file/d/1B-Xg254T-RdALisnms0jvpJQ34i5TNXN/view?usp=drive_link Std GaN Etch - BCl3/Cl2/Ar - 200C Etch Characterization] - G.G.Meena, 2024-11-01''
**Etches characterized on ~1cmx1cm die, on 4<nowiki>''</nowiki> Si carrier wafer. Die has a SiN hard mask.
**Also includes explanation of the Taguchi (L9) DOE method for learning how process variables interact.
**[https://docs.google.com/spreadsheets/d/1QELHE6VUgq-xIfwIE50ddnsDtm7yfiOM/edit?usp=drive_link&ouid=103527106727572807737&rtpof=true&sd=true Etch development traveler with detailed characterization data]
**See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning.

==== Process Control: GaN Etch ====
CURRENT Recipe: ''6" STD GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm with 6" configuration, ''~850nm deep GaN Etch with Cl2/BCl3/Ar at 200°C. GaN-on-Sapphire substrate with SiN mask.''

* This recipe is the same as the 4" (old) Std recipe but with 140% flows. Current recipe is 200c, 4.5mT, 700W/50W, Cl2/Ar/BCl3 = 49.1/16.4/11.6sccm.

* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 CURRENT 6" configuration: GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 CURRENT 6" configuration: GaN Etching with Cl2/BCl3/Ar at 200°C - Plots]

[[File:GaN SPC.png|alt=example of Process Control Charts|thumb|[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 Click for Process Control Charts] for GaN Etch|link=https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279|219x219px]]OLD Recipe: ''Std GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm with 4" configuration, ''~1.2µm deep GaN etch with Cl2/BCl3/Ar at 200°C.'' ''GaN-on-Sapphire substrate with SiN mask.''
*[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 OLD 4" configuration: GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
*[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 OLD 4" configuration: GaN Etching with Cl2/BCl3/Ar at 200°C - Plots]
==GaAs Etch (Oxford ICP Etcher)==
*''[https://drive.google.com/file/d/1Q4pmX5M9v9dCD1xOg74kYguV12Szh9be/view?usp=drive_link Std GaAs Etch - BCl3/Ar - 20C Etch Characterization] - G.G.Meena, 2025-01-09''
**Etch characterization on 1cmx1cm die, on 4<nowiki>''</nowiki> Si carrier wafer. Die has SiO hard mask
**Also tested etch with PR mask.
**See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning
*''[https://wiki.nanofab.ucsb.edu/w/images/d/d1/GaAs_Etch_Ver3_Recipe_Finalized_120925.pdf Std GaAs Etch - Cl2/N2 - 30C Etch Characterization] - F. Foong, 2025-12-10''
**Etch characterization on 1cmx1cm die, on 4<nowiki>''</nowiki> Si carrier wafer. Die has SiO hard mask
**See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning

==GaN Atomic Layer Etching (Oxford ICP Etcher)==
''GaN-ALE Recipe written and tested by users - contact [[Tony Bosch|supervisor]] for use.''

==Cleaning Recipes (Oxford ICP Etcher)==
'''''To Be Added: Required cleaning time & recipes'''''

Process Group - Process Control Data

2026-09-21T19:44:35Z

John d: /* Ion Beam Sputter Deposition (Veeco Nexus) - Process Control */ fixed old data link

Process Control Data are standardized processes, run by the NanoFab, allowing for day-to-day or year-by-year comparisons of a tool's performance at the process level. This is similar [https://en.wikipedia.org/wiki/Statistical_process_control Statistical Process Control (SPC)].

These are the same links are found on individual tool pages, in the '''''<<tool page>> > Process Control''''' section.

__TOC__

Data are collected by our [https://nanofab.ucsb.edu/workforce#internships Process Group Interns] and reviewed by [[Staff List#Process Group|Process Group Staff]].
=Deposition, Dielectric (Process Control Data)=
[[File:PECVD SPC Chart Example.png|alt=SPC chart example|thumb|228x228px|Example Process Control Charts (SPC) for thin-film DepCals.|link=]]
[[File:Surfscan 230113A7G2 after low particles.jpg|alt=screenshot of surfscan particle count|thumb|205x205px|Example particle counts taken on each tool+film.|link=]]
[[File:PECVD1 SiO2 F50 WaferMap example.jpg|alt=Screenshot of Filmetrics F50 wafermap of typical DepCals film|thumb|215x215px|Example of DepCals Thickness/Refractive Index uniformity measurement (4% shown here).|link=]]
''Process Control data for various deposition tools in the lab.''

==[[PECVD Recipes#PECVD 1 .28PlasmaTherm 790.29|PECVD #1 (PlasmaTherm 790)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=1270764394 PECVD#1: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=0 PECVD#1: SiO2]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=98787450 PECVD#1: Si3N4]

==[[PECVD Recipes#PECVD 2 .28Advanced Vacuum.29|PECVD #2 (Advanced Vacuum)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=272916741 PECVD#2: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=1313651154 PECVD#2: SiO2]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=773875841 PECVD#2: Si3N4]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=584923738 PECVD#2: Low-Stress Si3N4]
**[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=203400760 Plots of Low-Stress Si3N4 Data]

==[[PECVD Recipes#ICP-PECVD .28Unaxis VLR.29|ICP-PECVD (Unaxis VLR Dep)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948 ICP-PECVD: Plots of SiO2 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=345725577 ICP-PECVD: Plots of Si3N4 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=0 ICP-PECVD: SiO2 Low-Dep Rate (LDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1459210138 ICP-PECVD: SiO2 High-Dep Rate (HDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1670372499 ICP-PECVD: Si3N4]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1517031044 ICP-PECVD: Si3N4 Low-Stress]

==[[Sputtering Recipes#Ion Beam Deposition .28Veeco NEXUS.29|Ion Beam Sputter Deposition (Veeco Nexus)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=2030038046 IBD: Plots of all data]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=0 IBD: SiO2]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=971672318 IBD: Si3N4]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=855566098 IBD: Ta2O5]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=713133870 IBD: Al2O3]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=834404663 IBD: TiO2]

===Old Data (Pre 2022)===
Old data in a different format can be found below:

*[[Old Deposition Data - 2021-12-15#Ion Beam Deposition (Veeco NEXUS)|Old Deposition Data - 2021-12-15]]

<hr style="height:5px">
<hr style="height:5px">
=Deposition, Metal - Process Control Data=
''Process Control data for various deposition tools in the lab.''

== [[Sputter 5 (AJA ATC 2200-V)]] - Process Control ==
[[File:Process Control - Sputter 5 Titanium Sheet Resistance plot.png|alt=Screenshot of Sputter 5 Titanium Sheet Resistance process control chart|thumb|Sputter 5 Titanium - Sheet Resistance - Process Control Chart - '''Example''' data only.

← click a link for live data.|link=]]

=== Sputter 5: Ti ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=695635057#gid=695635057 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Titanium Plots]

=== Sputter 5: Al ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=0#gid=0 Aluminum Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Aluminum Plots]

=== Sputter 5: Cr ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=572205583#gid=572205583 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Chromium Plots]

== [[E-Beam 4 (CHA)]] - Process Control ==
[[File:Process Control - E-Beam 4 Titanium Stress plot.png|alt=Screenshot of E-Beam 4 Titanium Stress - process control chart|thumb|E-Beam 4 Titanium Stress - Process Control Chart. '''Example''' data only -

← click a link for live data.|link=]]

=== E-Beam 4: Ti ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=384597990#gid=384597990 Titanium Plots]

=== E-Beam 4: Au ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=834604706#gid=834604706 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=721807140#gid=721807140 Gold Plots]

=== E-Beam 4: Cr ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1629968393#gid=1629968393 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=701729811#gid=701729811 Chromium Plots]

=== E-Beam 4: Ni ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=649905488#gid=649905488 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1525197973#gid=1525197973 Nickel Plots]

== [[E-Beam 1 (Sharon)]] - Process Control ==

=== E-Beam 1: Ti ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1305007052#gid=1305007052 Titanium Plots]

=== E-Beam 1: Au ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1762267354#gid=1762267354 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1245613525#gid=1245613525 Gold Plots]

=== E-Beam 1: Cr ===
*[https://wiki.nanofab.ucsb.edu/wiki/Process_Group_-_Process_Control_Data?veaction=edit&section=7 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=424169133#gid=424169133 Chromium Plots]

=== E-Beam 1: Ni ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=679240351#gid=679240351 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1463522927#gid=1463522927 Nickel Plots]

<hr style="height:5px">
<hr style="height:5px">
=Etching (Process Control Data)=
''Process Control data for various dry etching tools in the lab.''

==[[ICP Etching Recipes#Process Control Data .28Fluorine ICP Etcher.29|PlasmaTherm SLR Fluorine Etcher]] - Process Control==

=== SiO2 Etching (FL-ICP Process Control) ===
''We have found that SiO2 etching is fairly insensitive to chamber condition.''
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit?usp=sharing SiO2 Etching with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 SiO2 Etching with CHF3/CF4 - '''Plots'''][[File:FL-ICP Process Control Data Example.jpg|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281]]

====Old SiO2 Process Control Data====

*[[Test Data of Etching SiO2 with CHF3/CF4-Fluorine ICP Etcher|SiO2 Etching with CHF3/CF4 (FL-ICP]]) - ''No data prior to 2023-01-20''

=== Si Etching (FL-ICP Process Control) ===
''This Si etch is much more sensitive to chamber condition, allowing us to detect tool issues faster.''

*'''Recipe: [[ICP Etching Recipes#Si Etch Recipes (Fluorine ICP Etcher)|SiVertHFv2]]''' - C4F8/SF6/CF4 etch of 100mm Silicon Wafer with ~50% open area and resist mask

*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=0#gid=0 Si Etching with C4F8/SF6/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/CF4 - '''Plots'''][[File:FICP-Si.png|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281]]
==[[ICP Etching Recipes#Process Control Data .28Panasonic 1.29|Panasonic ICP #1]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP1 Process Control Data Example.jpg|alt=example chart of ICP1 SiO2 Process Control Chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4-ICP1|SiO2 Etch with CHF3/CF4 (Panasonic 1)]] - ''No data prior to 2023-01-20''

== [[ICP Etching Recipes#Process Control Data .28Panasonic 2.29|Panasonic ICP#2]] - Process Control ==

=== GaAs Etch with N2/Cl2 - Process Control Data (Panasonic 2) ===

* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=0#gid=0 GaAs Etch with N2/Cl2 - '''Etch Data''']
* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 GaAs Etch with N2/Cl2 - '''Plots'''][[File:GaAs_Etch_ICP2_SPC.png|link=https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281|alt=example ICP2 process control chart|none|thumb|249x249px|[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]]]

=== SiO2 Etch with CHF3/CF4 - Process Control Data (Panasonic 2) ===

*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP2 Process Control Data Example.jpg|alt=example ICP2 process control chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4|SiO2 Etching with CHF3/CF4 - ICP2]] - ''No data prior to 2023-01-20''

==[[ICP Etching Recipes#Process Control Data .28Unaxis VLR.29|Unaxis VLR Etch]] - Process Control==

*[[Unaxis VLR Etch - Process Control Data|InP Etching with Cl2/H/Ar @ 200°C - Unaxis Etch]]

==[[ICP Etching Recipes#Process Control Data .28Oxford ICP Etcher.29|Oxford PlasmaPro Cobra Etcher]] - Process Control==

=== Std InP Ridge Etch Cl2/H2/Ar/200°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/H2/Ar @ 200°C, 1cm piece with ~50% SiO2 hardmask.''

* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Etch Data Tables''']
* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Plots''']
[[File:200C InP.png|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281]]

=== Std InP Ridge Etch: Cl2/CH4/H2/60°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/CH4/H2 @ 60°C, 1cm piece with ~50% SiO2 hardmask. No longer calibrating this recipe.''

*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=1552080791#gid=1552080791 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Plots'''][[File:Oxford-ICP-Etch Process Control Data Example.jpg|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281]]

====Old InP Ridge Etch Data====

*[[Oxford ICP Etcher - Process Control Data|InP Ridge Etch with Cl2/CH4/H2 @ 60°C]] - ''No data prior to 2023-01-20''

=== GaN Etch (Cl2/BCl3/Ar/200°C) ===
Recipe: ''Std GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm ''~1.2µm deep GaN etch with Cl2/BCl3/Ar at 200°C.'' Sapphire substrate with SiO2 mask for GaN.

* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 GaN Etching with Cl2/BCl3/Ar at 200°C - Plots][[File:GaN SPC.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279]]
<hr style="height:5px">
<hr style="height:5px">

== [[DSEIII (PlasmaTherm/Deep Silicon Etcher)|PlasmaTherm DSEIII Deep Silicon Etcher]] - Process Control ==

=== Si Bosch Etching C4F8/SF6/Ar ===
*Recipe: ''STD_Bosch_Si (⭐️Production),'' on 100mm Si Wafer with ~50% open area, photoresist mask, ~40µm deep

*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=0#gid=0 Si Etching with C4F8/SF6/Ar - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/Ar - '''Plots'''][[File:DSE plot.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281]]
<hr style="height:5px">
<hr style="height:5px">

=Lithography (Process Control Data)=
''Process Control Data for Nanofab Lithography/patterning tools.''

==[[Stepper_Recipes#Stepper_3_.28ASML_DUV.29|Stepper #3 (ASML DUV)]] - Process Control==

*''The Process Group regularly measures data on lithography Critical Dimension ("CD") and Wafer-stage Particulate Contamination for this tool, using a sensitive lithography process that will reveal small changes in Dose repeatability and wafer flatness.''
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 '''Plots of CD Repeatability''']
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 '''Data for CD Uniformity and Particulate Contamination''']

:{|
|[[File:ASML CD Cals - Example Table.jpg|alt=ASML CD Calibration data - Screenshot of Table|none|thumb|300x300px|''Example of Data Table with SEM's of 320nm features. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 Click for full data table.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0]]
|[[File:ASML CD Cals - Example Plot.jpg|alt=ASML CD Calibration Data - Screenshot of SPC Plot|none|thumb|''Example SPC Chart - Measured Critical Dimension "CD" versus Date. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 Click for charts.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281]]
|}

== Maskless Aligner (Heidelberg MLA150) - Process Control ==

* ''The Process Group measures the smallest "clean" line-space pitch (by SEM) at different locations on the wafer, and calls this the "best resolution" for that region of the wafer.'' ''Measured with 0.25µm steps.''
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?usp=drive_link '''Data sheet'''], listing measured values, includes links to travelers & SEM's etc.
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?gid=167054213#gid=167054213 '''Plots''' of "best" resolution across wafer] - chart of resolution vs. time

[[File:MLA LithoCal Chart screenshot.png|alt=MLA LithoCal Chart screenshot|none|thumb|Example SPC Charts for MLA LithoCal "best" resolution. ]]
:

MLA150 - Design Guidelines

2026-09-16T21:14:25Z

John d: /* Reducing Write Time */ added vertical stripe trick

Notes and specifications to help you design your [https://en.wikipedia.org/wiki/Computer-aided_design CAD drawings] for use on the Maskless Aligner, [[Maskless Aligner (Heidelberg MLA150)|Heidelberg MLA150]].

The term ''Convert'' refers to the Unix conversion software used to import your CAD files into the ''MLA150Menu'' software.

==General CAD Guidelines==

*GDS / GDSii is the preferred file format (fewest errors). DXF, CIF, BMP and Gerber are also available.
*Note the Cell that you want to print. Only one Cell may be selected in the software, so use Cell Instancing to create combinations/hierarchy of Cells to print.
*Note the Layer(s) to print. The system can select either a single Layer, or can combine multiple layers via Boolean OR.
*The Origin (0,0) in your file is the reference for all coordinates during exposure, including alignment mark exposure/measurement.
**The Origin is usually placed at the ''Center'' of your wafer/substrate. Autofocus usually initializes at this location, so it's important that it's ''not'' at the edge of your wafer where there is badly formed photoresist/cleaved edges.
*Your file name cannot contain any spaces or special characters except for underscores.
*Make sure the file extension is all lower case (e.g. <code>.gds</code> not <code>.GDS</code>) - some design programs (e.g. Klayout) will create a file with an upper case file extension by default.
*We recommend that your filename starts with your LastnameFirstinitial, similar to job/design names for easy finding later. For example, Demis D. John's GDS files would be named <code>johnd_MyCadDesign_Layer1_v2.gds</code>.

=== Reducing Write Time ===

* If your CAD file has many (eg. thousands/millions) of overlapping polygons, the conversion software can take a long time to process the file. This looks like the tool's write-head writing / pausing / writing / pausing as the tool waits for more data from the computer during the "converting/exposing" operation. You can '''"merge" the polygons''' in KLayout prior to writing to reduce this. We found that a 1hr exposure → 10min with this method!
* Write time approximately scales directly with write area. If you have large areas to expose with small unexposed regions in between consider using a negative PR and an inverted CAD file to reduce write area.
* Since the raster scan does the fast-scan in the Y-axis, and the tool generates vertical "stripes" for each patterning region, if you have large vertical regions with no exposure, you can reduce write time by ensuring there are no objects in those vertical area - the tool will skip those Stripes entirely. Even a small dot in a vertical Stripe area will require the tool to write the entire stripe.

==CAD Design File Specifications==

=== Compatibility with Heidelberg's ''convert'' software ===
We recommend to keep two versions of your CAD design -

# Your "Editable" version that you can easily edit designs with, that keeps your separated Cells, Arrays, PCells such as Text/Circle objects, and possibly is saved in OASIS format.
# An "exposure" version where you make the file compatible with the heidelberg software by:
## Save as <code>*.gds</code> with your name at the start of the filename, eg. <code>johnd_UCSB_device1_L10_v1.gds</code>.
## Convert all PCells to Static Cells,
## Resolve Arrays - especially orthogonal arrays, which cause issues.
## Turn off any options that reduce compatibility, such as "Save cell context info" etc. MLA software has issues with those.
## Optionally ''Flatten'' all objects (removes all Cells) and delete all unused Cells
## Optionally Save ''only'' the Layers to be printed (turn off other layers, and "Save only Visible Layers"). These reduce chances of human-error during the MLA program setup.
## This is the file you'll upload to the MLA for exposure.

===GDS aka. GDSii===

*This is the preferred file format for import into the machine.

*Make note of the "Cell" that you want to print, often called the "top cell" as it can contain a hierarchy of other child/instanced cells.
**This is called "GDS Structure" in the ''Convert'' software.
*Note the Layer to be printed. On the MLA, you can boolean Union (combine) multiple layers, or print only one layer.

===DXF===
Common export format for users of AutoCAD. Export with AutoCAD R12 compatibility.

*DXF files don't define the "units" when exported, so you must type in the designed length units in ''Convert'' software during import. Eg. whether a length of "10" means "10 mm" or "10 µm".
*It is easy for these files to have "open polygons", meaning the ends of the polygon don't attach, preventing the software from calculating the filled-in area to write. You can use L-Edit or KLayout's Design Rule Check automation to try and locate these kinds of errors.
*Make sure to use ''Convert''<nowiki/>'s [Viewer] and the [Measure] tool to make sure the scaling factors are correct.
*Note the Layer to be pri<nowiki/>nted. You can boolean Union (combine) multiple layers, or print only one layer.

===BMP===
The BMP Pixelsizes are shown in the BMP options when importing a file into ''Convert''.

The BMP pixel size can be adjusted to change the scaling of the bmp file. The base pixel size is 40nm per pixel, and can be adjusted up to 4000nm in increments of 40nm (eg. ''pixel size = 40nm, 80nm, 120nm ... 3960nm, 4000nm'').

===CIF===
''To Be Added''

===Gerber===
''To Be Added''

==Alignment Marks==
The system is very versatile, and can align to any feature you like using "Manual Alignment", as long as you know the coordinates of that feature with respect to your CAD file's origin (0,0).

You can use the software to shoot the alignment marks for you, on a first (or other) layer. That method is best for circular wafers that tend to have open, unused areas on the outer edges, perfect for placing an alignment mark (with no die). You can also use the "'''Expose Bitmaps'''" function in the Setup Job screen to have the system expose crosses for you, at coordinates that you provide. (Coordinates are always w/r/to your CAD file 0,0 origin.)

You can optionally place the marks directly inside your die.

The system will only need at least 4 marks at different places on the wafer (8 max) for global alignment. Preferably, these should be placed as far apart as possible (for rotation/scaling measurement), and at different quadrants of the wafer (for shearing/orthogonality).

===Automatic Alignment===
Automatic alignment (ie. automatic measuring of the mark, or Field/"Local" Alignment) requires a basic Cross ✚ shape, for example with 20µm line width (10µm to 50µm should work).

The cross extents need to fill the whole camera field of view, which are as follows:
{| class="wikitable"
|+Minimum size of Cross for auto. alignment
!Camera
!Field of View
|-
|Low Res.
|640 x 480 µm
|-
|High Res.
|190 x 140 µm
|}
'''So a cross of 30µm line width, that is 800 x 600µm would be adequate.'''

If your cross does not fill the whole field, you can use the Reduced Detection Area button to make the image detection measure in a smaller area.

=== [[MLA150 - Troubleshooting#Aligning%20to%20a%20quarter-wafer/irregular%20piece|Aligning to a quarter-wafer/irregular piece]] ===
See the above link for how to align to the cleaved edges of an irregular piece.

==High-Resolution Writing==
It has been suggested to use the "CD Bias" (Critical dimension) to reduce your feature sizes during the ''Convert'' process, and then compensate by going to higher exposure doses (widening the features back to original size). If you choose a "-200 nm" CD Bias, then run a Focus-Exposure Array ("Series" in ''MLAMenu''), you will look for the higher/lower doses (depending on photoresist and design polarity) that bring the features back to the original designed sizes.

Overexposing alleviates the stitching boundaries.

==Greyscale Lithography==
Please see the Manual for greyscale options and details.

BMP and DXF are acceptable formats for greyscale lithography. The ''Convert'' program accepts values 0-255 grey levels, although you can run any number of grey-levels from binary (2 levels) up to 256 levels (0-255).

===Limitations & Workarounds===
Greyscale exposure has the following limitations that we have identified:

#'''Alignment - workarounds''':
As of 2024-11, Heidelberg have added alignment capability to Greyscale exposures, but this hasn’t yet been tested by staff. Please let us know if you try this out. - [[Demis D. John|Demis]]
##the native software does not have rotational alignment capabilities implemented for greyscale exposures. To prevent the software from silently failing during greyscale exposure, you must ''DIS''able '''[_]''' '''''Expose with''' '''Substrate Angle''''' and/or '''[_] ''Rotation, Scaling and Shearing''''' during exposure or the software will fail to expose (with no error, exposure will begin but then suddenly stop after a few minutes). Workarounds - read ''both'' of the following before proceeding, as you'll need to combine both methods into your CAD file to implement both X-Y and Rotational alignment:
###X-Y Alignment workaround:
####Identify an alignment mark or other feature on your wafer with known coordinates with respect to your CAD file.
####Set that location in your CAD file to coordinates (0,0). (Recommended: put your entire design into a [[KLayout Design Tips#Cells .26 Instances of Cells|sub-Cell]] and apply the X/Y shift to that [[KLayout Design Tips#Cells .26 Instances of Cells|Cell Instance]] via the Instance's X/Y insertion position or a ''Move'' operation.)
####Once you are at the '''''Exposure''''' portion of the procedure, drive the microscope and crosshair to the feature that you designated as (0,0) on your CAD file. Use the ['''⨁'''] button to use precise positioning via clicking on the microscope image.
####Click '''[Set Zero]''' to set the origin (0,0) of your CAD file at that location of the crosshair.
#####[[File:MLA Set Zero button IMG 2352.jpg|alt=Screenshot showing MLA150 "Set Zero" button.]]
####(See below for Rotation alignment correction - to be performed ''before'' the X-Y alignment set, but also requires editing the CAD file.)
###Rotation Alignment workaround:
####Load your substrate onto the vacuum chuck and run [Load Substrate] function.
#####'''''IMPORTANT''''': Do not unload your substrate until the exposure is complete! We will be correcting the misalignment with respect to the substrate's load position, so once you have loaded the substrate, you do not want to release vacuum or otherwise allow the substrate to move w/r/to the vacuum chuck.
####Run a dummy binary-design design as a "normal" 2nd-Layer exposure with Alignment, and align to a few marks on your wafer. In the "Exposure" screen it'll show your the resulting ''Rotation (and Scaling/Shearing)'' values calculated from your alignment marks.
####Record the ''Rotation'' value (Scaling/Shearing are optional - if they are far from nominal, you may want to account for these as well).
####Do ''NOT'' run the exposure, but instead exit the Exposure and go back to the '''[''<< Setup'']''' screen.
####Edit your CAD file and apply the rotation to the CAD file. (Recommended: put your entire design into a [[KLayout Design Tips#Cells .26 Instances of Cells|sub-Cell]] and apply the rotation to that [[KLayout Design Tips#Cells .26 Instances of Cells|Cell Instance]]. Not you'll likely have to convert between µRadians --> Degrees).
####Load this corrected CAD file into the Design via "Convert Design". (Will require a fresh conversion.)
####Use the ''Above'' "X-Y Alignment Workaround" method to align your CAD file to the sample, before running your exposure.
#'''Stitching''': Because our tool is the higher-throughput version that exposes a ~20µm field at a time (not a single spot), greyscale exposures will typically see the stitching boundaries between fields. The fast-scan axis is in Y, so you generally will see Y-oriented ridges with something like ~4-7% lower dose. This primarily manifests for greyscale because photoresist is being only partially exposed. (For regular binary exposure, users typically overexpose which hides this stitching boundary.)
#'''Time''': Your will need to sign up for significantly more time to run a greyscale exposure. The software requires an initial “conversion” of the CAD file - which takes 45-60min for a 100mm wafer with 50% fill. (Be patient - the progress bar may not indicate it is working, but it is!) Once that is complete the Design shows up in the list for exposure - you can expose it any time thereafter. The exposure is also much longer than binary: 50% fill on a 100mm wafer took 12 hours. (Small substrates should be much shorter.) Staff did the Conversion and Exposure two separate sessions, on different days to accomplish the full litho. Contact Staff if you need to book the tool overnight for such a session.
#'''File size''' can be an issue. We have found that for full-wafers, DXF is the only format that works - BMP files that cover an entire 100mm wafer result in file sizes too large for the ''Convert'' software to handle, it will silently fail/crash.
#'''Minimum Dose''': In order to expose at low doses, you may need to enable the 15% filter in the exposure menu. Use this if the software disallows entering below a certain Dose that you'd like to access. We *think* you will have to calculate the actual exposure yourself, and calibrate your exposure with this filter enabled.

===Greyscale BMP===
Accepts 4-bit up to 24-bit bitmap files, although 8-bit gives the full greyscale range (256 grey values). BMP Greyscale files tends to quickly hit the filesize limit of the software, so only works for smaller than wafer-scale litho (eg. ~2cm areas). If you need to expose a larger area, such as a full wafer, you need to use DXF format, below.

===Greyscale DXF===
Each grey-level should be on a separate layer, where the layer name should be a number corresponding to the grey-level to print (layers numbers/levels #1-255). We recommend using a scripting method such as [https://pypi.org/project/gdspy/ GDSpy] to generate the DXF file.

Y-oriented ridges will still be present on the PR due to lateral stitching (approx 7% lower dose on the stitching boundaries - small but will be easily visible due to corresponding PR thickness changes). Post-develop reflow (via hotplate) might be required for smoothing steps, but may also affect the PR profile.

===Conversion===
Greyscale designs must be fully converted at the time the CAD file is imported, so plan to book extra time just for the Design conversion, prior to exposure (depending on design size).

For small samples (1-2cm), plan something like 30-45min for conversion.

For full 4-inch wafers with ~50% fill, conversion could take up to 1hr or more. Book tool time accordingly and be sure to communicate with upcoming users to let them know, as the total conversion time is often unknown.

It is ok to convert the Design in one session and run the Exposure in a separate session.

During the ''Convert'' phase you will choose either DXF Greyscale or BMP Greyscale. You will also set up the '''Gray Table''' that determines which layers get which grey-value (0-255). The Maximum Grey-Value (255) will get the full Dose chosen in the Exposure Screen, and 0 will get 0mJ Dose.

===Exposure===
The Dose chosen in the ''Exposure'' screen will correspond to a grey-value of 255 (in the grey-table chosen during the ''Convert'' phase, see above).

You can run a Series (focus-exposure matrix) with a Grey-scale Design, although the exposure time will be longer, so we suggest to use a minimal working CAD file for this purpose, to minimize exposure time.

At this time the tool does not support Rotation alignment correction for greyscale litho, only X/Y translation. You can use a 2nd Layer exposure with Alignment, but you must '''disable "Exposee with Substrate Angle" and/or "Rotation, Scaling and Shearing"''' or the exposure will fail.

IR Thermal Microscope (QFI) - Standard Operating Procedure (HotSpot/ThermalEmission)

2026-09-15T18:01:47Z

John d: fixed hotspot link

Operating Procedure for Hotspot and Thermal Emission modes. Thermal Emission mode measures an actual temeperature, whereas HotSpot just shows the pixels with heat, without temperature calculation, and is simpler to run.
'''Danger''': DO NOT damage the probe needles nor microscope objectives. If you are not careful, you can easily crash the microscope objective into the probe needles!
The microscope objectives may be impossible to replace, and the probe needles are setup for ''Very'' low spacing between the microscope objectives, needles and sample stage.

It is better if you can practice how to use a [[Probe Station & Curve Tracer|Probe Station]] in your own lab, or in the NanoFab before using this system.
If you think the needles got bumped or damaged, please notify staff ASAP so we can take a look and replace them.

# '''Contact staff for filling the Liquid Nitrogen ("LN2") dewar the day before your planned usage.'''
# Use the small ~2 Liter container to fill LN2 for the MWIR microscope
## You can tell when it's full when LN2 droplets spill out from the sides of the funnel's foam insert.
# Turn on the Temperature Controller power and the System Controller (turning the key to 1 and press the red Power button)
# Turn on the computer by clicking on the rocker switch once, behind the right-side panel. Ensure computer monitor is on. Motion Control will open automatically. Note the Z (focus) setting at Maximum speed 100%! Reduce to 25-50%.
# Open the Software: '''Hotspot''' for standard imaging, '''ThermalMap''' for more complex temperature measurements.
# Set up the electrical connection for the probes through the BNC cables according to your device, and turn on the Keithley power supply/SMU.
# Move the stage all the way forward with the front-most knob, put the sample on the stage, then move the stage back under the backmost microscope. ENSURE no probe needles are down, nor collide during this process! Do not touch the probe needles with your sample or tweezers.
# Move the probe manipulators to the right position to contact the device. CAREFUL - the magnetic bases can be hard to move, ensure nothing collides when making large movements. '''In the Software:'''
# Follow the QFI SOP's for acquiring measurements:
## [[Media:WFI -HS 102 Quick Start Guide - Standard Hot Spot.pdf|QFI Hot Spot S.O.P.]], or
## [https://wiki.nanofab.ucsb.edu/w/images/8/81/TM101_Standard_Temperature_Mapping_%281-Temp_Emissivity_Method%29.pdf QFI Temperature Mapping S.O.P.]
# To save your image, right click on the image and save as.
# Save the file into your Nanofiles folder, so you can download it [[Frequently Asked Questions#How do I get my files from the NanoFab computers?|via FTP]].

==== Ending your Session ====

# Unload the sample:
## lift the probes.
## Move the stage '''all the way forward''', after passing the probes.
# Turn off the Lamp inside the dark box.
# Please keep supplies and tweezers inside the dark box.
# Software: Go to file and quit.
# Sync the data with the "'''''Nanofiles Sync'''''" program on the desktop.
## Optionally check that the data is available on your laptop.
# Turn off the chuck heater.
# Close the dark box.

Author: [[Demis D. John]], 2025. Thanks to Tongxin Han for assistance.

IR Thermal Microscope (QFI) - Standard Operating Procedure (HotSpot/ThermalEmission)

2026-09-15T18:00:44Z

John d:

Operating Procedure for Hotspot and Thermal Emission modes. Thermal Emission mode measures an actual temeperature, whereas HotSpot just shows the pixels with heat, without temperature calculation, and is simpler to run.
'''Danger''': DO NOT damage the probe needles nor microscope objectives. If you are not careful, you can easily crash the microscope objective into the probe needles!
The microscope objectives may be impossible to replace, and the probe needles are setup for ''Very'' low spacing between the microscope objectives, needles and sample stage.

It is better if you can practice how to use a [[Probe Station & Curve Tracer|Probe Station]] in your own lab, or in the NanoFab before using this system.
If you think the needles got bumped or damaged, please notify staff ASAP so we can take a look and replace them.

# '''Contact staff for filling the Liquid Nitrogen ("LN2") dewar the day before your planned usage.'''
# Use the small ~2 Liter container to fill LN2 for the MWIR microscope
## You can tell when it's full when LN2 droplets spill out from the sides of the funnel's foam insert.
# Turn on the Temperature Controller power and the System Controller (turning the key to 1 and press the red Power button)
# Turn on the computer by clicking on the rocker switch once, behind the right-side panel. Ensure computer monitor is on. Motion Control will open automatically. Note the Z (focus) setting at Maximum speed 100%! Reduce to 25-50%.
# Open the Software: '''Hotspot''' for standard imaging, '''ThermalMap''' for more complex temperature measurements.
# Set up the electrical connection for the probes through the BNC cables according to your device, and turn on the Keithley power supply/SMU.
# Move the stage all the way forward with the front-most knob, put the sample on the stage, then move the stage back under the backmost microscope. ENSURE no probe needles are down, nor collide during this process! Do not touch the probe needles with your sample or tweezers.
# Move the probe manipulators to the right position to contact the device. CAREFUL - the magnetic bases can be hard to move, ensure nothing collides when making large movements. '''In the Software:'''
# Follow the QFI SOP's for acquiring measurements:
## [Https://wiki.nanofab.ucsb.edu/w/images/e/ef/WFI -HS 102 Quick Start Guide - Standard Hot Spot.pdf QFI Hot Spot S.O.P.], or
## [https://wiki.nanofab.ucsb.edu/w/images/8/81/TM101_Standard_Temperature_Mapping_%281-Temp_Emissivity_Method%29.pdf QFI Temperature Mapping S.O.P.]
# To save your image, right click on the image and save as.
# Save the file into your Nanofiles folder, so you can download it [[Frequently Asked Questions#How do I get my files from the NanoFab computers?|via FTP]].

==== Ending your Session ====

# Unload the sample:
## lift the probes.
## Move the stage '''all the way forward''', after passing the probes.
# Turn off the Lamp inside the dark box.
# Please keep supplies and tweezers inside the dark box.
# Software: Go to file and quit.
# Sync the data with the "'''''Nanofiles Sync'''''" program on the desktop.
## Optionally check that the data is available on your laptop.
# Turn off the chuck heater.
# Close the dark box.

Author: [[Demis D. John]], 2025. Thanks to Tongxin Han for assistance.

Photolithography - Improving Adhesion Photoresist Adhesion

2026-09-10T19:33:38Z

John d: Updated underlayer process and tips

==Underlayers for improving PR adhesion==
High-temperature (>150°C) underlayers, such as LOL1000/2000, BARC layers tend to improve adhesion of the imaging resist.

*Substrate prep: O2 plasma ([[Ashers (Technics PEII)|PEii Technics]]), 10sec
*Apply high-temp underlayer, eg. LOL1000/2000, PMGI, DSK101 (DUV), DSK42P (DUV)
**Beware of underlayers that have a develop-rate - undercutting the imaging PR fully can also cause delamination)
*Bake at recommended temperature for the underlayer, typically >> 150°C.
*Apply & bake your Imaging photoresist as normal for that resist,
**Bake temp should be lower than the underlayer bake temp.
*If your underlayer dissolves during the same develop step as the imaging resist, you will need to increase your develop time to go through both layers.
**Don't forget that, for [[Lithography Recipes#Lift-Off Recipes|lift-off processes]], the Imaging (top) Photoresist will lift-off as well if you undercut it too much during develop!

==HMDS Process for PR Improving Adhesion==
This process tends to improve adhesion between the substrate and subsequent photoresist layers. Use this procedure if you are finding poor adhesion (resist delaminating during develop etc.), or for chemicals (like BHF) that attack the PR adhesion interface strongly.

*150°C bake ~2min (Dehydration step)
**Optionally could instead do Dehydration of: O2 plasma ([[Ashers (Technics PEII)|PEii Technics]]), 10sec; however this could create more surface SiO2 on silicon.
*HMDS application & soak 40s
**Do this with sample loaded on the PR spinner.
*Spin-dry - any spin speed, ~15-30sec
*HMDS bake at 100-110°C for 90s.
*Then your normal PR process on top.

MediaWiki:Sidebar

2026-09-09T19:41:19Z

John d:

* InvisibleMenu
* QuickLinks
** Lab Rules|Lab Rules
** FAQs|Common Questions/FAQ
** Staff List|Staff List
** https://signupmonkey.ece.ucsb.edu|Equipment Signup
** Chemical List|Chemicals + MSDS
** https://protofab.oasis.ucsb.edu|Protofab
* Equipment
** Tool List|Full Tool List
** Category:Lithography|Lithography
** Category:Vacuum Deposition|Vacuum Deposition
** Category:Dry Etch|Dry Etch
** Category:Wet Processing|Wet Processing
** Category:Thermal Processing|Thermal Processing
** Category:Packaging|Packaging
** Category:Inspection, Test and Characterization|Metrology & Test
* Recipes and Data
** Lithography Recipes|Lithography
** Vacuum Deposition Recipes|Vacuum Deposition
** Dry Etching Recipes|Dry Etching
** Wet Etching Recipes|Wet Etching
** Thermal Processing Recipes|Thermal Processing
** Packaging Recipes|Packaging Tools
* Data + Info
** Process_Group_-_Process_Control_Data|Process Control Data
** Tutorials|Tutorials
** Calculators_+_Utilities|Calculators/Utilities
** Usage Data and Statistics|NanoFab Info
** Research|Research + Pubs
** Tech_Talks_Seminar_Series|Tech Talks

-----
-----

* Editing Tools
** Editing Tutorials|Editing Tutorials
** Category:Templates|Templates (Functions)
** Special:Categories|Categories
** https://www.nanotech.ucsb.edu/wiki/index.php/Main_Page?action=purge|Force Refresh of Main page
** recentchanges-url|recentchanges

-----

* TOOLBOX

MediaWiki:Common.css

2026-09-09T19:41:03Z

John d: bolding Protofab text in sidebar

/* Site-wide mods */

/* disable "discussion" link on every page */
li#ca-talk { display:none!important; }

/*-------------------------------*/

/* MediaWiki:Sidebar CSS rules */

/* remove the first Section title causing a blank space */
div#p-InvisibleMenu {
display:none!important;
}

/* targets the div holding the logo */
div#p-logo {
/* CSS goes here */
}

/* targets the link inside the logo div */
div#plogo a.mw-wiki-logo {

}

/* Bold specific sidebar items: */
li#n-Lab-Rules a {
font-weight: bold;
}

/*
li#n-COVID-19-Protocols a {
font-weight: bold;
}
*/

/* Bold specific sidebar items: */
li#n-Protofab a {
font-weight: bold;
}

/*-----------------------------------*/
/* Sidebar title elements */

/* THESE ARE OVERRIDDEN BY ANOTHER RULE `@media screen #mw-panel .portal {}` */

h3#p-navigation-label {

}
h3#p-Equipment-label {
}
h3#p-Recipes_and_Data-label {

}
h3#p-Facility_Data-label {

}
h3#p-Editing_Tools-label {

}
h3#p-p-tb-label {

}

/* For the spacing between elements, you want to target all li elements inside of the section divs and increase the padding top and bottom on those elements */
div#p-navigation li {

}

div#p-Equipment li {

}

/* etc... */

MediaWiki:Sidebar

2026-09-09T19:39:32Z

John d:

* InvisibleMenu
* QuickLinks
** Lab Rules|Lab Rules
** FAQs|Common Questions/FAQ
** Staff List|Staff List
** https://signupmonkey.ece.ucsb.edu|Equipment Signup
** Chemical List|Chemicals + MSDS
** https://protofab.oasis.ucsb.edu|-- Protofab --
* Equipment
** Tool List|Full Tool List
** Category:Lithography|Lithography
** Category:Vacuum Deposition|Vacuum Deposition
** Category:Dry Etch|Dry Etch
** Category:Wet Processing|Wet Processing
** Category:Thermal Processing|Thermal Processing
** Category:Packaging|Packaging
** Category:Inspection, Test and Characterization|Metrology & Test
* Recipes and Data
** Lithography Recipes|Lithography
** Vacuum Deposition Recipes|Vacuum Deposition
** Dry Etching Recipes|Dry Etching
** Wet Etching Recipes|Wet Etching
** Thermal Processing Recipes|Thermal Processing
** Packaging Recipes|Packaging Tools
* Data + Info
** Process_Group_-_Process_Control_Data|Process Control Data
** Tutorials|Tutorials
** Calculators_+_Utilities|Calculators/Utilities
** Usage Data and Statistics|NanoFab Info
** Research|Research + Pubs
** Tech_Talks_Seminar_Series|Tech Talks

-----
-----

* Editing Tools
** Editing Tutorials|Editing Tutorials
** Category:Templates|Templates (Functions)
** Special:Categories|Categories
** https://www.nanotech.ucsb.edu/wiki/index.php/Main_Page?action=purge|Force Refresh of Main page
** recentchanges-url|recentchanges

-----

* TOOLBOX

MediaWiki:Sidebar

2026-09-09T19:39:19Z

John d: added protofab

* InvisibleMenu
* QuickLinks
** Lab Rules|Lab Rules
** FAQs|Common Questions/FAQ
** Staff List|Staff List
** https://signupmonkey.ece.ucsb.edu|Equipment Signup
** Chemical List|Chemicals + MSDS
** https://protofab.oasis.ucsb.edu|--Protofab--
* Equipment
** Tool List|Full Tool List
** Category:Lithography|Lithography
** Category:Vacuum Deposition|Vacuum Deposition
** Category:Dry Etch|Dry Etch
** Category:Wet Processing|Wet Processing
** Category:Thermal Processing|Thermal Processing
** Category:Packaging|Packaging
** Category:Inspection, Test and Characterization|Metrology & Test
* Recipes and Data
** Lithography Recipes|Lithography
** Vacuum Deposition Recipes|Vacuum Deposition
** Dry Etching Recipes|Dry Etching
** Wet Etching Recipes|Wet Etching
** Thermal Processing Recipes|Thermal Processing
** Packaging Recipes|Packaging Tools
* Data + Info
** Process_Group_-_Process_Control_Data|Process Control Data
** Tutorials|Tutorials
** Calculators_+_Utilities|Calculators/Utilities
** Usage Data and Statistics|NanoFab Info
** Research|Research + Pubs
** Tech_Talks_Seminar_Series|Tech Talks

-----
-----

* Editing Tools
** Editing Tutorials|Editing Tutorials
** Category:Templates|Templates (Functions)
** Special:Categories|Categories
** https://www.nanotech.ucsb.edu/wiki/index.php/Main_Page?action=purge|Force Refresh of Main page
** recentchanges-url|recentchanges

-----

* TOOLBOX

MediaWiki:Sidebar

2026-09-09T19:38:10Z

John d:

* InvisibleMenu
* QuickLinks
** Lab Rules|Lab Rules
** FAQs|Common Questions/FAQ
** Staff List|Staff List
** https://signupmonkey.ece.ucsb.edu|Equipment Signup
** Chemical List|Chemicals + MSDS
** https://protofab.oasis.ucsb.edu|*Protofab*
* Equipment
** Tool List|Full Tool List
** Category:Lithography|Lithography
** Category:Vacuum Deposition|Vacuum Deposition
** Category:Dry Etch|Dry Etch
** Category:Wet Processing|Wet Processing
** Category:Thermal Processing|Thermal Processing
** Category:Packaging|Packaging
** Category:Inspection, Test and Characterization|Metrology & Test
* Recipes and Data
** Lithography Recipes|Lithography
** Vacuum Deposition Recipes|Vacuum Deposition
** Dry Etching Recipes|Dry Etching
** Wet Etching Recipes|Wet Etching
** Thermal Processing Recipes|Thermal Processing
** Packaging Recipes|Packaging Tools
* Data + Info
** Process_Group_-_Process_Control_Data|Process Control Data
** Tutorials|Tutorials
** Calculators_+_Utilities|Calculators/Utilities
** Usage Data and Statistics|NanoFab Info
** Research|Research + Pubs
** Tech_Talks_Seminar_Series|Tech Talks

-----
-----

* Editing Tools
** Editing Tutorials|Editing Tutorials
** Category:Templates|Templates (Functions)
** Special:Categories|Categories
** https://www.nanotech.ucsb.edu/wiki/index.php/Main_Page?action=purge|Force Refresh of Main page
** recentchanges-url|recentchanges

-----

* TOOLBOX

MediaWiki:Sidebar

2026-09-09T19:35:57Z

John d: added Protofab

* InvisibleMenu
* QuickLinks
** Lab Rules|Lab Rules
** FAQs|Common Questions/FAQ
** Staff List|Staff List
** https://signupmonkey.ece.ucsb.edu|Equipment Signup
** Chemical List|Chemicals + MSDS
** https://protofab.oasis.ucsb.edu|'''Protofab'''
* Equipment
** Tool List|Full Tool List
** Category:Lithography|Lithography
** Category:Vacuum Deposition|Vacuum Deposition
** Category:Dry Etch|Dry Etch
** Category:Wet Processing|Wet Processing
** Category:Thermal Processing|Thermal Processing
** Category:Packaging|Packaging
** Category:Inspection, Test and Characterization|Metrology & Test
* Recipes and Data
** Lithography Recipes|Lithography
** Vacuum Deposition Recipes|Vacuum Deposition
** Dry Etching Recipes|Dry Etching
** Wet Etching Recipes|Wet Etching
** Thermal Processing Recipes|Thermal Processing
** Packaging Recipes|Packaging Tools
* Data + Info
** Process_Group_-_Process_Control_Data|Process Control Data
** Tutorials|Tutorials
** Calculators_+_Utilities|Calculators/Utilities
** Usage Data and Statistics|NanoFab Info
** Research|Research + Pubs
** Tech_Talks_Seminar_Series|Tech Talks

-----
-----

* Editing Tools
** Editing Tutorials|Editing Tutorials
** Category:Templates|Templates (Functions)
** Special:Categories|Categories
** https://www.nanotech.ucsb.edu/wiki/index.php/Main_Page?action=purge|Force Refresh of Main page
** recentchanges-url|recentchanges

-----

* TOOLBOX

Wet Etching Recipes

2026-09-05T03:25:50Z

John d: /* Table of Wet Etching Recipes */ added GaSb substrate removal etch

__TOC__

==Chemicals Available==

*[[Chemical List|'''The Chemical Lists''']] show stocked chemicals, photolithography chemicals, and how to bring new chemicals.

=='''Table of Wet Etching Recipes'''==
''Use the ↑ ↓ Arrows in the header row to sort the entire table by material, selectivity, etchant etc.''
{| class="wikitable sortable"
|-
!Material!!Etchant!!Rate (nm/min)!!Anisotropy!!Selective to!!Selectivity!!Ref.!!Notes!!Confirmed By/Date
|-
|Photoresist, polymers/organics
|H2SO4:H2O2 = 3:1
[[Wet Etching Recipes#Organic%20removal|Piranha Solution]]
|typ. 5-10min etch for polymer residue
|
|Cr, W, Au, Pt, Si, SiO2, SiN
|
|
|'''''Dangerous''''' boiling hazard - see '''''[[Wet Etching Recipes#Piranha%20Solution|Piranha Solution]]'''''
section below. Etches Ti, Ni, Hf
|[[Demis D. John]], 2017
|-
|InP
|H3PO4:HCl = 3:1
|~1000
|Highly
|InGaAsP
|High
|[http://tel.archives-ouvertes.fr/docs/00/76/94/02/PDF/VA2_LAMPONI_MARCO_15032012.pdf Lamponi (p.102)]
|
|
|-
|InP||H3PO4:HCl = 3:1||~1000||Highly||InGaAs||High||[http://tel.archives-ouvertes.fr/docs/00/76/94/02/PDF/VA2_LAMPONI_MARCO_15032012.pdf Lamponi (p.102)]||
|
|-
|InP
|HCl:H2O = 3:1
|~5000
|
|InGaAs or InGaAsP
~200nm stop-etch
|High
|
|Bubbles while etching
|
|-
|InGaAs
|H2SO4:H2O2:H2O = 1:1:10
|~600
|
|InP
|High
|
|Exothermic, may reduce selectivity if hot
|
|-
|InGaAsP
|H2SO4:H2O2:H2O = 1:1:10
|~600
|
|InP
|High
|
|Exothermic, may reduce selectivity if hot
(same as InGaAs stop-etch removal)
|
|-
|GaAs
|NH4OH:H2O2 = 1:30
|
| -
|AlGaAs,
Al > 80%

~200nm stop-etch
|High
|
|
|Garrett Cole
|-
|GaSb
|[https://dtrinkle.matse.illinois.edu/MatSE584/kap_6/advanced/t6_1_2.html Sirtl etch]:
CrO3 powder mixed with HF
|TBD
|TBD
|InAs
|Infinite
|PhD. Dissertation of Shamsul Arafin, T.U. Munich.
|Do not store mixed - will corrode and leak out of the bottle! Mix fresh every time. Read MSDS's!
|
|-
|AlGaAs,
Al ≥80%
|HF:H2O = 1:20
|
| -
|GaAs
|High
|
|
|Garrett Cole
|-
|Oxide of InP
|NH4OH:H2O = 1:10
|1min to remove
|
|InP
|unknown
|
|
|[[Ning Cao]]
|-
|Oxide of GaAs
|HCl:H2O = 1:10
|1min to remove
|
|GaAs
|unknown
|
|
|[[Demis D. John]]
|-
|Al2O3 ''(ALD Plasma 300C)''||Developer: 300MIF||~1.6||None
|Most non-Al Materials.
|High||Measured in-house||Rate slows with time.||JTB
|-
|Al2O3 ''(ALD Plasma 300C)''||Developer: 400K||~2.2||None
|Most non-Al Materials.
|High||Measured in-house||Rate slows with time.||JTB
|-
|Al2O3 ''(ALD Plasma 300C)''||Developer: 400K (1:4)||~1.6||None
|Most non-Al Materials.
|High||Measured in-house||Rate slows with time.||JTB
|-
|Al2O3 ''(ALD Plasma 300C)''||NH4OH:H2O2:H2O (1:2:50)||~<0.5|| || || ||Measured in-house||Rate slows with time||JTB
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=Sputtering_Recipes#Al2O3_deposition_.28IBD.29 Al2O3 ''(IBD)'']
|HF ("Buffered HF Improved", Transene)
|~170
|None
|Photoresist
|High
|Measured in-house
|May need to increase adhesion with thin SiO2 layer, and 100°C baked HMDS.
|Biljana Stamenic,
2017-12
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=Sputtering_Recipes#Al2O3_deposition_.28IBD.29 Al2O3 ''(IBD)'']
|Developer: 726 MiF
|3.5
|None
|Most non-Al Materials.
|High
|Measured in-house
|
|Demis D. John,
2017-11
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=Sputtering_Recipes#Al2O3_Deposition_.28Sputter_4.29 Al2O3 ''(AJA#4)'']
|Developer: 300 MiF
|4.30
|None
|Most non-Al Materials.
|High
|Measured in-house
|
|Demis D. John
2018-02
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=PECVD_Recipes#SiO2_deposition_.28PECVD_.231.29 SiO2 ''(PECVD #1)'']
|HF ("Buffered HF Improved", Transene)
|~550
|None
|Photoresist
|High
|Measured in-house
|May need to increase adhesion with 100°C baked HMDS.
|Biljana Stamenic
2023
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=PECVD_Recipes#SiO2_deposition_.28PECVD_.232.29 SiO2 ''(PECVD #2)'']
|HF ("Buffered HF Improved", Transene)
|~680
|None
|Photoresist
|High
|Measured in-house
|May need to increase adhesion with 100°C baked HMDS.
|Biljana Stamenic
2023
|-
|SiO2 ''(ALD -BDEAS 300C)''
|HF ("Buffered")
Diluted with DI
BHF:H2O = 1:100
|~7.46
|
|
|
|Measured in-house
|
|Biljana Stamenic
2024
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=Sputtering_Recipes#SiO2_deposition_.28IBD.29 SiO2 (IBD)]
|HF ("Buffered HF Improved", Transene)
|~260
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanofab.ucsb.edu/wiki/PECVD_Recipes#ICP-PECVD_.28Unaxis_VLR.29 SiO2 LDR ''(Unaxis VLR)'']
|HF ("Buffered HF Improved", Transene)
|~170
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanofab.ucsb.edu/wiki/PECVD_Recipes#ICP-PECVD_.28Unaxis_VLR.29 SiO2 HDR ''(Unaxis VLR)'']
|HF ("Buffered HF Improved", Transene)
|~230
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=PECVD_Recipes#SiN_deposition_.28PECVD_.231.29 Si3N4 (PECVD#1)]
|HF ("Buffered HF Improved", Transene)
|~120
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=PECVD_Recipes#SiN_deposition_.28PECVD_.232.29 Si3N4 (PECVD#2)]
|HF ("Buffered HF Improved", Transene)
|~35
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=PECVD_Recipes#Low-Stress_SiN_deposition_.28PECVD_.232.29 Si3N4 Low-Stress (PECVD#2)]
|HF ("Buffered HF Improved", Transene)
|~30
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=Sputtering_Recipes#Si3N4_deposition_.28IBD.29 Si3N4 (IBD)]
|HF ("Buffered HF Improved", Transene)
|~5
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanofab.ucsb.edu/wiki/PECVD_Recipes#ICP-PECVD_.28Unaxis_VLR.29 SiN ''(Unaxis VLR)'']
|HF ("Buffered HF Improved", Transene)
|~10
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanofab.ucsb.edu/wiki/PECVD_Recipes#ICP-PECVD_.28Unaxis_VLR.29 SiN Low Stress ''(Unaxis VLR)'']
|HF ("Buffered HF Improved", Transene)
|~135
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=Sputtering_Recipes#Ta2O5_deposition_.28IBD.29 Ta2O5 (IBD)]
|HF ("Buffered HF Improved", Transene)
|0.07
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2023
|-
|[https://wiki.nanotech.ucsb.edu/w/index.php?title=Sputtering_Recipes#TiO2_deposition_.28IBD.29 TiO2 (IBD)]
|HF ("Buffered HF Improved", Transene)
|1.0–2.0
|None
|Photoresist
|High
|Measured in-house
|
|Biljana Stamenic
2014-12
|-
|Si (<100> crystalline)
|KOH (45%) @ 87°C
|~730
|High, Crystallographic, ~55°
|Low-Stress Si3N4 - either [[PECVD Recipes#Low-Stress SiN deposition .28PECVD .232.29|PECVD #2]] or Commercial LPCVD Si3N4
Other Si3N4 also OK.
|LS-SiN: High
PR etches quickly, SiO2 etches slowly.
|Measured In-House
- Search online.
|Use the Covered, Heated vertical bath ([[Wet Benches#Wafer Toxic Corrosive Benches|Dedi cated bath in Bay 4]]). Slight Bubbler.
|Brian Thibeault
2017
|-
!Material!!Etchant!!Rate (nm/min)!!Anisotropy!!Selective to!!Selectivity!!Ref.!!Notes!!Confirmed By/Date
|}

==Wet Etching References==

#[http://ieeexplore.ieee.org/abstract/document/546406/ Etch rates for Micromachining Processing (IEEE Jnl. MEMS, 1996)] - includes tables of etch rates of numerous metals vs. various wet and dry etchants.
#[http://ieeexplore.ieee.org/abstract/document/1257354/ Etch rates for micromachining-Part II (IEEE Jnl. MEMS, 2003)] - expanded tables containing resists, dielectrics, metals and semiconductors vs. many wet etch chemicals.
#[http://www.sciencedirect.com/science/article/pii/S0927796X00000279 Guide to references on III±V semiconductor chemical etching] - exhaustive list of wet etchants for etching various semiconductors, including selective etches.
#[http://transene.com/etch-compatibility/ Transene's Chemical Compatibility Chart] provides a useful quick-reference for which Transene etchants attack which materials.
##As a side-note, [http://transene.com/ Transene] provides many pre-mixed solutions that you can order, saving you the time and uncertainty of measuring/mixing such chemicals yourself. Make sure you check with us before ordering so we know how to handle the chemical before it arrives.

===Compound Semiconductor Etching===
[http://www.sciencedirect.com/science/article/pii/S0927796X00000279 Guide to references on III±V semiconductor chemical etching (A.R. Clawson, 2001)]

* Impressively vast list of various III-V wet etches, organized by various applications (eg. "selective GaAs against AlGaAs" or "non-selective InP/InGaAsP" etc.)
* Please add any confirmed etches from this reference to the {{HLink|Wet Etching Recipes|The Master Table of Wet Etching (Include All Materials)}}.

===Metal Etching===

*[//wiki.nanotech.ucsb.edu/w/images/c/c3/Ta_and_Cr_E-beam_deposition_and_wet_etch_test.pdf Selective Wet Etch of Cr over Ta using Cr Etchant]
*[//wiki.nanotech.ucsb.edu/w/images/d/dc/ITO_Deposition-250C-Ebeam2-HCl-Wet-Etch.pdf Wet Etch of ITO using Heated, Diluted HCl Solution]

===Silicon etching===
[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=546406 Etch rates for micromachining processing]

[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1257354 Etch rates for micromachining processing-part II]

Please add any confirmed etches from this reference to the {{HLink|Wet Etching Recipes|The Master Table of Wet Etching (Include All Materials)}}.

==Organic removal==

===Piranha Solution===

*'''Careful!''' Read about how to prepare and handle this safely:
**[http://web.mit.edu/cortiz/www/PiranhaSafety.doc MIT's Piranha Solution safety document]
**[https://www.ehs.harvard.edu/sites/default/files/lab_safety_guideline_piranha_etch.pdf Harvard EHS's Handling Document]
**Used for etching away Photoresist residues after dry etching.

===PureStrip (Transene)===

*Heat to @ 70°C
**[[Wet Benches#Wafer Toxic Corrosive Benches|Vertical heated bath on Wafer Toxic-Corrosive bench in Bay 4]]
**After a few days heated, it loses potency - must drain + replenish with fresh solution.
**~30-90min will remove stubborn, microscopic PR residues from dry etching.

==[[Gold Plating Bench|Gold Plating Bench (Technic SEMCON 1000)]]==
Standard plating recipes are described and taught during the equipment training for this tool.

Electroplating first requires a Gold seed layer to be present on all surfaces to be plated. Common ways to produce this are to:

*[[Tool List#Sputter Deposition|Sputter-coat]] a thin (~100nm) Au "seed layer" on all surfaces of the wafer, being careful to consider shadowing effects during the dep (eg. in high-aspect ratio trenches).
*Perform photolithography to protect (and prevent plating) in desired areas - areas with no photoresist will be plated.
**Leave ''Open'' the 4 contact points on the edge of the wafer, or some other contact point, for an electrode to make contact to the Seed layer.
**Optionally use EBR100 to swab away photoresist from the contact points.
*Perform the electroplating on the [[Gold Plating Bench|Technic SemCon]], contacting the seed layer with electrodes and executing the program for the desired current/time to achieve the plating thickness (typically microns).
*Strip the photoresist using standard solvents.
*Use the [[CAIBE (Oxford Ion Mill)|Oxford Ion Mill]] to blanket etch the seed layer all over the wafer (the 100nm removed from the plated regions will be negligible compared to the ~1µm plated).

==[[Chemical-Mechanical Polisher (Logitech)|Chemi-Mechanical Polishing (CMP)]]==
''To Be Added''

==[[Mechanical Polisher (Allied)|Mechanical Polishing (Allied)]]==
''To Be Added''
[[Category:Processing]]

File:UCSB Service Agreement.pdf

2026-09-04T22:40:20Z

John d: John d uploaded a new version of File:UCSB Service Agreement.pdf

== Summary ==
UCSB Service Agreement, for Remote Fabrication Services section of Nanotech website.
[[Category:Services]]

ICP Etching Recipes

2026-08-31T17:44:37Z

John d: /* Si Etch Recipes (Fluorine ICP Etcher) */ link to main process control page and internships pages

{{recipes|Dry Etching}}

=[[DSEIII_(PlasmaTherm/Deep_Silicon_Etcher)]]=

=== Process Tips ===

* Use the Santovac oil for mounting small pieces to Silicon carrier wafers, or else your resist will burn! Increases thermal conduction to the cooled carrier wafer. (Full-wafers instead get direct Helium cooling.) Careful that the oil does not get anywhere near the outer clamp that holds the wafer down, or your wafer will get stuck.
** The oil fully dissolves in Acetone or NMP. You can clean oil off the back by wiping the back of the sample against an ACE-soaked wipe.
* See the '''[[ICP Etching Recipes#Process Control Data (DSEiii)|Process Control Data below]]''' - Staff/Intern-run Etches Weekly, tracked over time.
** This tells you whether the chamber and tool are operating properly before you run your etch.
** You can follow the intern's travelers for details of their etch.

==Edge-Bead Removal (DSEiii)==
Make sure to remove photoresist from edges of wafer, or PR may stick to the top-side wafer clamp and destroy your wafer during unload!

*[[ASML DUV: Edge Bead Removal via Photolithography|Edge Bead Removal via Photolithography]]: use a custom metal mask to pattern the photoresist with a flood exposure.
**If you are etching fully through a wafer, remember that removal of edge-bead will cause full etching in the exposed areas. To prevent a wafer from falling into the machine after the etch, you can [[Packaging Recipes#Wafer Bonder .28Logitech WBS7.29|mount to a carrier wafer using wax]].
*[[Photolithography - Manual Edge-Bead Removal Techniques|Manual PR Edge-Bead Removal]] - using swabs and EBR100. This is prone to error and easy to accidentally leave a blob of PR on the edge - so be extra careful to ensure NO PR is left on the edges!

==High Rate Bosch Etch (DSEIII)==
*[//wiki.nanotech.ucsb.edu/wiki/images/4/4a/10-Si_Etch_Bosch_DSEIII.pdf Bosch Process Recipe and Characterization] - Standard recipe on the tool.[[File:DSEiii Bosch Ecth SEM Example 01.png|alt=Example SEM image|thumb|188x188px|Example of 100µm Deep Bosch Etched Silicon posts with Al2O3 hard mask. Close inspection shows the horizontal "scalloping" from the cycling nature of the etch. (Image Credit: [[Demis D. John]], 2021-07)]]
**'''STD_Bosch_Si (⭐️Production)''' - Developed 2024-10
***Old Recipe Name: "'''''Plasma-Therm Standard DSE'''''" - lower EtchA, less tolerant
**Standard [https://en.wikipedia.org/wiki/Deep_reactive-ion_etching#Bosch_process Bosch Process] for high aspect-ratio, high-selectivity Silicon etching.
***Cycles between polymer deposition "Dep" / Polymer etch "Etch A" / Si etch "Etch B" steps. Step Times gives fine control.
***To reduce roughening/grassing ("black silicon"), Increase "''Etch A''" ''t''ime by ~50%. Alternatively, reduce "''Dep''" step time by ~20%.
**Patterns with different exposed/etched areas will have different "optimal" parameters.
**This recipe has 2s Etch A time compared to "'''''Plasma-Therm Standard DSE'''''" (which has 1.5s Etch A) below - this reduced the undercut of mask to ~1% of the etch depth and the effect of [https://wiki.nanofab.ucsb.edu/w/images/a/a1/Cal_vs_Legacy_DSE.png aspect ratio on etch rate]. All other recipe parameters are the same.
**Selectivity to Photoresist ~60.
**Selectivity to SiO2 should be higher, not yet measured.
**Selectivity to Al2O3 is extremely high, >9000. See below TSV process for processing tips with Al2O3 hardmask.
**If you need to pattern all the way to the edge of the wafer, PR won't work because you have to remove the edge-bead of photoresist (see above). Instead use hardmask process (See "Through Silicon Via" etch below).
**Larger open area → lower selectivity & lower etch rate.
***<1% center to edge variability in etch rate for small open area.
***More variation across wafer for larger open area (eg. plasma dicing)
**Thick PR's approx ≥10µm tend to burn, avoid thick PR's. They also make edge-bead removal very difficult. Instead use an SiO2 hardmask or the Al2O3/SiO2 hardmask below.
{|
|[[File:Plasmatherm DSE - 40um deep Si etch Cal 241007 - 30D 002.jpg|alt=Tilted SEM of 40um deep etch|none|thumb|250x250px|~40µm deep Silicon etch, run as Process Control "EtchCal" (''Process Development and Image: [[Noah Dutra]], 2024-10-07'')]]
|[[File:DSE_16um_Bosch_Etch_-_22_013.jpg|alt=Example SEM image|none|thumb|250x250px|Example of 16.32µm Deep Etched Silicon with 650nm thick UV6 Photoresist mask, 2µm Pitch. (''Image Credit: [[Noah Dutra]] 2024-08'')]]
|}

=== '''Si Etching C4F8/SF6/Ar (PlasmaTherm DSEiii)''' ===
[[File:DSE plot.png|alt=example of Process Control Charts|thumb|[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281|232x232px]]
* Recipe: ''STD_Bosch_Si (⭐️Production),'' on 100mm Si Wafer with ~50% open area, photoresist mask, ~40µm deep

*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=0#gid=0 Si Etching with C4F8/SF6/Ar - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/Ar - '''Plots''']

===Through Silicon Via (TSV) etch (DSEiii)===
Since the topside clamp requires the removal of photoresist on the outermost ~5-7mm of the wafer, this makes PR incompatible with through-silicon etching (as the outer edges would be etched-through, dropping the inner portion into the chamber). In addition, in practice we have found that thick PR often roughens and burns during long ~30-60min etches, making removal very difficult.

Instead, we recommend the following process with Al2O3 hardmask:
We have a new wafer-mounting process for through-silicon etching, using the UV-Release Dicing tape. Contact [[Demis D. John|staff]] for more info.
-- [[Demis D. John|Demis]] 2026-02-10

'''NOTE''':
'''DO NOT RUN''' the wax-mounting process without discussing with staff first. The wax-mounting process process can leave wax on the wafer clamp, causing the next user's wafer to get stuck and fail transfer!
''(Through-wafer process with no wax is still acceptable.)'' -- [[Demis D. John|Demis]] 2024-03-11

{| class="wikitable"
! colspan="2" |Process for Through-Wafer Silicon Etching
with wax-mounting (small pieces only)
|-
|Process to etch through ~550µm Silicon
|''[[Demis D. John]] & [[Biljana Stamenic]] 2022-11-11. Please consider our [[Frequently Asked Questions#Publications acknowledging the Nanofab|publication policy]] if you use/modify this process.''
|-
|Deposit 150nm Al2O3 on either:

*[https://wiki.nanotech.ucsb.edu/w/index.php?title=Sputtering_Recipes#Al2O3_deposition_.28IBD.29 Veeco Nexus IBD]
*AJA Sputter [https://wiki.nanotech.ucsb.edu/wiki/Sputtering_Recipes#Materials_Table_.28Sputter_3.29 3]/[https://wiki.nanotech.ucsb.edu/wiki/Sputtering_Recipes#Al2O3_Deposition_.28Sputter_4.29 4]/[https://wiki.nanotech.ucsb.edu/wiki/Sputtering_Recipes#Materials_Table_.28Sputter_5.29 5] (Check which has Al target installed)
|May need to do dep. rate check beforehand.
|-
|Deposit ~3nm SiO2, ''in situ'' (same machine as above)
|This improves adhesion to photoresist and prevents developer attacking the Al2O3.
|-
|Lithography - your preferred method. Needs approx. ≥500nm thick PR.
|
|-
|Etch the [https://wiki.nanotech.ucsb.edu/w/index.php?title=ICP_Etching_Recipes#Al2O3_Etching_.28Panasonic_2.29 Al2O3 in Panasonic ICP 1/2]
|Use 50W version. Overetch by ~20%, will also etch through the thin SiO2 layer.
|-
|Strip PR - either ''[https://wiki.nanotech.ucsb.edu/w/index.php?title=ICP_Etching_Recipes#Photoresist_Etch.2FStrip_.28Panasonic_2.29 in situ]'', or via NMP 80°C soak followed by [https://wiki.nanotech.ucsb.edu/wiki/Oxygen_Plasma_System_Recipes#Ashers_.28Technics_PEII.29 PEii Technics ashing].
|''In situ'' PR strip appears to give better + faster results.
|-
|If pieces of the wafer are at risk of falling into the chamber, mount the product wafer to a carrier wafer:
[https://wiki.nanotech.ucsb.edu/wiki/Logitech_WBS7_-_Procedure_for_Wax_Mounting_with_bulk_Crystalbond_Stick Logitech Wax Mounting Recipe - Bulk Crystal Bond]

If you are only etching small holes through the wafer (majority of wafer is intact), then wax-mounting is not necessary.
|'''CONTACT [[Demis D. John|STAFF]]''' before attempting this step!

Critical - Ensure no wax is present on either side or edge of wafer prior to DSE etching, or wafer may break in the DSE during robot unload!
|-
|Use POLOS spinners with ACE/ISO to clean front and back of wafer.
'''''IMPORTANT''''' for wax-mounting, to ensure wax does not stick your wafer to the DSE clamp.

Observe ''carefully'' for any wax protruding from between wafers - redo spin-clean as needed.
|Also make sure wax thickness is not too thick, of long etches could cause wax to seep out from between the wafers.
|-
|DSEiii etch - to eliminate grassing:

* Increase EtchA LF-Bias Power and Duration
** EtchA: 300W for 3.5–4sec
** New method as of ~2025
Old method: reduce Dep step:

*Bosch Cycles: Dep: 1.2sec / Etch A: 1.5sec / Etch B: 2.0sec
*Rate ≈ 4.25µm / min
|Can use Lasermonitor and/or Camera to observe when etch is fully through. Trenches may get black/rough, but then clear up when fully etched.

*Record Helium FLOW during recipe run, for next step (if He leaks).

*Ok to remove wafer, observe/measure, and re-load for etching.

*If see black grass and etch rate drops, may need to run an O2 plasma with [[Ashers (Technics PEII)|Technics PEii]] few min to remove polymer, Increase EtchA step time (eg. by 50-100%) and then continue the etch.
|-
|If you did not wax-mount your wafer, the recipe will eventually fail for Helium Pressure/Flow out of compliance. This is because the cooling Helium leaks through the wafer when the openings get fully etched through.
Once this happens,

*Leave your wafer in the chamber, then

*Edit recipe to set Helium Cooling (first step only) to "Flow Control Only".
*Set to typical flow of normal process from above (Something like ~6sccm? Not sure. Exact value is not critical)
*Re-run the recipe with He on Flow-control only until etch is complete.
|
|-
|Strip Al2O3/SiO2 either with Buffered HF, or same Pan1/2 dry etch as above.
BHF: Eg. ~2min to fully remove SiO2 + Al2O3, with overetch.
|See etch BHF rates of the thin-films on [[Wet Etching Recipes#Table of Wet Etching Recipes|this table]].
|-
|IF wax-mounted - either

*dissolve in Acetone overnight (make sure to excess-fill enough and cover tightly with tinfoil so it doesn't dry up), complete with ACE/ISO rinse

OR

*place wafer on tinfoil-covered hotplate at 150°C, and slide product wafer off, then
**ACE/ISO clean (eg. POLOS) to remove wax.
|
|-
| colspan="2" |''If you '''publish''' using the above process, please consider our [[Frequently Asked Questions#Publications acknowledging the Nanofab|publication policy]]. This process was developed by [[Biljana Stamenic]] and [[Demis D. John]], 2022.''
|}

=== Plasma Dicing (DSEIII) ===
'''''Coming Soon''''': Plasma Dicing process with Dicing Tape as backing film.

This process has been developed by staff, is currently in the final stages of finalizing a public recipe. [[Demis D. John|'''''Contact staff''''']] if you want to use it sooner.

==Silicon: Single-Step, Low Etch Rate, Smooth Sidewall Process (DSEIII)==

*'''SF6-C4F8-CF4 Si Etch v1 (⭐️Production)''' - Developed 2026-01 by [[Noah Dutra]]
**12mT, 20/850W, C4F8/SF6/CF4=68.3/32.5/32.4sccm
**E.R. = 339.4nm/min, Selectivity (to UV6) = 4.9
**Smooth, Vertical, E.R. uniformity is within 5% on wafer
**Tested with 4" wafers that are ~50% open with UV6 PR
*[//wiki.nanotech.ucsb.edu/wiki/images/8/8f/10-Si_Etch_Single_Step_Smooth_Sidewall_DSEIII.pdf Single Step Silicon Etch Recipe and Characterization]
**Older, alternate Si "shallow/smooth" etch recipe.
**Recipe Name: "'''''Nano Trench Etch'''''" (''Production'' - copy to your ''Personal'' category)
**Used instead of Bosch Process, to avoid scalloping on the sidewall.
**Lower selectivity, lower etch rate, smoother sidewalls.

== SiO2 Etch (DSEiii) ==
These recipes were developed to serve as secondary pathways to the calibrated FICP SiO2 and Si etch calibrations [[Process Group - Process Control Data#PlasmaTherm SLR Fluorine Etcher - Process Control|here]]. [https://wiki.nanofab.ucsb.edu/w/images/b/b3/FICP-DSE_Analogous_Recipes.pdf Click here for SEMs comparing both cals].
*'''CF4-C4F8 SiO2 Etch v1 (⭐️Production)''' - Developed 2026-01 by [[Noah Dutra]]
**3mT, 70/800W, C4F8/CF4=7.5/32.5sccm
**E.R. = 270nm/min, Selectivity (to SPR955) = 1.3
**Vertical/Smooth
**Tested by mounting 1cmx1cm piece with oil on 4" Si

==F-ICP Backup Recipes (DSEiii)==
These recipes were developed to serve as backup processes for the calibrated [[Fluorine ICP Etcher (PlasmaTherm/SLR Fluorine ICP)|'''Fluorine-ICP''']] SiO2 and Si etches [[Process Group - Process Control Data#PlasmaTherm SLR Fluorine Etcher - Process Control|here]].

[https://wiki.nanofab.ucsb.edu/w/images/b/b3/FICP-DSE_Analogous_Recipes.pdf Click here for SEMs comparing FICP to DSE etch processes].

*'''[[ICP Etching Recipes#Single-Step Low Etch Rate Smooth Sidewall Process (DSEIII)|Si Etch v1 (⭐️Production)]]'''
*'''[[ICP Etching Recipes#SiO2 Etch (DSEiii)|SiO2 Etch v1 (⭐️Production)]]'''

=[[Fluorine ICP Etcher (PlasmaTherm/SLR Fluorine ICP)|PlasmaTherm/SLR Fluorine Etcher]]=

=== Process Tips ===

* Use the Santovac oil for mounting small pieces to Silicon carrier wafers, or else your resist will burn! Increases thermal conduction to the cooled carrier wafer. (Full-wafers instead get direct Helium cooling.) Careful that the oil does not get anywhere near the outer clamp that holds the wafer down, or your wafer will get stuck.
** The oil fully dissolves in Acetone or NMP. You can clean oil off the back by wiping the back of the sample against an ACE-soaked wipe.
* '''[[Process Group - Process Control Data#PlasmaTherm SLR Fluorine Etcher - Process Control|Process Control Data for this tool]]''' - [[Process Group Internships|Intern-run Etches Weekly]], tracked over time.
** SiO2 and Silicon etche performance is regularly tracked.
** This tells you whether the chamber and tool are operating properly before you run your etch.
** You can follow the intern's travelers for details of their etch.

===Recipe Tips===

*RF1: Bias Power (with DCV readback)
*RF2: ICP Power
*For trouble igniting ICP plasma, add 15 to 75 W of bias power during ignition step. Typical ignition pressures 5 to 10 mT.

==Si Etch Recipes (Fluorine ICP Etcher)==
[[File:PRStrip 019 (1).jpg|alt=Example SEM image|thumb|180x180px|Example of 1.65µm Deep Etched Silicon, 2µm Pitch. (Image Credit: Noah Dutra 2024-09)]]
*'''"SiVertHFv2" (⭐️Production)'''
**20mTorr, RF=18W, ICP=950W, C4F8/SF6/CF4=120/48/54sccm
***This recipe has 2x gas flow compared to "'''''SiVertHF'''''" below - this reduced the loading effect (dependence on % etched area).
**Selectivity Silicon:Photoresist ≈ 5
**Etch Rates: Si ≈ 300-350 nm/min; SiO2 ≈ 30-35 nm/min
**89-90 degree etch angle, ie, vertical.
**High selectivity to Al2O3 masks.
***For high aspect ratio Si etching, try [[Atomic Layer Deposition (Oxford FlexAL)|ALD]] [[Atomic Layer Deposition Recipes#Al2O3 deposition .28ALD CHAMBER 3.29|Al2O3]] (~20-30nm) + [[Atomic Layer Deposition Recipes#SiO2 deposition .28ALD CHAMBER 3.29|SiO2]] (2nm, for PR adhesion) hardmasks followed by [https://wiki.nanotech.ucsb.edu/w/index.php?title=ICP_Etching_Recipes#Al2O3_Etching_.28Panasonic_2.29 Pan2 Al2O3 etch] (will go straight through the thin SiO2 without additional etch time). Works well for allowing thin PR's (eg. [[Stepper 3 (ASML)|DUV]] or [[E-Beam Lithography System (JEOL JBX-6300FS)|EBL]] PR's) to enable deep etches.
**[[ICP Etching Recipes#Process Control: Si Etching C4F8/SF6/CF4 (Fluorine ICP Etcher)|Process Control Data below]] - Staff/Intern-run Etches Weekly, tracked over time (with no BARC layer).
*Old Recipe: [//wiki.nanotech.ucsb.edu/wiki/images/b/b8/SLR_-_SiVertHF.pdf SiVertHF] - Si Vertical Etch using C4F8/SF6/CF4 and resist mask

===Process Notes/Observations===

*Due to high selectivity against SiO2, it may be necessary to run a ~10sec 50W SiO2 etch (below) to remove native oxide on Si. This can be performed ''in situ'' before the Si etch. It's possible this is actually an effect of photoresist open-area - we have conflicting results.
**If you see very low etch rates, try the above SiO2 etch, or try a short [[ICP Etching Recipes#PR/BARC Etch (Fluorine ICP Etcher)|PR/BARC etch]].
*We have observed that full-wafers with small open area in ''photoresist masks'' might require a recalibration of the C4F8/SF6 ratio in order to prevent very low etch rates.

=== Process Control: Si Etching C4F8/SF6/CF4 (Fluorine ICP Etcher) ===
[[File:FICP-Si.png|alt=example of Process Control Charts|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281]]''Full Wafer Si etching with ~50% open area and resist mask, run weekly by [[Process Group Interns|NanoFab Interns]].''

*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=0#gid=0 Si Etching with C4F8/SF6/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/CF4 - '''Plots''']

==SiO2 Etch Recipes (Fluorine ICP Etcher)==
[[File:FL-ICP_50W_SiO2_etch_with_Ru_Hard_Mask.png|alt=SEM of FL-ICP 50W SiO2 etch with Ru Hard Mask|thumb|266x266px|50W SiO2 Etch w/ Ru Hardmask]]
[[File:FL-ICP_200W_SiO2_Etch_with_Ru_Hardmask_-_Ning_Cao.png|alt=SEM of FL-ICP 200W SiO2 Etch with Ru Hardmask - Ning Cao|thumb|266x266px|200W SiO2 Etch w/ Ru Hardmask (Ning Cao)]]
*'''"SiO2 Etch-50W" (⭐️Production)'''
**3.8mT, RF=50W, ICP=900W, CHF3/CF4=10/30sccm
**SiO2 etch rate: ~250nm/min
**Selectivity SiO2:Photoresist ≈ 1.10–1.20
**Selectivity SiO2:Ru ≈ 36
**[[ICP Etching Recipes#SiO2 Etching with CHF3/CF4 (Fluorine ICP Etcher)|Process Control Data Above]] - Staff/Intern-run Etches Weekly, tracked over time.

=== [//wiki.nanotech.ucsb.edu/w/images/f/f6/SiO2_Etch%2C_Ru_HardMask_-_Fluorine_ICP_Etch_Process_-_Ning_Cao_2019-06.pdf SiO2 Etching using Ruthenium Hardmask] ===

* Click above for [http://wiki.nanotech.ucsb.edu/w/images/f/f6/SiO2_Etch%2C_Ru_HardMask_-_Fluorine_ICP_Etch_Process_-_Ning_Cao_2019-06.pdf Full Process Traveler]
** Process written for Sputtered Ru & I-Line GCA Stepper litho
** Can be transferred to ALD Ru or DUV/EBL Litho.

*''Ning Cao & Bill Mitchell, 2019-06''
*''High-selectivity and deep etching using sputtered Ru hardmask and I-Line litho.''
*''Etch also works well with PR masking''
*''Chemistry: CHF3/CF4''
*''Variations in SiO2 etch Bias Power: 50 / 200 / 400W bias.''
*Ru etch selectivity to PR: 0.18 (less than 1): 150nm Ru / 800nm PR
*50W Bias: ('''recommended''')
**Selectivity to photoresist: 1.10–1.20
**SiO2 selectivity to Ru: 36
**SiO2 etch rate: 263nm/min
**''Smoothest vertical etch for SiO2.''
*200W Bias: (higher etch rate)
**SiO2 selectivity to Ru: 38
**SiO2 etch rate: 471nm/min
*This etch is detailed in the following article: [[Template:Publications#Highly Selective and Vertical Etch of Silicon Dioxide using Ruthenium Films as an Etch Mask|W.J. Mitchell ''et al.'', JVST-A, May 2021]]
*Updates: Many users have found that SiO2-masking the Ru hardmask results in vastly improved photoresist selectivity, making litho+etch of small features much better.
**Layer stack looks like: SiO2 (or other dielectric target layer to etch) / Ru hardmask / SiO2 hardmask (thin) / Photoresist.
**Typically strip the masks+PR with all dry etching. That means the entire etch process (all etches and strips) can be run ''in situ'' on the Panasonic ICP in a rapid single-tool etch process.
===Process Control: SiO2 Etching with CHF3/CF4 (Fluorine ICP Etcher)===
[[File:FL-ICP Process Control Data Example.jpg|alt=example of Process Control Charts|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281]]''Full Wafer Si etching with ~50% open area and resist mask, run weekly by [[Process Group Interns|NanoFab Interns]].''
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit?usp=sharing SiO2 Etching with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 SiO2 Etching with CHF3/CF4 - '''Plots''']

==Si3N4 Etching (Fluorine ICP Etcher)==
<code>Developed by Bill Mitchell. Please see [[Frequently Asked Questions#Publications acknowledging the Nanofab|publication policy]].</code>

*ICP = 950/75W
*Pressure = 5mT
*Low Polymer Dep: CF4 = 60sccm
**Etch Rate = 420nm/min (PECVD Si3N4)
*Higher verticality: CF4 = 35 / CHF3 = 25 sccm
**Etch Rate = 380nm/min (PECVD Si3N4)

==Photoresist & ARC (Fluorine ICP Etcher)==
Chain multiple Recipes in a Flow, to allow you to to do ''in situ'' BARC etching, and follow up with ''in situ'' Photoresist Strip.

===PR/BARC Etch (Fluorine ICP Etcher)===
[[File:SEM Image.png|thumb|New PR Strip recipe: Wafer had UV6 or UVN30 as mask. 5min Si etch followed by '''PostBARC Etch/PR Strip (STD)_V2''' with 2min over etch (Credit: [[Gopikrishnan G M|Gopi Meena]])]]
[[File:SEM Image of wafer after PR strip.png|thumb|294x294px|Old PR strip recipe: Wafer had UV6 or UVN30 as mask. 5min Si etch followed by '''PostBARC Etch/PR Strip (STD)''' with 2min over etch (Credit: [[Gopikrishnan G M|Gopi Meena]])]]
*Etching [[Stepper Recipes#DUV-42P|DUV42P-6]] Bottom Anti-Reflection Coating
**~60nm thick (2500krpm)
**O2=20sccm / 10mT / RF1(bias)=100W / RF2(icp)=0W
**45sec-1min

=== Photoresist Strip/Polymer Removal (Fluorine ICP Etcher) ===
'''Old''' PR strip recipe: '''PostBARC Etch/PR Strip (STD)'''
*O2=100sccm / 5mT / RF1(bias)=10W / RF2(icp)=825W
*75W Bias can be helpful for difficult to remove polymers, eg. 2min
*Use laser monitor to check for complete removal, overetch to remove Fluorocarbon polymers.
*Not able to completely remove PR (both negative & positive) after prolonged over etching (over etching of +2min)
*Leaves behind residue on the sides

'''New''' PR strip recipe: '''PostBARC Etch/PR Strip (STD)_V2'''
*O2=100sccm / 5mT / RF1(bias)=100W / RF2(icp)=825W
*RF bias increased by 10x to 100W
*Able to completely remove PR (both negative & positive) after over etching (over etching of +2min)
*Clean surface with no residue

==Cleaning Procedures (Fluorine ICP Etcher)==

* [https://wiki.nanotech.ucsb.edu/w/images/6/69/Cleaning_Rules_for_Fluorine_ICP_Etch_tool.pdf '''Cleaning Rules'''] - for various etches. All cleans are O2 plasma.

=[[ICP Etch 1 (Panasonic E646V)]]=
'''Panasonic ICP#1 is currently down -''' Use Panasonic ICP#2 instead. Most processes directly transfer with only small change in etch rate. Data kept here for historical purposes only.

==SiO2 Etching (Panasonic 1)==

===Recipes===

*[//wiki.nanotech.ucsb.edu/wiki/images/3/3e/Panasonic1-SiO-Etch.pdf SiO2 Vertical Etch Recipe Parameters - CHF3 "SiOVert"]
**Etch rate ≈ 2300Å/min (users must calibrate)
**Selectivity (SiO2:Photoresist) ≈ greater than 1:1 (users must calibrate)

===Recipe Variations===
''Use these to determine how each etch parameter affects the process.''

*[//wiki.nanotech.ucsb.edu/wiki/images/5/5e/Panasonic1-SiO2-Data-Process-Variation-CHF3-revA.pdf SiO2 CHF3 Etch Variations] - CHF3 with varying Bias and Pressure & Slanted SiO2 etching

==SiNx Etching (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/c/ce/Panasonic1-SiN-Etch-Plasma-CF4-O2-ICP-revA.pdf SiNx Etch Rates and Variations - CF4-O2]

==Al Etch (Panasonic 1)==

*[https://wiki.nanotech.ucsb.edu/wiki/images/3/3b/Panasonic-1-Al-Etch-RevA.pdf Al Etch Recipes - Cl2BCl3]
*[https://wiki.nanotech.ucsb.edu/wiki/images/6/60/32-Reducing_AlCl3_Corrosion_with_CHF3_plasma.pdf AlCl3 Erosion Issue and the Solution]

==Cr Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/8/88/Panasonic-1-Cr-Etch-revA.pdf Cr Etch Recipes - Cl2O2]

==Ta Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/f/f2/104_Ta_Etch.pdf Ta Etch Recipe] - Cl2/BCl3

==Ti Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/4/47/Panasonic-1-Ti-Etch-Deep-RevA.pdf Ti Deep Etch Recipes - Cl2Ar]
**See [[doi:10.1149/1.2006647|E. Parker, ''et. al.'' Jnl. Electrochem. Soc., 152 (10) C675-C683 2005]].

==W-TiW Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/7/76/Panasonic1-TiW-W-Etch-Plasma-RIE-RevA.pdf Ti-TiW Etch Recipes - SF6Ar]

==GaAs-AlGaAs Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/b/bb/Panasonic1-GaAs-PhotonicCrystal-RIE-Plasma-Nanoscale-Etch-RevA.pdf GaAs-Nanoscale Etch Recipe - PR mask - Cl2-BCl3-Ar]
*[//wiki.nanotech.ucsb.edu/wiki/images/2/26/12-Plasma_Etching_of_AlGaAs-Panasonic_ICP-1-Etcher.pdf AlGaAs Etch Recipes - Cl2N2]
*[//wiki.nanotech.ucsb.edu/wiki/images/0/04/Panasonic1-GaAs-Via-Etch-Plasma-RIE-Fast-DRIE-RevA.pdf GaAs DRIE via Etch Recipes - Cl2-BCl3-Ar PR passivation]

==GaN Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/d/d6/07-GaN_Etch-Panasonic-ICP-1.pdf GaN Etch Recipes Cl2N2]
*[//wiki.nanotech.ucsb.edu/wiki/images/6/60/Panasonic1-GaN-AlGaN-Selective-Etch-Plasma-RIE-ICP-RevA.pdf GaN Selective Etch over AlGaN Recipes BCl3-SF6]

==Photoresist and ARC Etching (Panasonic 1)==
[https://wiki.nanotech.ucsb.edu/w/index.php?title=ICP_Etching_Recipes#Photoresist_and_ARC_etching_.28Panasonic_2.29 Please see the recipes for Panasonic ICP#2] - the same recipes apply.

Etching of DUV42P at standard spin/bake parameters also completes in 45 seconds.

==SiC Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/d/d0/Panasonic_1-SiC-ICP-RIE-Etch-Plasma-SF6-RevA.pdf SiC Etch Recipes Ni Mask - SF6]

==Sapphire Etch (Panasonic 1)==

*[//wiki.nanotech.ucsb.edu/wiki/images/3/3a/Panasonic1-sapphire-etch-RIE-Plasma-BCl3-ICP-RevA.pdf Sapphire Etch Recipes Ni and PR Mask - BCl3-Cl2]

==Cleaning Recipes==
'''''To Be Added'''''

==Old Deleted Recipes==
Since there are a limited number of recipe slots on the tool, we occasionally have to delete old, unused recipes.

If you need to free up a recipe slot, please contact the [[ICP Etch 1 (Panasonic E626I)|tool's Supervisor]] and they'll help you find an old recipe to replace. We take photographs of old recipes, and save them in case a group needs to revive the recipe. Contact us if your old recipe went missing.

==Process Control Data (Panasonic 1)==

===SiO2 Etch with CHF3/CF4 - Process Control Data (Panasonic 1)===

*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP1 Process Control Data Example.jpg|alt=example chart of ICP1 SiO2 Process Control Chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281]]

=[[ICP Etch 2 (Panasonic E626I)]]=
Recipes starting points for materials without processes listed can be obtained from Panasonic1 recipe files. The chambers are slightly different, but essentially the same, requiring only small program changes to obtain similar results.

=== Process Tips ===

* Use the Santovac oil for mounting small pieces to Silicon carrier wafers, or else your resist will burn! Increases thermal conduction to the cooled carrier wafer. (Full-wafers instead get direct Helium cooling.) Careful that the oil does not get on the ''back'' of the carrier wafer or you will get Helium cooling errors.
** The oil fully dissolves in Acetone or NMP. You can clean oil off the back by wiping the back of the sample against an ACE-soaked wipe.
* See the '''Process Control sections below''' - [[Process Group Interns|NanoFab Interns]] run Etches Weekly, tracked over time.
** This tells you whether the chamber and tool are operating properly before you run your etch.
** You can follow the intern's travelers for details of their etch, and see their SEM's.

==SiO2 Etching (Panasonic 2)==

===Recipes===

*[//wiki.nanotech.ucsb.edu/wiki/images/9/9e/33-Etching_SiO2_with_Vertical_Side-wall.pdf SiO2 Vertical Etch Recipe#2 - CF4/CHF3]
**''This etch is used in our Process Control weekly cals run by [[Process Group Interns|NanoFab Interns]]. Very stable over time ±5%.''
*[//wiki.nanotech.ucsb.edu/wiki/images/1/1e/Panasonic2-ICP-Plasma-Etch-SiO2-nanoscale-rev1.pdf SiO2 Nanoscale Etch Recipe - CHF3/O2]
*[//wiki.nanotech.ucsb.edu/wiki/images/d/d5/Panasonic2-SiOx-Recipe.pdf SiO2 Vertical Etch Recipe - CHF3 "SiOVert"]
**Direct copy of "SiOVert" from ICP#1, [[ICP_Etching_Recipes#SiO2_Etching_.28Panasonic_1.29|see parameters there]].

===Recipe Variations===
''Use these to determine how etch parameters affect the process.''

*[https://wiki.nanotech.ucsb.edu/wiki/images/1/1e/05-SiO2_Nano-structure_Etch.pdf Angled SiO2 sidewall recipes]

===Process Control: SiO2 Etch with CHF3/CF4 (Panasonic 2)===
[[File:ICP2 Process Control Data Example.jpg|alt=example ICP2 process control chart|thumb|269x269px|[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 Click for Process Control Charts] for SiO2 etching.|link=https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281]]''Weekly cal etches of the CF4/CHF3 SiO2 etch, run by [[Process Group Interns|NanoFab Interns]].''
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots''']

==SiNx Etching (Panasonic 2)==

*[//wiki.nanotech.ucsb.edu/wiki/images/0/06/Panasonic2-ICP-Plasma-Etch-SiN-nanoscale-rev1.pdf SiNx Nanoscale Etch Recipe - CHF3/O2]

==Al Etch (Panasonic 2)==

*[https://wiki.nanotech.ucsb.edu/wiki/images/3/3b/Panasonic-1-Al-Etch-RevA.pdf Al Etch Recipes - use panasonic 1 parameters, etch rate 50% higher]

==Al2O3 Etching (Panasonic 2)==
[//wiki.nanotech.ucsb.edu/wiki/images/d/d2/Brian_Markman_-_Al2O3_ICP2_Etch_Rates_2018.pdf ALD Al2O3 Etch Rates in BCl3 Chemistry] (click for plots of etch rate)

''Contributed by Brian Markman, 2018''

*BCl3 = 30sccm
*Pressure = 0.50 Pa
*ICP Source RF = 500
*Bias RF = 50W or 250W (250W can burn PR)
*Cooling He Flow/Pressure = 15.0 sccm / 400 Pa
*Etch Rate 50W: 39.6nm/min (0.66nm/sec)
*Etch Rate 250W: 60.0nm/min (1.0 nm/sec)

==GaAs Etch (Panasonic 2)==

*GaAs Etch Cal - ''Noah Dutra & Fatt Foong, 2025-02-12''
**Etch Rates ~1um/min, Selectivity to SiO2 ~ 27:1, Sidewalls ~ 90°
**Etch Rate/Selectivity [https://wiki.nanofab.ucsb.edu/w/images/7/76/GaAs_pressure_experiment.png highly sensitive to pressure] (image credit: Terry Guerrero)
**Cal Sample: ~1cm sample etched mounted with oil onto 150mm Si carrier
**Recipe: 0.5Pa, 100/900W, N2/Cl2=10/20sccm
*[//wiki.nanotech.ucsb.edu/wiki/images/f/ff/16-GaAs_etch-ICP-2.pdf Non-Calibration GaAs Etch Recipes - Panasonic 2 - Cl2N2]

===Process Control: GaAs Etch with N2/Cl2 (Panasonic 2)===
[[File:GaAs Etch ICP2 SPC.png|alt=example ICP2 process control chart|thumb|249x249px|[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts] for GaAs etching.|link=https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281]]
*[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=0#gid=0 GaAs Etch with N2/Cl2 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 GaAs Etch with N2/Cl2 - '''Plots''']

==Photoresist and ARC etching (Panasonic 2)==
Basic recipes for etching photoresist and Bottom Anti-Reflection Coating (BARC) underlayers are as follows:

===ARC Etching: DUV-42P or AR6 (Panasonic 2)===

*O2 = 40 sccm // 0.5 Pa
*ICP = 75W // RF = 75W
*45 sec for full etching (incl. overetch) of ~60nm [[Stepper Recipes#DUV-42P-6|DUV-42P]] (same as for AR6; 2018-2019, [[Demis D. John|Demis]]/[[Brian Thibeault|BrianT]])

===Photoresist Etch/Strip (Panasonic 2)===
Works very well for photoresist stripping

*O2 = 40 sccm // 1.0 Pa
*ICP = 350W // RF = 100W
*Etch Rate for UV6-0.8 (DUV PR) = 518.5nm / 1min (2019, [[Demis D. John|Demis]])
*2m30sec to fully remove UV6-0.8 with ~200% overetch (2019, [[Demis D. John|Demis]])

==Ru (Ruthenium) Etch (Panasonic 2)==

*[https://wiki.nanotech.ucsb.edu/wiki/images/e/e9/194_Ru_Etch_O2%2CCl2.pdf Ru Etch] - ''[[Bill Mitchell]] 2019-09-19''
**''This etch is used in the following publication:'' [[Template:Publications#Highly Selective and Vertical Etch of Silicon Dioxide using Ruthenium Films as an Etch Mask|W.J. Mitchell, "Highly Selective and Vertical Etch of Silicon Dioxide using Ruthenium Films as an Etch Mask" (JVST-A, 2021)]]

=[[Oxford ICP Etcher (PlasmaPro 100 Cobra)]]=

=== Process Tips ===
* Use the Santovac oil for mounting small pieces to Silicon carrier wafers, or else your resist will burn! Increases thermal conduction to the cooled carrier wafer. (Full-wafers instead get direct Helium cooling.) Careful that the oil does not get anywhere near the outer clamp that holds the wafer down, or your wafer will get stuck.
** The oil fully dissolves in Acetone or NMP. You can clean oil off the back by wiping the back of the sample against an ACE-soaked wipe.
* InP requires fairly high temperatures for making the Indium products volatile - so going to full-wafers (which are cooler) may requiring the table temperature. We have found that temperatures of ~150⁰C minimum may be required for preventing grassing etc.
* See the '''Process Control sections below''' - [[Process Group Interns|NanoFab Interns]] run Etches Weekly, tracked over time.
** This tells you whether the chamber and tool are operating properly before you run your etch.
** You can follow the intern's travelers for details of their etch.

==InP Ridge Etch (Oxford ICP Etcher)==
===High-Temp (200°C) InP Etch Process===

*InP Ridge Etch 200°C - ''Noah Dutra & Fatt Foong, 2025-08-12''
**Etch rates ~2 um/min, Selectivity to SiO2 ~ 30:1, Sidewalls ~90°
**Very dependent on open area, more area => lower E.R.s
**Cal Sample: ~1cm sample etched with 1 quarter of blank 50mm InP seasoning wafer placed '''without''' mounting adhesive on blank Silicon carriers (rough side up).
**Recipe: Cl2/H2/Ar - 200°C

==== Process Control: High-Temp (200°C) InP Etch ====
[[File:200C InP.png|alt=example SPC chart for Oxford ICP Etcher|thumb|218x218px|[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts] for 200°C InP Etch|link=https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281]]''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/H2/Ar @ 200°C, 1cm piece with ~50% SiO2 hardmask.''
*[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Plots''']

===Low-Temp (60°C) InP Etch Process===
*[[Media:Oxford Etcher - InP Ridge Etch using Oxford PlasmaPro 100 Cobra - 2021-09-08.pdf|Low-Temp InP Ridge Etch Characterization]] - ''Ning Cao, 2021-09-08''
**''No longer calibrating 60°C process as of 05-2025''.
**InP etches were characterized with '''no''' mounting adhesive used, 1/4-wafer of 50mm wafer placed on blank Silicon carriers (rough side up).
**Recipe: Cl2/CH4/H2 - 60°C
**NOTE: Rates in these 2021-09 characterizations are lower than current due to a software timing bug, fixed in 2022-01
*See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning.

==== Process Control: Low-Temp (60°C) InP Etch ====
[[File:Oxford-ICP-Etch Process Control Data Example.jpg|alt=example SPC chart for Oxford ICP Etcher|thumb|225x225px|[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 Click for Process Control Charts] for 60°C InP Etch|link=https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281]]
2025-08-12: No longer run as weekly cal process, replaced by above 200°C Cl2/H2/Ar etch. Data below is for historical purposes only.
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/CH4/H2 @ 60°C, 1cm piece with ~50% SiO2 hardmask.''

*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?usp=sharing "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Plots''']

====[[Oxford Etcher - Sample Size Effect on Etch Rate|Sample Size effect on Etch Rate]]====
''See the above table for data showing effect on sample size/exposed etched area.''

==InP Grating Etch (Oxford ICP Etcher)==

*[[Media:Oxford Etcher - InP Grating Etch at 20 C - Oxford Cobra 300 2021-08-26.pdf|InP/InGaAsP Grating Etch Characterization]] - ''Ning Cao, 2021-08-26''
**InP/InGaAsP etches were characterized with '''no''' mounting adhesive used, 1/4-wafer of 50mm wafer placed on Silicon carriers (rough side up).
**Recipe: Cl2/CH4/H2/Ar - 20°C
**NOTE: Rates in these 2021-09 characterizations are lower than current due to a software timing bug, fixed in 2022-01
*See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning.

== GaN Etch (Oxford ICP Etcher) ==
*''OLD 4" configuration: [https://drive.google.com/file/d/1B-Xg254T-RdALisnms0jvpJQ34i5TNXN/view?usp=drive_link Std GaN Etch - BCl3/Cl2/Ar - 200C Etch Characterization] - G.G.Meena, 2024-11-01''
**Etches characterized on ~1cmx1cm die, on 4<nowiki>''</nowiki> Si carrier wafer. Die has a SiN hard mask.
**Also includes explanation of the Taguchi (L9) DOE method for learning how process variables interact.
**[https://docs.google.com/spreadsheets/d/1QELHE6VUgq-xIfwIE50ddnsDtm7yfiOM/edit?usp=drive_link&ouid=103527106727572807737&rtpof=true&sd=true Etch development traveler with detailed characterization data]
**See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning.

==== Process Control: GaN Etch ====
CURRENT Recipe: ''6" STD GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm with 6" configuration, ''~850nm deep GaN Etch with Cl2/BCl3/Ar at 200°C. GaN-on-Sapphire substrate with SiN mask.''

* This recipe is the same as the 4" (old) Std recipe but with 140% flows. Current recipe is 200c, 4.5mT, 700W/50W, Cl2/Ar/BCl3 = 49.1/16.4/11.6sccm.

* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 CURRENT 6" configuration: GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 CURRENT 6" configuration: GaN Etching with Cl2/BCl3/Ar at 200°C - Plots]

[[File:GaN SPC.png|alt=example of Process Control Charts|thumb|[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 Click for Process Control Charts] for GaN Etch|link=https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279|219x219px]]OLD Recipe: ''Std GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm with 4" configuration, ''~1.2µm deep GaN etch with Cl2/BCl3/Ar at 200°C.'' ''GaN-on-Sapphire substrate with SiN mask.''
*[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 OLD 4" configuration: GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
*[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 OLD 4" configuration: GaN Etching with Cl2/BCl3/Ar at 200°C - Plots]
==GaAs Etch (Oxford ICP Etcher)==
*''[https://drive.google.com/file/d/1Q4pmX5M9v9dCD1xOg74kYguV12Szh9be/view?usp=drive_link Std GaAs Etch - BCl3/Ar - 20C Etch Characterization] - G.G.Meena, 2025-01-09''
**Etch characterization on 1cmx1cm die, on 4<nowiki>''</nowiki> Si carrier wafer. Die has SiO hard mask
**Also tested etch with PR mask.
**See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning
*''[https://wiki.nanofab.ucsb.edu/w/images/d/d1/GaAs_Etch_Ver3_Recipe_Finalized_120925.pdf Std GaAs Etch - Cl2/N2 - 30C Etch Characterization] - F. Foong, 2025-12-10''
**Etch characterization on 1cmx1cm die, on 4<nowiki>''</nowiki> Si carrier wafer. Die has SiO hard mask
**See [[Oxford ICP Etcher (PlasmaPro 100 Cobra)#Documentation|Operating Procedure]] for full traveler and post-cleaning

==GaN Atomic Layer Etching (Oxford ICP Etcher)==
''GaN-ALE Recipe written and tested by users - contact [[Tony Bosch|supervisor]] for use.''

==Cleaning Recipes (Oxford ICP Etcher)==
'''''To Be Added: Required cleaning time & recipes'''''

Process Group - Process Control Data

2026-08-31T17:42:10Z

John d: /* Si Etching (FL-ICP Process Control) */

Process Control Data are standardized processes, run by the NanoFab, allowing for day-to-day or year-by-year comparisons of a tool's performance at the process level. This is similar [https://en.wikipedia.org/wiki/Statistical_process_control Statistical Process Control (SPC)].

These are the same links are found on individual tool pages, in the '''''<<tool page>> > Process Control''''' section.

__TOC__

Data are collected by our [https://nanofab.ucsb.edu/workforce#internships Process Group Interns] and reviewed by [[Staff List#Process Group|Process Group Staff]].
=Deposition, Dielectric (Process Control Data)=
[[File:PECVD SPC Chart Example.png|alt=SPC chart example|thumb|228x228px|Example Process Control Charts (SPC) for thin-film DepCals.|link=]]
[[File:Surfscan 230113A7G2 after low particles.jpg|alt=screenshot of surfscan particle count|thumb|205x205px|Example particle counts taken on each tool+film.|link=]]
[[File:PECVD1 SiO2 F50 WaferMap example.jpg|alt=Screenshot of Filmetrics F50 wafermap of typical DepCals film|thumb|215x215px|Example of DepCals Thickness/Refractive Index uniformity measurement (4% shown here).|link=]]
''Process Control data for various deposition tools in the lab.''

==[[PECVD Recipes#PECVD 1 .28PlasmaTherm 790.29|PECVD #1 (PlasmaTherm 790)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=1270764394 PECVD#1: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=0 PECVD#1: SiO2]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=98787450 PECVD#1: Si3N4]

==[[PECVD Recipes#PECVD 2 .28Advanced Vacuum.29|PECVD #2 (Advanced Vacuum)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=272916741 PECVD#2: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=1313651154 PECVD#2: SiO2]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=773875841 PECVD#2: Si3N4]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=584923738 PECVD#2: Low-Stress Si3N4]
**[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=203400760 Plots of Low-Stress Si3N4 Data]

==[[PECVD Recipes#ICP-PECVD .28Unaxis VLR.29|ICP-PECVD (Unaxis VLR Dep)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948 ICP-PECVD: Plots of SiO2 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=345725577 ICP-PECVD: Plots of Si3N4 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=0 ICP-PECVD: SiO2 Low-Dep Rate (LDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1459210138 ICP-PECVD: SiO2 High-Dep Rate (HDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1670372499 ICP-PECVD: Si3N4]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1517031044 ICP-PECVD: Si3N4 Low-Stress]

==[[Sputtering Recipes#Ion Beam Deposition .28Veeco NEXUS.29|Ion Beam Sputter Deposition (Veeco Nexus)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=2030038046 IBD: Plots of all data]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=0 IBD: SiO2]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=971672318 IBD: Si3N4]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=855566098 IBD: Ta2O5]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=713133870 IBD: Al2O3]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=834404663 IBD: TiO2]

===Old Data (Pre 2022)===
Old data in a different format can be found below:

*[[Old Deposition Data - 2021-12-15]]

<hr style="height:5px">
<hr style="height:5px">
=Deposition, Metal - Process Control Data=
''Process Control data for various deposition tools in the lab.''

== [[Sputter 5 (AJA ATC 2200-V)]] - Process Control ==
[[File:Process Control - Sputter 5 Titanium Sheet Resistance plot.png|alt=Screenshot of Sputter 5 Titanium Sheet Resistance process control chart|thumb|Sputter 5 Titanium - Sheet Resistance - Process Control Chart - '''Example''' data only.

← click a link for live data.|link=]]

=== Sputter 5: Ti ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=695635057#gid=695635057 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Titanium Plots]

=== Sputter 5: Al ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=0#gid=0 Aluminum Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Aluminum Plots]

=== Sputter 5: Cr ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=572205583#gid=572205583 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Chromium Plots]

== [[E-Beam 4 (CHA)]] - Process Control ==
[[File:Process Control - E-Beam 4 Titanium Stress plot.png|alt=Screenshot of E-Beam 4 Titanium Stress - process control chart|thumb|E-Beam 4 Titanium Stress - Process Control Chart. '''Example''' data only -

← click a link for live data.|link=]]

=== E-Beam 4: Ti ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=384597990#gid=384597990 Titanium Plots]

=== E-Beam 4: Au ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=834604706#gid=834604706 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=721807140#gid=721807140 Gold Plots]

=== E-Beam 4: Cr ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1629968393#gid=1629968393 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=701729811#gid=701729811 Chromium Plots]

=== E-Beam 4: Ni ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=649905488#gid=649905488 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1525197973#gid=1525197973 Nickel Plots]

== [[E-Beam 1 (Sharon)]] - Process Control ==

=== E-Beam 1: Ti ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1305007052#gid=1305007052 Titanium Plots]

=== E-Beam 1: Au ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1762267354#gid=1762267354 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1245613525#gid=1245613525 Gold Plots]

=== E-Beam 1: Cr ===
*[https://wiki.nanofab.ucsb.edu/wiki/Process_Group_-_Process_Control_Data?veaction=edit&section=7 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=424169133#gid=424169133 Chromium Plots]

=== E-Beam 1: Ni ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=679240351#gid=679240351 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1463522927#gid=1463522927 Nickel Plots]

<hr style="height:5px">
<hr style="height:5px">
=Etching (Process Control Data)=
''Process Control data for various dry etching tools in the lab.''

==[[ICP Etching Recipes#Process Control Data .28Fluorine ICP Etcher.29|PlasmaTherm SLR Fluorine Etcher]] - Process Control==

=== SiO2 Etching (FL-ICP Process Control) ===
''We have found that SiO2 etching is fairly insensitive to chamber condition.''
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit?usp=sharing SiO2 Etching with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 SiO2 Etching with CHF3/CF4 - '''Plots'''][[File:FL-ICP Process Control Data Example.jpg|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281]]

====Old SiO2 Process Control Data====

*[[Test Data of Etching SiO2 with CHF3/CF4-Fluorine ICP Etcher|SiO2 Etching with CHF3/CF4 (FL-ICP]]) - ''No data prior to 2023-01-20''

=== Si Etching (FL-ICP Process Control) ===
''This Si etch is much more sensitive to chamber condition, allowing us to detect tool issues faster.''

*'''Recipe: [[ICP Etching Recipes#Si Etch Recipes (Fluorine ICP Etcher)|SiVertHFv2]]''' - C4F8/SF6/CF4 etch of 100mm Silicon Wafer with ~50% open area and resist mask

*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=0#gid=0 Si Etching with C4F8/SF6/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/CF4 - '''Plots'''][[File:FICP-Si.png|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281]]
==[[ICP Etching Recipes#Process Control Data .28Panasonic 1.29|Panasonic ICP #1]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP1 Process Control Data Example.jpg|alt=example chart of ICP1 SiO2 Process Control Chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4-ICP1|SiO2 Etch with CHF3/CF4 (Panasonic 1)]] - ''No data prior to 2023-01-20''

== [[ICP Etching Recipes#Process Control Data .28Panasonic 2.29|Panasonic ICP#2]] - Process Control ==

=== GaAs Etch with N2/Cl2 - Process Control Data (Panasonic 2) ===

* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=0#gid=0 GaAs Etch with N2/Cl2 - '''Etch Data''']
* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 GaAs Etch with N2/Cl2 - '''Plots'''][[File:GaAs_Etch_ICP2_SPC.png|link=https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281|alt=example ICP2 process control chart|none|thumb|249x249px|[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]]]

=== SiO2 Etch with CHF3/CF4 - Process Control Data (Panasonic 2) ===

*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP2 Process Control Data Example.jpg|alt=example ICP2 process control chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4|SiO2 Etching with CHF3/CF4 - ICP2]] - ''No data prior to 2023-01-20''

==[[ICP Etching Recipes#Process Control Data .28Unaxis VLR.29|Unaxis VLR Etch]] - Process Control==

*[[Unaxis VLR Etch - Process Control Data|InP Etching with Cl2/H/Ar @ 200°C - Unaxis Etch]]

==[[ICP Etching Recipes#Process Control Data .28Oxford ICP Etcher.29|Oxford PlasmaPro Cobra Etcher]] - Process Control==

=== Std InP Ridge Etch Cl2/H2/Ar/200°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/H2/Ar @ 200°C, 1cm piece with ~50% SiO2 hardmask.''

* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Etch Data Tables''']
* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Plots''']
[[File:200C InP.png|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281]]

=== Std InP Ridge Etch: Cl2/CH4/H2/60°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/CH4/H2 @ 60°C, 1cm piece with ~50% SiO2 hardmask. No longer calibrating this recipe.''

*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=1552080791#gid=1552080791 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Plots'''][[File:Oxford-ICP-Etch Process Control Data Example.jpg|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281]]

====Old InP Ridge Etch Data====

*[[Oxford ICP Etcher - Process Control Data|InP Ridge Etch with Cl2/CH4/H2 @ 60°C]] - ''No data prior to 2023-01-20''

=== GaN Etch (Cl2/BCl3/Ar/200°C) ===
Recipe: ''Std GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm ''~1.2µm deep GaN etch with Cl2/BCl3/Ar at 200°C.'' Sapphire substrate with SiO2 mask for GaN.

* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 GaN Etching with Cl2/BCl3/Ar at 200°C - Plots][[File:GaN SPC.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279]]
<hr style="height:5px">
<hr style="height:5px">

== [[DSEIII (PlasmaTherm/Deep Silicon Etcher)|PlasmaTherm DSEIII Deep Silicon Etcher]] - Process Control ==

=== Si Bosch Etching C4F8/SF6/Ar ===
*Recipe: ''STD_Bosch_Si (⭐️Production),'' on 100mm Si Wafer with ~50% open area, photoresist mask, ~40µm deep

*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=0#gid=0 Si Etching with C4F8/SF6/Ar - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/Ar - '''Plots'''][[File:DSE plot.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281]]
<hr style="height:5px">
<hr style="height:5px">

=Lithography (Process Control Data)=
''Process Control Data for Nanofab Lithography/patterning tools.''

==[[Stepper_Recipes#Stepper_3_.28ASML_DUV.29|Stepper #3 (ASML DUV)]] - Process Control==

*''The Process Group regularly measures data on lithography Critical Dimension ("CD") and Wafer-stage Particulate Contamination for this tool, using a sensitive lithography process that will reveal small changes in Dose repeatability and wafer flatness.''
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 '''Plots of CD Repeatability''']
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 '''Data for CD Uniformity and Particulate Contamination''']

:{|
|[[File:ASML CD Cals - Example Table.jpg|alt=ASML CD Calibration data - Screenshot of Table|none|thumb|300x300px|''Example of Data Table with SEM's of 320nm features. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 Click for full data table.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0]]
|[[File:ASML CD Cals - Example Plot.jpg|alt=ASML CD Calibration Data - Screenshot of SPC Plot|none|thumb|''Example SPC Chart - Measured Critical Dimension "CD" versus Date. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 Click for charts.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281]]
|}

== Maskless Aligner (Heidelberg MLA150) - Process Control ==

* ''The Process Group measures the smallest "clean" line-space pitch (by SEM) at different locations on the wafer, and calls this the "best resolution" for that region of the wafer.'' ''Measured with 0.25µm steps.''
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?usp=drive_link '''Data sheet'''], listing measured values, includes links to travelers & SEM's etc.
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?gid=167054213#gid=167054213 '''Plots''' of "best" resolution across wafer] - chart of resolution vs. time

[[File:MLA LithoCal Chart screenshot.png|alt=MLA LithoCal Chart screenshot|none|thumb|Example SPC Charts for MLA LithoCal "best" resolution. ]]
:

Stocked Chemical List

2026-08-24T16:26:17Z

John d: removed Honeywell SOG

''You can sort the following table using the ↑ / ↓ buttons in the title row. Your browser's "Find" ⌘-F function also works.''
{| class="wikitable sortable"
!'''CHEMICAL'''
!'''DESCRIPTION'''
!'''VENDOR'''
!Other Names/Notes
|-
|Acetone, 4L, 4 bt = 1 cs
|ACETONE ACS SAFE-COTE 4L Percent Purity ≥99.5%
|FISHER SCIENTIFIC
|ACE
|-
|Propanol, 4L, 4 bt = 1 cs
|2-PROPANOL OPTIM AGRADE Percent Purity ≥99.9%
|FISHER SCIENTIFIC
|ISO, IPA, Isopropanol
|-
|Ethanol
|DEHYDRATED ALCOHOL, 200 PROOF, UNDENATURED, USP GRADE- 4LGLASS
|SPECTRUM CHEMICALS & LAB
|
|-
|Methanol, 4L, 4 bt = 1 cs
|METHANOL OPTIMA GRADE 4L Percent Purity ≥99.9%
|FISHER SCIENTIFIC
|
|-
|Toluene, 4 L
|TOLUENE OPTIMA GRADE 4L Percent Purity ≥99.8%
|FISHER SCIENTIFIC
|
|-
|Ethylene Glycol
|ETHYLENE GLYCOL LABORATORY GRADE
|FISHER SCIENTIFIC
|
|-
|Amyl Acetate, 4L bottle
|AMYL ACETATE LABORATORY GRADE 4L
|FISHER SCIENTIFIC
|
|-
|MIBK, 4L bottle
|Methyl iso-Butyl Ketone (Certified ACS), Grade Certified ACS Reagent
|FISHER SCIENTIFIC
|
|-
|Chloroform, 2.5 L
|Chloroform, 99+%, Acros Organics
|FISHER SCIENTIFIC
|
|-
|Xylenes, 1 liter
|XYLENES ACS 4L Percent Purity ≥98.5%
|FISHER SCIENTIFIC
|
|-
|T1100 BCB rinse solvent
|RINSE T1100 4 LITER GLASS BOTTLE
|MICROCHEM CORP.
|
|-
|Nitric, 500ml.
|NITRIC ACID IND SAFECOTE 2,5L, Assay Percent Range 70%
|FISHER SCIENTIFIC
|
|-
|Sulfuric, 2.5 L
|SULFURIC AC 21/2L IND SAFECOTE Assay Percent Range 95.0 to 98.0 w/w %
|FISHER SCIENTIFIC
|H2SO4
|-
|O-Phosphoric, 2.5 L
|O-PHOSPHORIC ACID Percent Purity ≥85.0% (w/w)
|FISHER SCIENTIFIC
|H3PO4
|-
|Citric acid, liquid, 1.0 M, 1L
|CITRIC ACID, 1.00 Molar
|FISHER SCIENTIFIC
|C6H8O7, solution
|-
|50/50 w/w Citric Acid Monohydrate in Water
|PREMIX CITRIC ACID CAW 1:1
|TRANSENE COMPANY, INC.
|C6H8O7, solution
|-
|Citric acid, granular, monohydrate, 3 kg
|CITRIC ACID GRAN CERT ACS 3KG Percent Purity 99.0 to 102.0%
|FISHER SCIENTIFIC
|C6H8O7, powder
|-
|Acetic, 2.5L
|ACETIC ACID GLACIAL ACS 2.5L IND SAF-CT Assay Percent Range: ≥99.7% w/w
|FISHER SCIENTIFIC
|
|-
|Hydrochloric, 2.5L
|HYDROCHLORIC ACID Percent Purity 36.5 to 38.0% (w/w)
|FISHER SCIENTIFIC
|HCl
|-
|Hydrofluoric, 49%, 500 Ml
|HYDROFLUORIC ACID RGT 500ML Assay (HF) 48 - 51%
|VWR INTERNATIONAL
|HF
|-
|Hydrofluoric, Buffered HF, 1 gal
|BUFFER-HF
|TRANSENE COMPANY, INC.
|BHF, "Buffered oxide etch"
4-8% HF
|-
|Hydrobromic, 500 mL
|HYDROBROMIC ACID 48% CERT ACS 500ML Percent Purity 47.0 to 49.0%
|FISHER SCIENTIFIC
|HBr
|-
|Chrome mask etchant, 1 qt
|CHROMIUM ETCHANT 1020
|TRANSENE COMPANY, INC.
|
|-
|Aluminum etchant, A, 1 qt
|ALUMINUM ETCHANT TYPE A
|TRANSENE COMPANY, INC.
|
|-
|Aluminum etchant, D, 1 qt
|ALUMINUM ETCHANT TYPE D
|TRANSENE COMPANY, INC.
|
|-
|Gold etchant, TFA, 1 qt
|GOLD ETCHANT TFA
|TRANSENE COMPANY, INC.
|
|-
|Nickel etchant, TFB, 1 qt.
|NICKEL ETCH TFB
|TRANSENE COMPANY, INC.
|
|-
|Titanium etchant, TFTN
|TITANIUM ETCHANT TFTN
|TRANSENE COMPANY, INC.
|
|-
|Nanostrip
|KMG-Nanostrip
|INTEGRATED MICRO MATERIALS
|
|-
|Oxalic Acid
|OXALIC ACID CERTIF ACS 500G Percent Purity 99.5 to 102.5%
|FISHER SCIENTIFIC
|
|-
|Formic Acid
|FORMIC ACID 2.5LT 98% (ACS)
|FISHER SCIENTIFIC
|
|-
|Chromic Acid (Chromium Trioxide)
|Chromium Trioxide (Crystalline/Certified ACS) Percent Purity ≥98.0%
|FISHER SCIENTIFIC
|CrO3
|-
|Ammonium hydroxide, 2.5 L
|AMMONIUM HYDROXIDE ACS Assay Percent Range: 28.0 to 30.0 w/w %
|FISHER SCIENTIFIC
|NH4OH
|-
|Ammonium sulfide, 500 mL
|AMMONIUM SULFIDE SOLUTION Assay Percent Range 20 to 24% (aqueous)
|FISHER SCIENTIFIC
|(NH4)2S
|-
|Sodium hydroxide, 1L
|SODIUM HYDROX SOL 50% CERT 1L Percent Purity Inclusive between 50%
|FISHER SCIENTIFIC
|NaOH
|-
|Potassium hydroxide, 43.
|POT HYDROX SOL 45% CERT 4L Concentration or Composition (by Analyte or Components) 45%
|FISHER SCIENTIFIC
|KOH
|-
|Hydrogen peroxide, 500 mL
|HYDROGEN PEROXIDE 30% Percent Purity 30.0 to 32.0%
|FISHER SCIENTIFIC
|H2O2
|-
|Hydrogen peroxide, 1 gal
|HYDROGEN PEROXIDE 30% Percent Purity 30.0 to 32.0%
|FISHER SCIENTIFIC
|H2O2
|-
|TMAH, 25%, per liter
|TETRAMETHYLAMMONIUM HYDROXIDE, 25%
|TRANSENE COMPANY, INC.
|
|-
|Saturated Bromine Water (SBW), 1L
|BROMINE WATER RGT 500ML Percent Purity ≥99.5%
|FISHER SCIENTIFIC
|Br2 : H2O
|-
|AZ400k developer, concentrated, 1 gal
|AZ 400K CONCENTRATE PHOTORESIST DEVELOPER
|INTEGRATED MICRO MATERIALS
|
|-
|AZ400k developer, 1:4 diluted, 1 gal
|AZ 400k 1:4 PHOTORESIST DEVELOPER
|INTEGRATED MICRO MATERIALS
|Pre-diluted
|-
|AZ 726 MIF developer, 1 gal
|AZ 726 MIF DEVELOPER
|INTEGRATED MICRO MATERIALS
|
|-
|AZ NMP Rinse & Photoresist Stripper
|AZ® NMP Rinse & Photoresist Stripper
|INTEGRATED MICRO MATERIALS
|
|-
|AZ 300 T, stripper, 1 gal.
|AZ 300T STRIPPER
|INTEGRATED MICRO MATERIALS
|
|-
|MicroChem 101A Developer, 1 gal
|101A DEVELOPER
|MICROCHEM CORP.
|SAL 101A, XP 101A
|-
|AZ 300 MIF Developer
|AZ 300 MIF DEVELOPER
|INTEGRATED MICRO MATERIALS
|
|-
|SU-8 Developer
|SU-8 DEVELOPER - 4 X 4L
|MICROCHEM CORP.
|
|-
|DS2100 BCB Developer
|DEVELOPER DS2100
|MICROCHEM CORP.
|BCB Developer
|-
|EC 11
|EC SOLVENT 11 - 4 GL CS
|MICROCHEM CORP.
|
|-
|AZ EBR
|AZ EBR EDGE BEAD REMOVER
|INTEGRATED MICRO MATERIALS
|
|-
|KwikStrip, gallon size
|AZ KWIK STRIP PHOTORESIST STRIPPER
|INTEGRATED MICRO MATERIALS
|
|-
|Remover PG, SU-8 stripper
|REMOVER PG - 4 X 4L
|MICROCHEM CORP.
|
|-
|SPR 955 CM-0.9, 1 Gal.
|SPR 955CM-0.9 - 1 GL
|MICROCHEM CORP.
|Photoresist, PR
|-
|SPR 955 CM-1.8, 1 Gal.
|SPR 955CM-1.8 - 1 GL
|MICROCHEM CORP.
|Photoresist, PR
|-
|SPR 220-3.0, 1 gal.
|SPR 220-3.0 P.R. 1GL
|MICROCHEM CORP.
|Photoresist, PR
|-
|SPR 220-7.0, 1 GAL,
|SPR 220-7.0 P.R. 1GL
|MICROCHEM CORP.
|Photoresist, PR
|-
|CEM-365 IS, for stepper, 1 pint.
|CEM365IS-QT
|SHIN-ETSU MICROSI, INC.
|Photoresist, PR contrast enhancer
|-
|OCG 825-35CS
|OCG 825 35CS 1X1 GALLON GLASS
|GALLADE CHEMICAL
|Photoresist, PR
|-
|AZ P4110 1Qt.
|AZ P4110 PHOTORESIST
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|AZ P4210 1Qt.
|AZ P4210 G-LINE/BROADBAND PHOTORESIST
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|AZ P4330 RS 1QT.
|AZ P4330-RS
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|AZ 5214-EIR 1QT.
|AZ 5214-E IR PHOTORESIST
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|AZ P4620 1QT
|AZP4620-1Q
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|AZ P9260 1gal.
|AZ® 9260 i-line / Broadband Photoresist
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|AZnLOF 2020, 1 gal.
|AZ nLoF 2020 NEGATIVE TONE LIFT-OFF PHOTORESIST
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|AZnLOF 2035, 1 qt.
|AZ Nlof 2035 NEGATIVE TONE LIFT-OFF PHOTORESIST
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|AZnLOF 2070, 1 qt
|AZ NLOF2070 NEGATIVE TONE LIFT-OFF PHOTORESIST
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|NR9-1000PY
|Negative Resist NR9-1000PY
|Futurrex, Inc.
|Photoresist, PR
|-
|NR9-3000PY
|Negative Resist NR9-3000PY
|Futurrex, Inc.
|Photoresist, PR
|-
|NR9-6000PY
|Negative Resist NR9-6000PY
|Futurrex, Inc.
|Photoresist, PR
|-
|LOL 2000, 1 qt.
|LOL 2000 -1 QT
|MICROCHEM CORP.
|Photoresist, PR Underlayer
|-
|AZ nLOF P5510 photoresist, 1 gallon
|AZ nLoF 5510 NEGATIVE TONE LIFT-OFF PHOTORESIST.
|INTEGRATED MICRO MATERIALS
|Photoresist, PR
|-
|THMR-IP3600 HP D
|THMR-IP3600 HP
|TOK AMERICA, INC.
|Photoresist, PR
|-
|XHRIC-11 1 LITER
|XHRIC-11 1 LITER
|BREWER SCIENCE, INC.
|Photoresist, PR, BARC
|-
|PMGI, SF 3, 500 ml
|PMGI SF 3 - 500ml Glass
|MICROCHEM CORP.
|Photoresist, PR
|-
|PMGI, SF 5, 500 ml
|PMGI SF 5 - 500ml Glass
|MICROCHEM CORP.
|Photoresist, PR
|-
|PMGI, SF 8, 500 ml
|PMGI SF-8, glass 500ml
|MICROCHEM CORP.
|Photoresist, PR
|-
|PMGI, SF11, 500 ml
|PMGI SF 11 - 500ML GLASS
|MICROCHEM CORP.
|Photoresist, PR
|-
|PMGI, SF15, 500 ml
|PMGI SF 15 - 500ML GLASS
|MICROCHEM CORP.
|Photoresist, PR
|-
|Dow Advanced Electronic, 4024-40, photo BCB
|CYCLOTENE* 4024 - 40 / 0.95 LITERS (BCB)
|MICROCHEM CORP.
|Photo-BCB
|-
|Cyclotene 3022-46
|CYCLOTENE* 3022-46
|MICROCHEM CORP.
|BCB
|-
|AP3000 BCB Adhesion Promoter, gall.
|ADHESION PROMOTER AP3000
|MICROCHEM CORP.
|BCB Adhesion Promoter
|-
|Omnicoat, adhesion promoter for SU-8
|OMNICOAT - 500ML GLASS
|MICROCHEM CORP.
|Resist
|-
|HMDS, (Fineline adhes.), 1 bt.
|MPHP-PT MICROPRIMER HIGH PURITY
|SHIN-ETSU MICROSI, INC.
|Photoresist Adhesion Promoter
|-
|Tergitol
|Spectrum Chemical Manufacturing Corporation TERGITOL NP-10 SURFCTNT 500ML T1273500ML
|FISHER SCIENTIFIC
|Detergent
|-
|SU-8 2005 Photoresist
|SU-8 2005 - 500ml GLASS
|MICROCHEM CORP.
|Photoresist, PR
|-
|SU-8 2010 Photoresist
|SU-8 2010 - 500ml GLASS
|MICROCHEM CORP.
|Photoresist, PR
|-
|SU-8 2015 Photoresist
|SU-8 2015 - 500ml GLASS
|MICROCHEM CORP.
|Photoresist, PR
|-
|SU-8 2075 Photoresist
|SU-8 2075 - 500ml Glass Resist
|MICROCHEM CORP.
|Photoresist, PR
|-
|UV-6 0.8 Photoresist
|UV6-0.8
|MICROCHEM CORP.
|Photoresist, PR
|-
|DUV42P-6
|DUV42P-6
|BREWER SCIENCE, INC
|Photoresist, PR, BARC
|-
|UVN 30-0.8L (UVN 2300-0.5)
|UVN 30-0.8L-1 GL NOWPAK
|MICROCHEM CORP.
|Photoresist, PR
|-
|Brewer Science DS-K101-304, 1 gal bt.
|ARC DS-K101-304, 1 LITER
|BREWER SCIENCE, INC.
|Photoresist, PR, BARC
|-
|UV 210GS-0.3, 1 gal. bt.
|UV 210GS-0.3 - 1 GL NOWPAK
|MICROCHEM CORP.
|Photoresist, PR
|-
|mr-UV Cur 21 100 nm, 100ml.
|MRT-mr-UV Cur 21, 100nm - 100ml Glass
|MICROCHEM CORP.
|Nanoimprint Resist
|-
|Santovac 5P
|Santovac 5P Ultra Polyphenyl Ether Pump Fluid
|KURT J LESKER
|Oil
|-
|SF1 Polishing Fluid
|SF1 Polishing Fluid
|LOGITECH LIMITED
|CMP Slurry
|-
|CrystalBond Wax
|Crystalbond 509 (Clear Color) Mounting Adhesive, Stick (round shape)
|
|Mounting wax, ~135°C melting point, acetone soluble.
|}

Lithography Recipes

2026-08-24T16:24:38Z

John d: /* Chemicals Stocked + Datasheets */ removed honewell SOG

__NOTOC__
{| class="wikitable"
|+
!Table of Contents
|-
|
==='''<big>Photolithography Processes</big>'''===

#'''UV Optical Lithography'''
#*[[#PositivePR |'''Stocked Lithography Chemical + Datasheets''']]
#**''Lists all stocked photolith. chemicals, PRs, strippers, developers, and links to the chemical's application notes/datasheet, which detail the spin curves and nominal processes.''
#*[[#Photolithography_Recipes |'''Photo Lithography Recipe section''']]
#**''Starting recipes (spin, bake, exposure, develop etc.) for all photolith. tools.''
#**''Substrate/surface materials/pattern size can affect process parameters. Users may need to run Focus/Exposure Arrays/Matrix (FEA's/FEM's) with these processes to achieve high-resolution.''
#**[[Contact Alignment Recipes|Contact Aligner Recipes]]
#***[[Contact Alignment Recipes#Suss Aligners .28SUSS MJB-3.29|Suss MJB Aligners]]
#***[[Contact Alignment Recipes#Contact Aligner .28SUSS MA-6.29|Suss MA6]]
#**[[Stepper Recipes|Stepper Recipes]]
#***[[Stepper Recipes#Stepper 1 .28GCA 6300.29|Stepper #1: GCA 6300]] (I-Line)
#***[[Stepper Recipes#Stepper 2 .28AutoStep 200.29|Stepper #2: GCA Autostep 200]] (I-Line)
#***[[Stepper Recipes#Stepper 3 .28ASML DUV.29|Stepper #3: ASML PAS 5500/300]] (DUV)
#**[[Direct-Write Lithography Recipes|Direct-Write Recipes]]
#***[[Direct-Write Lithography Recipes#Maskless Aligner .28Heidelberg MLA150.29|Heidelberg MLA150 (I-Line)]]
#***[[Direct-Write Lithography Recipes#E-Beam Lithography Recipes (Raith EBPG 5150+)|Raith EBPG 5150+ (Electron-Beam)]]
#***[[Lithography Recipes#FIB Lithography Recipes .28Raith Velion.29|Raith Velion FIB (Ion Beam)]]
#**[[Lithography Recipes#Automated Coat.2FDevelop System Recipes .28S-Cubed Flexi.29|Automated Coater Recipes (S-Cubed Flexi)]]
#[[Lithography Recipes#General Photolithography Techniques|'''General Photolithography Techniques''']]
#*''Techniques for improving litho. or solving common photolith. problems.''
#*[[Photolithography - Improving Adhesion Photoresist Adhesion|HMDS Process for Improving Adhesion]]
#*[[Photolithography - Manual Edge-Bead Removal Techniques|Edge-Bead Removal Techniques]]
#*[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf Photoresist reflow (MicroChem)]
#*[[Lithography Calibration - Analyzing a Focus-Exposure Matrix]]
#'''[[Lithography Recipes#Lift-Off Recipes|Lift-Off Recipes]]'''
#*''Verified Recipes for lift-off using various photolith. tools''
#*''General educational description of this technique and it's limitations/considerations.''
#'''E-beam Lithography'''
#*[[#E-Beam_Lithography_Recipes |E-Beam Lithography Recipes]]
#**''Has links to starting recipes. Substrates and patterns play a large role in process parameters.''
#*[[#EBLPR |EBL Photoresist Datasheets]]
#**''Provided for reference, also showing starting recipes and usage info.''
#'''[[Lithography Recipes#Holography Recipes|Holography]]'''
#*''For 1-D and 2-D gratings with 220nm nominal period, available on substrates up to 1 inch square.''
#*''Recipes for silicon substrates are provided, and have been translated to other substrates by users.''
#*''Datasheets are provided with starting recipes and usage info.''
#'''[[Lithography Recipes#Edge-Bead Removal Techniques|Edge-Bead Removal]]'''
#*''Edge photoresist removal methods needed for clamp-based etchers''
#*''Improves resolution for contact lithography''
|-
|

==='''<big>Photolithography Chemicals/Materials</big>'''===

#'''[[#Underlayers |Underlayers]]'''
#*''These are used beneath resists for both adhesive purposes and to enable bi-layer lift-off profiles for use with photoresist.''
#*''Datasheets are provided.''
#'''[[#AntiReflectionCoatings |Anti-Reflection Coatings]]''':
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Bottom Anti-Reflection Coatings (BARC) are used in the stepper systems, underneath the resists to eliminate substrate reflections that can affect resolution and repeatability for small, near resolution limited, feature sizes.''
#*''Datasheets are provided for reference on use of the materials.''
#'''[[#ContrastEnhancement |Contrast Enhancement Materials (CEM)]]'''
#*[[#Photolithography_Recipes |The Photoresist Recipes]] section contains recipes using these materials.
#*''Used for resolution enhancement. Not for use in contact aligners, typically used on I-Line Steppers.''
#*''Datasheets provided with usage info.''
#'''[[#AdhesionPromoters |Adhesion Promoters]]'''
#*''These are used to improve wetting of photoresists to your substrate.''
#*''Datasheets are provided on use of these materials.''
#'''[[#SpinOnDielectrics |Low-K Spin-on Dielectrics]]'''
#*[[Lithography Recipes#SpinOnDielectrics|Spin-On Dielectrics]]
#**''Datasheets for BCB, Photo-BCB, and SOG (spin-on-glass) for reference on use.''
#*[[#Low-K_Spin-On_Dielectric_Recipes |Low-K Spin-On Dielectric Recipes]]
#**''Recipes for usage of some spin-on dielectrics.''
#'''[[#Developers |Developers and Removers]]'''
#*''Datasheets provided for reference.''
#*''Remover and Photoresist Strippers are used to dissolve PR during lift-off or after etching.''
|}

==General Photolithography Techniques==

====[[Photolithography - Improving Adhesion Photoresist Adhesion|'''HMDS Process for Improving Adhesion''']]====

*''Use these procedures if you are finding poor adhesion PR lifting-off), or for chemicals (like BHF) that attack the PR adhesion interface strongly.''

====[[Photolithography - Manual Edge-Bead Removal Techniques|'''Edge-Bead Removal Techniques''']]====

*''These techniques are required for loading full-wafers into etchers that use top-side clamps, to prevent photoresist from sticking to the clamp (and potentially destroying your wafer).''
*''For contact lithography, this improves the proximity of the mask plate and sample, improving resolution. For some projection systems, such as the [[Maskless Aligner (Heidelberg MLA150)|Maskless Aligner]], EBR can help with autofocus issues.''
*''For small samples (<1cm) some techniques here to reduce edge-bead via shims.''

====[https://www.microchemicals.com/technical_information/reflow_photoresist.pdf '''Photoresist reflow (MicroChem)''']====

*''To create slanted sidewalls or curved surfaces.''
[[Lithography Calibration - Analyzing a Focus-Exposure Matrix|'''Lithography Calibration - Analyzing a Focus-Exposure Matrix''']]

* ''On tools with autofocus (steppers & direct-write litho tools), you calibrate your litho by shooting a "Focus Exposure Matrix/Array", or "FEM/FEA", which exposes a grid with Dose varying in one axis, and Focus varying in the other.''
* ''Explains how to locate the'' ''"Process Window" for your lithography.''

==Photolithography Recipes==

*'''R''': ''Recipe is available. Clicking this link will take you to the recipe.''
*'''A''': ''Material is available for use, but no recipes are provided.''

==='''Process Ranking Table'''===
Processes in the table above are ranked by their "''Process Maturity Level''" as follows:
{| class="wikitable"
!Process Level
! colspan="11" |Description of Process Level Ranking
|-
|A
| colspan="11" |Process '''A'''llowed and materials available but never done
|-
|R1
| colspan="11" |Process has been ran at least once
|-
|R2
| colspan="11" |Process has been ran and procedure is documented
|-
|R3
| colspan="11" |Process has been ran, procedure is documented, and data is available
|-
|R4
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''no''' in-Situ control available
|-
|R5
| colspan="11" |Process has a documented procedure with regular (≥4x per year) data '''and''' in-Situ control available
|-
|R6
| colspan="11" |Process has a documented procedure and control charts/limits available. Controlled process.
|}
''Click the tool title to go to recipes for that tool.''

''Click the photoresist title to get the datasheet, also found in [[Lithography Recipes#Chemicals Stocked .2B Datasheets|Stocked Chemicals + Datasheets]].''
{| class="wikitable" style="border: 1px solid #D0E7FF; background-color:#ffffff; text-align:center;" border="1"
|-
! colspan="8" height="45" |<div style="font-size: 150%;">Photolithography Recipes</div>

|-
| bgcolor="#EAECF0" |
! colspan="2" align="center" |'''[[Contact Alignment Recipes|<big>Contact Aligner Recipes</big>]]'''
! colspan="3" align="center" |'''[[Stepper Recipes|<big>Stepper Recipes</big>]]'''
! colspan="2" align="center" |[[Direct-Write Lithography Recipes|Direct-Write Litho. Recipes]]
|-
! width="150" bgcolor="#D0E7FF" align="center" |'''Positive Resists'''
{{LithRecipe Table}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[[:File:AXP4000pb-Datasheet.pdf|AZ4110]]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4210]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)|R1}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/fc/AXP4000pb-Datasheet.pdf AZ4330RS]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|A
|
|{{rl|MLA_Recipes|Positive Resist (MLA 150)}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith PicoMaster)|R1}}

|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/a2/Az_p4620_photoresist_data_package.pdf AZ4620]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/8b/OCG825-Positive-Resist-Datasheet.pdf OCG 825-35CS]
|A
|A
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-0.9]
|A
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R5}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|{{rl|Direct-Write Lithography Recipes|Positive Resist (Raith)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/29/SPR955-Positive-Resist-Datasheet.pdf SPR 955 CM-1.8]
|A
|A
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)|R3}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-3.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/3f/SPR220-Positive-Resist-Datasheet.pdf SPR 220-7.0]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|{{rl|Stepper Recipes|Positive Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Positive Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Positive_Resist_.28MLA150.29}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/be/3600_D%2C_D2v_Spin_Speed_Curve.pdf THMR-IP3600 HP D]
|
|
|A
|A
|
|{{rl|MLA Recipes|Positive Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)|R5}}
|
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/f/ff/UV210-Positive-Resist-Datasheet.pdf UV210-0.3]
|
|
|
|
|{{rl|Stepper Recipes|Positive Resist (ASML DUV)}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/UV26-Positive-Resist-Datasheet.pdf UV26-2.5]
|
|
|
|
|A
|
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Negative Resists'''
{{LithRecipe Table}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/b/b0/AZ5214-Negative-Resist-Datasheet.pdf AZ5214-EIR]
|{{rl|Contact_Alignment_Recipes|Negative Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2020]
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)|R3}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)|R3}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2035]
| bgcolor="#D0E7FF" |A
| {{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)|R1}}
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |A
| bgcolor="EEFFFF" |
| bgcolor="EEFFFF" |A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/5/5e/AZnLOF2020-Negative-Resist-Datasheet.pdf AZnLOF 2070]
|A
|A
|{{Rl|Stepper_Recipes|Negative_Resist_.28GCA_6300.29|R2}}
|A
|
|A
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/8/82/AZnLOF5510-Negative-Resist-Datasheet.pdf AZnLOF 5510]
|A
|A
|{{rl|Stepper Recipes|Negative Resist (GCA 6300)}}
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)}}
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/c/c9/UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf UVN30-0.8]
|
|
|
|
|{{rl|Stepper Recipes|Negative Resist (ASML DUV)|R6}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/7/78/SU-8-2015-revA.pdf SU-8 2005,2010,2015]
|A
|{{rl|Contact_Alignment_Recipes|Negative Resist (MA-6)}}
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/2/2c/SU-8-2075-revA.pdf SU-8 2075]
|A
|A
|A
|A
|
|{{rl|MLA Recipes|Negative Resist (MLA 150)}}
|-
| bgcolor="#D0E7FF" align="center" |NR9-[//wiki.nanotech.ucsb.edu/w/images/8/8f/NR9-1000PY-revA.pdf 1000],[//wiki.nanotech.ucsb.edu/w/images/7/71/NR9-3000PY-revA.pdf 3000],[//wiki.nanotech.ucsb.edu/w/images/f/f9/NR9-6000PY-revA.pdf 6000]PY
|{{rl|Contact_Alignment_Recipes|Positive Resist (MJB-3)}}
|{{rl|Contact_Alignment_Recipes|Positive Resist (MA-6)}}
|A
|{{rl|Stepper Recipes|Negative Resist (AutoStep 200)|R3}}
|
|A
|- bgcolor="EEFFFF"
! bgcolor="#D0E7FF" align="center" |'''Anti-Reflection Coatings'''
{{LithRecipe Table}}
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/3/33/XHRiC-Anti-Reflective-Coating.pdf XHRiC-11]
|
|
|A
|A
|
|A
|- bgcolor="EEFFFF"
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/0/07/DUV42P-Anti-Reflective-Coating.pdf DUV42-P]
|
|
|
|
|{{rl|Stepper Recipes|DUV-42P-6|R3}}
|
|-
| bgcolor="#D0E7FF" align="center" |[//wiki.nanotech.ucsb.edu/w/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101-304]
|
|
|
|
|{{rl|Stepper Recipes|DS-K101-304|R3}}
|
|-
! bgcolor="#D0E7FF" align="center" |
{{LithRecipe Table}}
|}


==Lift-Off Recipes==

*{{fl|Liftoff-Techniques.pdf|Lift-Off Description/Tutorial}}
**How it works, process limits and considerations for designing your process
*[[Lift-Off with I-Line Imaging Resist + LOL2000 Underlayer|I-Line Lift-Off: Bi-Layer Process with LOL2000 Underlayer]]
**''Single Expose/Develop process for simplicity''
**''Up to ~130nm metal thickness & ≥500nm-1000nm gap between metal.''
**''Can use any I-Line litho tool (GCA Stepper, Contact aligner, MLA)''
*{{fl|Bi-LayerContactprocesswithPMGI.pdf|I-Line Lift-Off: Bi-Layer Process with PMGI Underlayer and Contact Aligner}}
**''Multiple processes for Metal thicknesses ~800nm to ~2.5µm''
**''Uses multiple [[DUV Flood Expose|DUV Flood exposure]]/develop cycles to create undercut.''
**''Can be transferred to other I-Line litho tools (Stepper, MLA etc.)''
**Updates to the process:
***You now only need to do 5min [[DUV Flood Expose|DUV Flood exposure]] each cycle (lamp optics were replaced)
***Use the new "101B" developer, which replaced the "SAL/101A" developers but works the same.
**There are 2 [[DUV Flood Expose|DUV Flood exposure]] + 101B develop steps because the first exposure doesn't expose the entire PMGI - because PMGI absorbs DUV very strongly so the light doesn't penetrate to the bottom of thick PMGI on the first exposure.
*[[Lift-Off with DUV Imaging + PMGI Underlayer|DUV Lift-Off: UV6 Imaging Resist + PMGI Underlayer]]
**''Single-expose/develop process''
**''Up to ~65nm metal thickness & ~350nm gap between metal''
**''Use thicker PMGI for thicker metals''

==[[E-Beam Lithography System (JEOL JBX-6300FS)|E-Beam Lithography Recipes (JEOL JBX-6300FS)]]==

*Under Development.

==[[Focused Ion-Beam Lithography (Raith Velion)|FIB Lithography Recipes (Raith Velion)]]==
''To Be Added''

==[[Automated Coat/Develop System (S-Cubed Flexi)|Automated Coat/Develop System Recipes (S-Cubed Flexi)]]==
Recipes pre-loaded on the S-Cubed Flexi automated coat/bake/develop system. Only staff may write new recipes, contact the tool supervisor for more info.

===Available Variations===

*We have different recipes with varyious UV6 spin speeds - the same spin speed optionss as found on our manual Headway spinners. This allows for PR thickness control. See the linked UV6 datasheets below for thickness vs. rpm spin curves. '''Note''' that exact spin RPM may be slightly different between Headway spinners (on benches) vs. S-Cubed.
*DSK is recommended to be spun at 1.5krpm (~40nm) for best anti-reflection properties. 5krpm (~20nm) recipes are also provided for historical/legacy processes.
*DSK can be baked at either 220C to act as a Dry-etchable BARC (similar to DUV-42P), or at lower temps as a developable BARC (no dry etch required).
*"Chain" recipes (with DSK+UV6 spin/cured in succession) are only available for DSK Baked at 185C & 220C, and all UV6 Spin-speed variations. For the other DSK temps you can use the single-PR "Routes".
*Developer recipes are now available for 300 MiF Developer. '''Note''' that developer is flowing continuously during the develop, so develop times are shorter by ~50% compared to beaker developing.
**'''DO NOT EDIT developer recipes''', they can damage the tool when programmed incorrectly!
*"Chain" recipes for 135*C Post-exposure Bake + Develop have been made.
*ASML cassettes can be placed directly on this tool for spin / exposure / develop process. Please make sure all cassettes are kept back at their respecting tools when done.

===Recipes Table (S-Cubed Flexi)===
{| class="wikitable"
|+''Ask [[Tony Bosch|Staff]] if you need a new recipe.''
|'''''Coating Material'''''
|'''''Route/Chain'''''
|'''''Name''': (User: "UCSB Users")''
|'''''Spin Speed (krpm)'''''
|'''''Bake Temp'''''
|'''''Notes'''''
|-
! colspan="6" |
|-
! colspan="6" |BEFORE LITHOGRAPHY (PR Coat and Bake)
|-
! colspan="6" |
|-
|'''''Hotplate Set'''''
|Route
| colspan="4" |To pre-set the DSK Hotplate temp (HP4).
Note: Only HP4 can be changed.

HP1-HP3 remains fixed at: HP1=135°C, HP2=170°C & HP3=170°C
|-
|
|
|HP4-SET-'''220C'''
|
|220°C
|Will over shoot +-2°C when done.
|-
|
|
|HP4-SET-'''210C'''
|
|210°C
|
|-
|
|
|HP4-SET-'''200C'''
|
|200°C
|
|-
|
|
|HP4-SET-'''185C'''
|
|185°C
|
|-
| colspan="6" |'''''Bottom Anti-Reflection Coating (BARC), DSK101 only:'''''
|-
|'''''[https://wiki.nanotech.ucsb.edu/wiki/images/a/af/DS-K101-304-Anti-Reflective-Coating.pdf DS-K101]'''''
|Route
| colspan="4" |''DSK101 Develop Rate depends on Bake temp - you can use this to control undercut.'' ''See: [[DS-K101-304 Bake Temp. versus Develop Rate|DSK Bake vs. Dev rate]]''
DSK101 spun at 1.5K is equivalent to DUV-42P. See: [[Stepper Recipes#Anti-Reflective Coatings]]

'''185°C bake''' allows the DSK to dissolve during develop, and allows for undercut (may lift-off small features)

'''220°C bake''' allows DSK to be used as dry-etchable BARC (equiv. to DUV42P), requiring O2 etch to remove. Better for small features. See [[Stepper Recipes#Anti-Reflective Coatings|here for relevant processing info from DUV42P]].

'''Note: All PR coat recipes have EBR backside clean steps included in the recipe.'''
|-
|''1.5krpm recipes''
|
|COAT-DSK101-304[1.5K]-'''185C'''
|1.5krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[1.5K]-'''200C'''
|1.5krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''210C'''
|1.5krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[1.5K]-'''220C'''
|1.5krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |
|-
|''5krpm recipes''
|
|COAT-DSK101-304[5K]-'''185C'''
|5.0krpm
|185°C
|Requires: HP4=185°C,
|-
|
|
|COAT-DSK101-304[5K]-'''200C'''
|5.0krpm
|200°C
|Requires: HP4=200°C
|-
|
|
|COAT-DSK101-304[5K]-'''210C'''
|5.0krpm
|210°C
|Requires: HP4=210°C
|-
|
|
|COAT-DSK101-304[5K]-'''220C'''
|5.0krpm
|220°C
|Requires: HP4=220°C,
|-
| colspan="6" |'''''Imaging resist (UV6) only:'''''
|-
|'''''[https://wiki.nanofab.ucsb.edu/w/images/3/38/UV6-Positive-Resist-Datasheet.pdf UV6-0.8]'''''
|Route
|COAT-UV6['''2K''']-135C
|2.0krpm
|135°C
|Requires: HP1=135°C
|-
|''varying spin speed''
|
|COAT-UV6['''2.5K''']-135C
|2.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3K''']-135C
|3.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''3.5K''']-135C
|3.5krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''4K''']-135C
|4.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''5K''']-135C
|5.0krpm
|135°C
|Requires: HP1=135°C
|-
|
|
|COAT-UV6['''6K''']-135C
|6.0krpm
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |'''''UV6 Coat with Developable BARC underlayer:'''''
|-
|'''''DS-K101 @ 185°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-185C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 185°C
UV6: 135°C
|Requires:
– HP4=185°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-185C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-185C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-185C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-185C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |'''''UV6 Coat with Dry-Etchable BARC underlayer:'''''
|-
|'''''DS-K101 @ 220°C'''''
'''''+ UV6'''''
|Chain
|COAT-DSK101['''1.5K''']-220C-UV6['''2K''']-135C
|DSK: 1.5krpm
UV6: 2.0krpm
|DSK: 220°C
UV6: 135°C
|Requires:
– HP4=220°C

– HP1=135°C

Plan for ~10-15 min per wafer.
|-
|''1.5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''1.5K''']-220C-UV6['''2.5K''']-135C
|DSK: 1.5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3K''']-135C
|DSK: 1.5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''3.5K''']-135C
|DSK: 1.5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''4K''']-135C
|DSK: 1.5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''5K''']-135C
|DSK: 1.5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''1.5K''']-220C-UV6['''6K''']-135C
|DSK: 1.5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
| colspan="6" |
|-
|''5krpm DSK recipes with''
''UV6- various spin speeds''
|
|COAT-DSK101['''5K''']-220C-UV6['''2K''']-135C
|DSK: 5krpm
UV6: 2.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''2.5K''']-135C
|DSK: 5krpm
UV6: 2.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3K''']-135C
|DSK: 5krpm
UV6: 3.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''3.5K''']-135C
|DSK: 5krpm
UV6: 3.5krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''4K''']-135C
|DSK: 5krpm
UV6: 4.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''5K''']-135C
|DSK: 5krpm
UV6: 5.0krpm
|same as above
|same as above
|-
|
|
|COAT-DSK101['''5K''']-220C-UV6['''6K''']-135C
|DSK: 5krpm
UV6: 6.0krpm
|same as above
|same as above
|-
! colspan="6" |
|-
! colspan="6" |AFTER LITHOGRAPHY (PEB and Developing)
|-
! colspan="6" |
|-
|'''''PEB Wafer Bake'''''
|Route
| colspan="4" |To bake wafer with UV6 after exposure (PEB) for 90sec and cool for 15sec
|-
|
|
|BAKE-135C-90S
|
|135°C
|Requires: HP1=135°C
|-
| colspan="6" |
|-
|'''''PEB and Developing'''''
|Route
| colspan="4" |To post-exposure bake wafer after exposure (std. PEB for UV6) 90sec, cool 15sec, develop using AZ300MIF and water rinse 60sec

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|BAKE-135C-90S-DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
| colspan="6" |
|-
|'''Developing'''
|Route
| colspan="4" |To only develop wafer using AZ300MIF and water rinse 60sec (No PEB)

'''WARNING''': DO NOT USE ANY OTHER DEVELOPER RECIPES OTHER THAN THE ONES LISTED HERE (or equipment damage may occur!)
|-
|''Varying developer time''
|
|DEV[MIF300]-SPIN[300RPM]-'''10S'''
|Developer chuck: 300rpm
|135°C
|Requires: HP1=135°C
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''15S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''20S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''25S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''30S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''35S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''40S'''
|same as above
|same as above
|same as above
|-
|
|
|DEV[MIF300]-SPIN[300RPM]-'''45S'''
|same as above
|same as above
|same as above
|-
|
|
|
|
|
|
|}
==[[Holographic Lith/PL Setup (Custom)|Holography Recipes]]==
''The Holography recipes here use the BARC layer XHRiC-11 & the high-res. I-Line photoresist THMR-IP3600HP-D.''

*{{fl|Holography_Process_for_1D-lines_and_2D-dots_%28ARC-11_%26_THMR-IP3600HP-D%29-updated-4-8-2021.pdf|Standard Holography Process - on SiO2 on Si}}
*{{fl|Holography-Process-Variation-revA.pdf|Holography Process Variations - Set-up Angle - Etching into SiO2 and Si}}
*{{fl|05-SiO2_Nano-structure_Etch.pdf|Etch SiO2 Nano-structure - Changing Side-wall Angle - Etching into Si with a different line-width}}
*{{fl|30-Redicing_Nanowire_Diameter_by_Thermal_Oxidation_and_Vapored_HF_Etch.pdf|Reduce SiO2 Nanowire Diameter - Thermal Oxidation - Vapor HF Etching}}

==Low-K Spin-On Dielectric Recipes==

*{{fl|Lithography-BCB-photo-lowk-dielectric-spinon-4024-40-revA.docx|Photo BCB (4024-40)}}
*{{fl|BCB-cyclotene-3000-revA.pdf|Standard BCB (3022-46)}}
*{{fl|512B-Application-Data-Bake-revA.pdf|SOG (T512B)}}

==Chemicals Stocked + Datasheets==
''The following is a list of the lithography chemicals we stock in the lab, with links to the datasheets for each. The datasheets will often have important processing info such as spin-speed vs. thickness curves, typical process parameters, bake temps/times etc.''

Item numbers in (parentheses) indicate the specific stocked formulation, when the datasheet shows multiple formulations.
{|
|- valign="top"
| width="400" |
;<div id="PositivePR"><big>Positive Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AXP4000pb-Datasheet.pdf|AZP4000 (AZ4110, AZ4210, AZ4330)}}
*{{Fl|Az_p4620_photoresist_data_package.pdf|AZ P4620}}
*{{fl|OCG825-Positive-Resist-Datasheet.pdf|OCG825}}
*{{fl|SPR220-Positive-Resist-Datasheet.pdf|SPR220 (SPR220-3, SPR220-7)}}
*{{fl|SPR955-Positive-Resist-Datasheet.pdf|SPR955CM (SPR955CM-0.9, SPR955CM-1.8)}}
*THMR-3600HP (Thin I-Line & Holography)
**{{fl|THMR_iP_3500_iP3600.pdf|Evaluation Results: THMR-3600HP}}
**{{fl|3600_D,_D2v_Spin_Speed_Curve.pdf|Spin Curves for THMR-3600HP}}
**{{fl|THMR-iP3600_HP_D_20140801_(B)_GHS_US.pdf|Safety Datasheet for THMR-3600HP}}

'''''DUV-248nm'''''

*{{fl|UV210-Positive-Resist-Datasheet.pdf|UV210-0.3}}
*{{fl|UV6-Positive-Resist-Datasheet.pdf|UV6-0.8}}
*{{fl|UV26-Positive-Resist-Datasheet.pdf|UV26-2.5}}

;<div id="NegativePR"><big>Negative Photoresists</big></div>

'''''i-line and broadband'''''

*{{fl|AZ5214-Negative-Resist-Datasheet.pdf|AZ5214}}
*{{fl|AZnLOF5510-Negative-Resist-Datasheet.pdf|AZnLOF5510}}
*{{fl|AZnLOF2020-Negative-Resist-Datasheet.pdf|AZnLOF2000 (AZnLOF2020, AZnLOF2035, AZnLOF2070)}}
*{{fl|NR9-1000PY-revA.pdf|Futurrex NR9-1000PY(use AZ300MIF dev)}}
*{{fl|NR9-3000PY-revA.pdf|Futurrex NR9-3000PY(use AZ300MIF dev)}}
*{{fl|NR9-6000PY-revA.pdf|Futurrex NR9-6000PY(use AZ300MIF dev)}}
*{{fl|SU-8-2015-revA.pdf|SU-8-2005,2010, 2015}}
*{{fl|SU-8-2075-revA.pdf|SU-8-2075}}

'''''DUV-248nm'''''

*{{fl|UVN-30_-_Negative-Resist-Datasheet_-_Apr_2004.pdf|UVN-30-0.8}}

;<div id="Underlayers"><big>Underlayers</big></div>

*{{fl|PMGI-Underlayer-Datasheet.pdf|PMGI (PMGI SF3,5,8,11,15)}}
*{{fl|LOL2000-Underlayer-Datasheet.pdf|Shipley LOL2000}}

;<div id="EBLPR"><big>E-beam resists</big></div>

*{{fl|PMMA-E-Beam-Resist-Datasheet.pdf|PMMA (PMMA, P(MMA-MAA) copolymer)}}
*{{fl|maN2403-E-Beam-Resist-Datasheet.pdf|maN 2403}}

;<div id="NanoImprinting"><big>Nanoimprinting</big></div>

*{{fl|NX1020-Nanoimprinting-Datasheet.pdf|NX1020}}
*{{fl|MRI-7020-Nanoimprinting-Datasheet.pdf|MRI-7020}}
*{{fl|Mr-UVCur21.pdf|MR-UVCur21}}
*{{fl|OrmoStamp-NIL-Lithography-UV-Soft-RevA.pdf|Ormostamp}}

|
;<div id="ContrastEnhancement"><big>Contrast Enhancement Materials</big></div>

*{{fl|CEM365iS-Contrast-Enhancement-Datasheet.pdf|CEM365iS}}

;<div id="AntiReflectionCoatings"><big>Anti-Reflection Coatings</big></div>

*{{fl|XHRiC-Anti-Reflective-Coating.pdf|XHRiC-11 (i-line)}}
*{{fl|DUV42P-Anti-Reflective-Coating.pdf|DUV42P-6 (DUV) (For AR2 replacement)}}
*{{fl|DS-K101-304-Anti-Reflective-Coating.pdf|DS-K101-304 (DUV developable BARC)}}

;<div id="AdhesionPromoters"><big>Adhesion Promoters</big></div>

*HMDS
*AP3000 BCB Adhesion Promoter
*{{fl|OMNICOAT-revA.pdf|Omnicoat, SU-8 Adhesion Promoter}}
*{{fl|OrmoPrime-NIL-Adhesion-RevA.pdf|Ormoprime08-Ormostsmp Adhesion Promoter}}

;<div id="SpinOnDielectrics"><big>Spin-On Dielectrics</big></div>

''Low-K Spin-On Dielectrics such as Benzocyclobutane and Spin-on Glass''

*{{fl|BCB-cyclotene-3000-revA.pdf|BCB, Cyclotene 3022-46(Not Photosensitive)}}
*{{fl|BCB-cyclotene-4000-revA.pdf|PhotoBCB, Cyclotene 4024-40(Negative Polarity)}}
*{{fl|BCB-adhesion.pdf|BCB Adhesion Notes from Vendor}}
*{{fl|BCB-rework.pdf|BCB rework Notes from Vendor}}

;<div id="Developers"><big>Developers</big></div>

*{{fl|AZ400K-Developer-Datasheet.pdf|AZ400K (AZ400K, AZ400K1:4)}}
*{{fl|AZ300MIF-Developer-Datasheet.pdf|AZ300MIF}}
*DS2100 BCB Developer
*SU-8 Developer
*101A Developer (for DUV Flood Exposed PMGI)

;<div id="PRRemovers"><big>Photoresist Removers</big></div>

*[http://www.microchemicals.com/products/remover_stripper/nmp.html AZ NMP]
**''This replaces {{fl|1165-Resist-Remover.pdf|1165}}''
*{{fl|AZ300T-Resist-Remover.pdf|AZ300T}}
*{{fl|RemoverPG-revA.pdf|Remover PG, SU-8 stripper}}
*AZ EBR ("Edge Bead Remover", PGMEA)

|}

[[Category: Processing]]
[[category: Lithography]]
[[category: Recipes]]

Template:News

2026-08-22T15:57:57Z

John d: linked to CSMANTECH paper

<startfeed />


''News from the U.C. Santa Barbara Nanofabrication Facility.''




=== "Make Microchips!" - new book by Nanofab staff ===
Nanofab staff [[Demis D. John]] published an intro-level book for people wanting to learn about making microchips, it is [https://www.amazon.com/dp/B0HDRHG3KM available now]. The book compliments the [https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps] and other [https://nanofab.ucsb.edu/workforce workforce development efforts] Demis has launched, to help people get into the semiconductor industry.
// [[User:John_d|Demis D. John]] 15:30, 22 August 2026 (UTC)

=== Carpinteria Highschool does Microchip Packaging ===
The SB Chamber of Commerce sponsored Carpinteria Highschool to do microchip packaging using their machine shop in the CHIP program! Under the mentorship of Nanofab staff [[Demis D. John]] and Ben Werner from [https://www.pseudolithic.com/ PseudolithIC], 3 student teams designed the microchip packaging for micro-pressure sensors, MEMS chips made during the [https://nanofab.ucsb.edu/workforce#bootcamps CC-PRIME cleanroom bootcamps]. The SBSC Chamber released [https://sbscchamber.com/chip/ a video about the program here], you can learn more [https://innovation.ucsb.edu/blog/news/ucsb-partnership-opens-doors-semiconductor-careers-high-school-students at this article].
// [[User:John_d|Demis D. John]] 10:00, 13 August 2026 (UTC)

=== Raith PicoMaster Direct-Write Installed ===
We have installed a new H-Line (405nm) Direct-write tool: The [[Maskless_Aligner_(Raith_PicoMaster_XF)]]. The new tool is currently undergoing staff qualifications and we are developing operating procedures. // [[User:John_d|Demis D. John]] 19:02, 18 July 2026 (UTC)

===ProtoFab Opening Summer 2026===
The Nanofab is launching a [https://protofab.oasis.ucsb.edu/ Prototyping Facility called the "Protofab"], which is located at [https://oasis.ucsb.edu/ UCSB's new OASIS building]. Learn more at [https://protofab.oasis.ucsb.edu https://protofab.oasis.ucsb.edu]

The new lab will enable taking your diced chips from the Nanofab, to the Protofab where you can wirebond, attach to PCB's/carriers, align+attach optical fibers etc., to make a real "prototype". The lab is expected to open in Summer 2026, with equipment currently being installed.

Access & model is similar to the Nanofab - anyone can pay an hourly fee to go into the Protofab, using key fobs for access. (OASIS "Membership" is ''not required'' to use the Protofab, unless you also want your own desk + private lab space at OASIS.)

Contact the Protofab lab manager [mailto:arin_abed@ucsb.edu Arin Abed] for more information.
// [[User:John_d|Demis D. John]] 19:51, 27 May 2026 (UTC)

===CS MANTECH Poster: "Machine Matching Methodology for Single-shot Lab to Lab Dry Etch Process Transfer" ===
Nanofab staff Foong Fatt, Noah Dutra and Brian Thibeault presented a poster at CS MANTECH (compound semiconductor manufacturing technology) in Portland Oregon. The paper describes using [https://www.pdf.com/products/exensio-analytics-platform/overview/ PDF Solutions Exensio analytics] to do a single-shot dry etch process transfer from the UCSB Nanofab's Oxford Cobra ICP etcher to a different-configuration ICP etcher at UC San Diego's, reproducing etch rate and sidewall profile in a single-shot. The technique used complimentary L9 DOE's at each site to map out the process space, allowing for single-shot matching. [[Media:2026_CSMANTECH_Paper-2366_-_Foong_Fatt_-_Machine_Matching_Methodology_for_Single-shot_Lab_to_Lab_Dry_Etch_Process_Transfer.pdf|See the full paper here]].
// [[User:John_d|Demis D. John]] 15:53, 22 August 2026 (UTC)

===DREAMS Hub awarded 2 projects in GaN and 5G/6G technologies===
[https://viterbischool.usc.edu/news/2024/09/usc-viterbi-led-ca-dreams-hub-is-awarded-31-9-million-in-funding-under-the-microelectronics-commons/ CA DREAMS Hub is awarded $31.9 million in funding under the Microelectronics Commons] -

* $16.2 Million to develop advanced gallium nitride (GaN) semiconductor technologies, with partners including USC, Northrop Grumman, Teledyne Technologies, HRL Laboratories, PseudolithIC, Monde Wireless Inc., Transphorm, UCLA and UC Santa Barbara.
* $15.7 Million in Funding for 5G/6G millimeter-wave Phased-Array Prototypes, with team USC, Northrop Grumman, HRL Laboratories, Teledyne, Caltech, UCLA, UC Santa Barbara, UC San Diego, Vorago, Global Foundries.

// [[User:John_d|Demis D. John]] 16:32, 23 September 2024 (PDT)

===NSF-ATE Award for SBCC and UCSB: New Semiconductor Pathway===
The UCSB NanoFab and CNSI were recently awarded a project by NSF-ATE to build a semiconductor pathway (associates degree or certificate) at Santa Barbara City College, utilizing UCSB Cleanrooms. The project "[https://www.nsf.gov/awardsearch/showAward?AWD_ID=2400982 Expansion of CCPRIME: Central Coast Partnership for Regional Industry-Focused Micro/Nanotechnology Education]" is one of 6 projects funded by an [https://new.nsf.gov/news/nsf-invests-76m-educational-projects-build-skilled Intel-NSF partnership.] The project builds on the existing "[https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps]" already being run twice a year in the [https://www.cnsi.ucsb.edu/facilities/quantum-structures CNSI QSF cleanroom]. // [[User:John_d|Demis D. John]] 13:15, 14 August 2024 (PDT)

===CHIPS Act Award Announced to USC and UCSB NanoFab===
[https://carbajal.house.gov/news/documentsingle.aspx?DocumentID=1672 U.S. Congressman Salud Carbajal congratulates UCSB and the NanoFab] on receiving a [https://www.nist.gov/chips CHIPS & Science Act] award, as part of the [https://microelectronicscommons.org/ California DREAMS Hub (Microelectronics Commons) led by USC].
-- [[User:John d|Demis]] 12:06, 4 October 2023 (PDT)

=== RIE#3 Removed ===
We have removed [[RIE_3_(MRC)|RIE#3]] from the Nanofab, it has gone to the [https://www.ece.ucsb.edu/department-resources/electronics-shop/tcr Teaching Cleanroom]. All user's processes have been transferred to the [[Fluorine_ICP_Etcher_(PlasmaTherm/SLR_Fluorine_ICP)|Fluorine ICP Etcher]]. // [[User:John_d|Demis D. John]] 15:58, 6 August 2024 (PDT)

=== NanoFab staff awarded Goleta's Innovator of the Year 2023 ===
NanoFab staff member [[Demis D. John]] has been awarded the ''City of Goleta's "Innovator of the Year"'' for 2023! The award stems from the UCSB Nanofab's impact on the communities of Santa Barbara County and surrounding regions, in enabling cutting edge technology companies to thrive, which also enables many local careers in advanced high-tech. See the [https://sbscchamber.com/goletas-finest-2023-award-recipients-announced/ full announcement by the Santa Barbara South Coast Chamber of Commerce]. // [[User:John d|Demis D. John]] 13:58, 7 November 2023 (PST)

=== NanoFab Featured in Regional Tech Videos ===
The UCSB NanoFab is showcased as a driver of innovation and enabler of the regional high-tech industry.

See the videos here:
{| class="wikitable"
|[https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false '''''Santa Barbara County: This is TechTopia'''''] [[File:Techtopia_Vid_-_Thumbnail_PlayButton.jpg|none|300x300px|link=https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false]]

|[https://www.youtube.com/watch?v=op746os6eRI '''''UCSB NanoFab: An Innovation Center'''''] [[File:NanoFab_COE_Engineering_Vid_-_thumbnail_2_crop.jpg|none|300x300px|link=https://www.youtube.com/watch?v=op746os6eRI]]
|}

// [[User:John d|John d]] 09:26, 1 November 2023 (PST)




===''[[Template:News_-_Older_Articles|See older articles at this link]]''===
<endfeed />
<noinclude>[[Category:Templates]]</noinclude>

File:2026 CSMANTECH Paper-2366 - Foong Fatt - Machine Matching Methodology for Single-shot Lab to Lab Dry Etch Process Transfer.pdf

2026-08-22T15:55:44Z

John d: Machine Matching Methodology for Single-shot Lab to Lab Dry Etch Process Transfer Fatt Foong, Brian Thibeault, Noah Dutra, Demis D. John, Vraj Mehalana, Chandan Ramakrishnaiah, Shivakumar Bhaskaran, Jacky Tseng, Shimin Huang, Michio Aruga, Weldom Xie, Bokai Ma, Jeongho Ha, John Tamelier, Fubo Rao Conference: CS MANTECH Year: 2026 Topics Process Transfer Compound Semiconductors GaAs Design of Experiments InP Dry Etch Nanofabrication Abstract Small start-up companies benefit significantly...

== Summary ==
Machine Matching Methodology for Single-shot Lab to Lab Dry Etch Process Transfer
Fatt Foong, Brian Thibeault, Noah Dutra, Demis D. John, Vraj Mehalana, Chandan Ramakrishnaiah, Shivakumar Bhaskaran, Jacky Tseng, Shimin Huang, Michio Aruga, Weldom Xie, Bokai Ma, Jeongho Ha, John Tamelier, Fubo Rao

Conference: CS MANTECH

Year: 2026

Topics

Process Transfer
Compound Semiconductors
GaAs
Design of Experiments
InP
Dry Etch
Nanofabrication
Abstract

Small start-up companies benefit significantly from leveraging low-cost, quick-turnaround university nanofabrication facilities for developing next-generation compound semiconductor devices and prototypes. This paper presents a methodology for establishing dry etch process transfer between different fabrication facilities using machine matching and complementary design of experiments, demonstrating successful transfer of etch recipes across different systems.

Template:News

2026-08-22T15:53:28Z

John d: added csmantech paper

<startfeed />


''News from the U.C. Santa Barbara Nanofabrication Facility.''




=== "Make Microchips!" - new book by Nanofab staff ===
Nanofab staff [[Demis D. John]] published an intro-level book for people wanting to learn about making microchips, it is [https://www.amazon.com/dp/B0HDRHG3KM available now]. The book compliments the [https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps] and other [https://nanofab.ucsb.edu/workforce workforce development efforts] Demis has launched, to help people get into the semiconductor industry.
// [[User:John_d|Demis D. John]] 15:30, 22 August 2026 (UTC)

=== Carpinteria Highschool does Microchip Packaging ===
The SB Chamber of Commerce sponsored Carpinteria Highschool to do microchip packaging using their machine shop in the CHIP program! Under the mentorship of Nanofab staff [[Demis D. John]] and Ben Werner from [https://www.pseudolithic.com/ PseudolithIC], 3 student teams designed the microchip packaging for micro-pressure sensors, MEMS chips made during the [https://nanofab.ucsb.edu/workforce#bootcamps CC-PRIME cleanroom bootcamps]. The SBSC Chamber released [https://sbscchamber.com/chip/ a video about the program here], you can learn more [https://innovation.ucsb.edu/blog/news/ucsb-partnership-opens-doors-semiconductor-careers-high-school-students at this article].
// [[User:John_d|Demis D. John]] 10:00, 13 August 2026 (UTC)

=== Raith PicoMaster Direct-Write Installed ===
We have installed a new H-Line (405nm) Direct-write tool: The [[Maskless_Aligner_(Raith_PicoMaster_XF)]]. The new tool is currently undergoing staff qualifications and we are developing operating procedures. // [[User:John_d|Demis D. John]] 19:02, 18 July 2026 (UTC)

===ProtoFab Opening Summer 2026===
The Nanofab is launching a [https://protofab.oasis.ucsb.edu/ Prototyping Facility called the "Protofab"], which is located at [https://oasis.ucsb.edu/ UCSB's new OASIS building]. Learn more at [https://protofab.oasis.ucsb.edu https://protofab.oasis.ucsb.edu]

The new lab will enable taking your diced chips from the Nanofab, to the Protofab where you can wirebond, attach to PCB's/carriers, align+attach optical fibers etc., to make a real "prototype". The lab is expected to open in Summer 2026, with equipment currently being installed.

Access & model is similar to the Nanofab - anyone can pay an hourly fee to go into the Protofab, using key fobs for access. (OASIS "Membership" is ''not required'' to use the Protofab, unless you also want your own desk + private lab space at OASIS.)

Contact the Protofab lab manager [mailto:arin_abed@ucsb.edu Arin Abed] for more information.
// [[User:John_d|Demis D. John]] 19:51, 27 May 2026 (UTC)

===CSMANTECH Poster: "Machine Matching Methodology for Single-shot Lab to Lab Dry Etch Process Transfer" ===
Nanofab staff Foong Fatt, Noah Dutra and Brian Thibeault presented a poster at CS MANTECH (compound semiconductor manufacturing technology) in Portland Oregon. The paper describes using [https://www.pdf.com/products/exensio-analytics-platform/overview/ PDF Solutions Exensio analytics] to do a single-shot dry etch process transfer from the UCSB Nanofab's Oxford Cobra ICP etcher to a different-configuration ICP etcher at UC San Diego's, reproducing etch rate and sidewall profile in a single-shot. The technique used complimentary L9 DOE's at each site to map out the process space, allowing for single-shot matching.
// [[User:John_d|Demis D. John]] 15:53, 22 August 2026 (UTC)

===DREAMS Hub awarded 2 projects in GaN and 5G/6G technologies===
[https://viterbischool.usc.edu/news/2024/09/usc-viterbi-led-ca-dreams-hub-is-awarded-31-9-million-in-funding-under-the-microelectronics-commons/ CA DREAMS Hub is awarded $31.9 million in funding under the Microelectronics Commons] -

* $16.2 Million to develop advanced gallium nitride (GaN) semiconductor technologies, with partners including USC, Northrop Grumman, Teledyne Technologies, HRL Laboratories, PseudolithIC, Monde Wireless Inc., Transphorm, UCLA and UC Santa Barbara.
* $15.7 Million in Funding for 5G/6G millimeter-wave Phased-Array Prototypes, with team USC, Northrop Grumman, HRL Laboratories, Teledyne, Caltech, UCLA, UC Santa Barbara, UC San Diego, Vorago, Global Foundries.

// [[User:John_d|Demis D. John]] 16:32, 23 September 2024 (PDT)

===NSF-ATE Award for SBCC and UCSB: New Semiconductor Pathway===
The UCSB NanoFab and CNSI were recently awarded a project by NSF-ATE to build a semiconductor pathway (associates degree or certificate) at Santa Barbara City College, utilizing UCSB Cleanrooms. The project "[https://www.nsf.gov/awardsearch/showAward?AWD_ID=2400982 Expansion of CCPRIME: Central Coast Partnership for Regional Industry-Focused Micro/Nanotechnology Education]" is one of 6 projects funded by an [https://new.nsf.gov/news/nsf-invests-76m-educational-projects-build-skilled Intel-NSF partnership.] The project builds on the existing "[https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps]" already being run twice a year in the [https://www.cnsi.ucsb.edu/facilities/quantum-structures CNSI QSF cleanroom]. // [[User:John_d|Demis D. John]] 13:15, 14 August 2024 (PDT)

===CHIPS Act Award Announced to USC and UCSB NanoFab===
[https://carbajal.house.gov/news/documentsingle.aspx?DocumentID=1672 U.S. Congressman Salud Carbajal congratulates UCSB and the NanoFab] on receiving a [https://www.nist.gov/chips CHIPS & Science Act] award, as part of the [https://microelectronicscommons.org/ California DREAMS Hub (Microelectronics Commons) led by USC].
-- [[User:John d|Demis]] 12:06, 4 October 2023 (PDT)

=== RIE#3 Removed ===
We have removed [[RIE_3_(MRC)|RIE#3]] from the Nanofab, it has gone to the [https://www.ece.ucsb.edu/department-resources/electronics-shop/tcr Teaching Cleanroom]. All user's processes have been transferred to the [[Fluorine_ICP_Etcher_(PlasmaTherm/SLR_Fluorine_ICP)|Fluorine ICP Etcher]]. // [[User:John_d|Demis D. John]] 15:58, 6 August 2024 (PDT)

=== NanoFab staff awarded Goleta's Innovator of the Year 2023 ===
NanoFab staff member [[Demis D. John]] has been awarded the ''City of Goleta's "Innovator of the Year"'' for 2023! The award stems from the UCSB Nanofab's impact on the communities of Santa Barbara County and surrounding regions, in enabling cutting edge technology companies to thrive, which also enables many local careers in advanced high-tech. See the [https://sbscchamber.com/goletas-finest-2023-award-recipients-announced/ full announcement by the Santa Barbara South Coast Chamber of Commerce]. // [[User:John d|Demis D. John]] 13:58, 7 November 2023 (PST)

=== NanoFab Featured in Regional Tech Videos ===
The UCSB NanoFab is showcased as a driver of innovation and enabler of the regional high-tech industry.

See the videos here:
{| class="wikitable"
|[https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false '''''Santa Barbara County: This is TechTopia'''''] [[File:Techtopia_Vid_-_Thumbnail_PlayButton.jpg|none|300x300px|link=https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false]]

|[https://www.youtube.com/watch?v=op746os6eRI '''''UCSB NanoFab: An Innovation Center'''''] [[File:NanoFab_COE_Engineering_Vid_-_thumbnail_2_crop.jpg|none|300x300px|link=https://www.youtube.com/watch?v=op746os6eRI]]
|}

// [[User:John d|John d]] 09:26, 1 November 2023 (PST)




===''[[Template:News_-_Older_Articles|See older articles at this link]]''===
<endfeed />
<noinclude>[[Category:Templates]]</noinclude>

Template:News

2026-08-22T15:39:39Z

John d: added carp HS CHIP program

<startfeed />


''News from the U.C. Santa Barbara Nanofabrication Facility.''




=== "Make Microchips!" - new book by Nanofab staff ===
Nanofab staff [[Demis D. John]] published an intro-level book for people wanting to learn about making microchips, it is [https://www.amazon.com/dp/B0HDRHG3KM available now]. The book compliments the [https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps] and other [https://nanofab.ucsb.edu/workforce workforce development efforts] Demis has launched, to help people get into the semiconductor industry.
// [[User:John_d|Demis D. John]] 15:30, 22 August 2026 (UTC)

=== Carpinteria Highschool does Microchip Packaging ===
The SB Chamber of Commerce sponsored Carpinteria Highschool to do microchip packaging using their machine shop in the CHIP program! Under the mentorship of Nanofab staff [[Demis D. John]] and Ben Werner from [https://www.pseudolithic.com/ PseudolithIC], 3 student teams designed the microchip packaging for micro-pressure sensors, MEMS chips made during the [https://nanofab.ucsb.edu/workforce#bootcamps CC-PRIME cleanroom bootcamps]. The SBSC Chamber released [https://sbscchamber.com/chip/ a video about the program here], you can learn more [https://innovation.ucsb.edu/blog/news/ucsb-partnership-opens-doors-semiconductor-careers-high-school-students at this article].
// [[User:John_d|Demis D. John]] 10:00, 13 August 2026 (UTC)

=== Raith PicoMaster Direct-Write Installed ===
We have installed a new H-Line (405nm) Direct-write tool: The [[Maskless_Aligner_(Raith_PicoMaster_XF)]]. The new tool is currently undergoing staff qualifications and we are developing operating procedures. // [[User:John_d|Demis D. John]] 19:02, 18 July 2026 (UTC)

===ProtoFab Opening Summer 2026===
The Nanofab is launching a [https://protofab.oasis.ucsb.edu/ Prototyping Facility called the "Protofab"], which is located at [https://oasis.ucsb.edu/ UCSB's new OASIS building]. Learn more at [https://protofab.oasis.ucsb.edu https://protofab.oasis.ucsb.edu]

The new lab will enable taking your diced chips from the Nanofab, to the Protofab where you can wirebond, attach to PCB's/carriers, align+attach optical fibers etc., to make a real "prototype". The lab is expected to open in Summer 2026, with equipment currently being installed.

Access & model is similar to the Nanofab - anyone can pay an hourly fee to go into the Protofab, using key fobs for access. (OASIS "Membership" is ''not required'' to use the Protofab, unless you also want your own desk + private lab space at OASIS.)

Contact the Protofab lab manager [mailto:arin_abed@ucsb.edu Arin Abed] for more information.
// [[User:John_d|Demis D. John]] 19:51, 27 May 2026 (UTC)

===DREAMS Hub awarded 2 projects in GaN and 5G/6G technologies===
[https://viterbischool.usc.edu/news/2024/09/usc-viterbi-led-ca-dreams-hub-is-awarded-31-9-million-in-funding-under-the-microelectronics-commons/ CA DREAMS Hub is awarded $31.9 million in funding under the Microelectronics Commons] -

* $16.2 Million to develop advanced gallium nitride (GaN) semiconductor technologies, with partners including USC, Northrop Grumman, Teledyne Technologies, HRL Laboratories, PseudolithIC, Monde Wireless Inc., Transphorm, UCLA and UC Santa Barbara.
* $15.7 Million in Funding for 5G/6G millimeter-wave Phased-Array Prototypes, with team USC, Northrop Grumman, HRL Laboratories, Teledyne, Caltech, UCLA, UC Santa Barbara, UC San Diego, Vorago, Global Foundries.

// [[User:John_d|Demis D. John]] 16:32, 23 September 2024 (PDT)

===NSF-ATE Award for SBCC and UCSB: New Semiconductor Pathway===
The UCSB NanoFab and CNSI were recently awarded a project by NSF-ATE to build a semiconductor pathway (associates degree or certificate) at Santa Barbara City College, utilizing UCSB Cleanrooms. The project "[https://www.nsf.gov/awardsearch/showAward?AWD_ID=2400982 Expansion of CCPRIME: Central Coast Partnership for Regional Industry-Focused Micro/Nanotechnology Education]" is one of 6 projects funded by an [https://new.nsf.gov/news/nsf-invests-76m-educational-projects-build-skilled Intel-NSF partnership.] The project builds on the existing "[https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps]" already being run twice a year in the [https://www.cnsi.ucsb.edu/facilities/quantum-structures CNSI QSF cleanroom]. // [[User:John_d|Demis D. John]] 13:15, 14 August 2024 (PDT)

===CHIPS Act Award Announced to USC and UCSB NanoFab===
[https://carbajal.house.gov/news/documentsingle.aspx?DocumentID=1672 U.S. Congressman Salud Carbajal congratulates UCSB and the NanoFab] on receiving a [https://www.nist.gov/chips CHIPS & Science Act] award, as part of the [https://microelectronicscommons.org/ California DREAMS Hub (Microelectronics Commons) led by USC].
-- [[User:John d|Demis]] 12:06, 4 October 2023 (PDT)

=== RIE#3 Removed ===
We have removed [[RIE_3_(MRC)|RIE#3]] from the Nanofab, it has gone to the [https://www.ece.ucsb.edu/department-resources/electronics-shop/tcr Teaching Cleanroom]. All user's processes have been transferred to the [[Fluorine_ICP_Etcher_(PlasmaTherm/SLR_Fluorine_ICP)|Fluorine ICP Etcher]]. // [[User:John_d|Demis D. John]] 15:58, 6 August 2024 (PDT)

=== NanoFab staff awarded Goleta's Innovator of the Year 2023 ===
NanoFab staff member [[Demis D. John]] has been awarded the ''City of Goleta's "Innovator of the Year"'' for 2023! The award stems from the UCSB Nanofab's impact on the communities of Santa Barbara County and surrounding regions, in enabling cutting edge technology companies to thrive, which also enables many local careers in advanced high-tech. See the [https://sbscchamber.com/goletas-finest-2023-award-recipients-announced/ full announcement by the Santa Barbara South Coast Chamber of Commerce]. // [[User:John d|Demis D. John]] 13:58, 7 November 2023 (PST)

=== NanoFab Featured in Regional Tech Videos ===
The UCSB NanoFab is showcased as a driver of innovation and enabler of the regional high-tech industry.

See the videos here:
{| class="wikitable"
|[https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false '''''Santa Barbara County: This is TechTopia'''''] [[File:Techtopia_Vid_-_Thumbnail_PlayButton.jpg|none|300x300px|link=https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false]]

|[https://www.youtube.com/watch?v=op746os6eRI '''''UCSB NanoFab: An Innovation Center'''''] [[File:NanoFab_COE_Engineering_Vid_-_thumbnail_2_crop.jpg|none|300x300px|link=https://www.youtube.com/watch?v=op746os6eRI]]
|}

// [[User:John d|John d]] 09:26, 1 November 2023 (PST)




===''[[Template:News_-_Older_Articles|See older articles at this link]]''===
<endfeed />
<noinclude>[[Category:Templates]]</noinclude>

Template:News

2026-08-22T15:30:25Z

John d:

<startfeed />


''News from the U.C. Santa Barbara Nanofabrication Facility.''




=== "Make Microchips!" - new book by Nanofab staff ===
Nanofab staff [[Demis D. John]] published an intro-level book for people wanting to learn about making microchips, it is [https://www.amazon.com/dp/B0HDRHG3KM available now]. The book compliments the [https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps] and other [https://nanofab.ucsb.edu/workforce workforce development efforts] Demis has launched, to help people get into the semiconductor industry.
// [[User:John_d|Demis D. John]] 15:30, 22 August 2026 (UTC)

=== Raith PicoMaster Direct-Write Installed ===
We have installed a new H-Line (405nm) Direct-write tool: The [[Maskless_Aligner_(Raith_PicoMaster_XF)]]. The new tool is currently undergoing staff qualifications and we are developing operating procedures. // [[User:John_d|Demis D. John]] 19:02, 18 July 2026 (UTC)

===ProtoFab Opening Summer 2026===
The Nanofab is launching a [https://protofab.oasis.ucsb.edu/ Prototyping Facility called the "Protofab"], which is located at [https://oasis.ucsb.edu/ UCSB's new OASIS building]. Learn more at [https://protofab.oasis.ucsb.edu https://protofab.oasis.ucsb.edu]

The new lab will enable taking your diced chips from the Nanofab, to the Protofab where you can wirebond, attach to PCB's/carriers, align+attach optical fibers etc., to make a real "prototype". The lab is expected to open in Summer 2026, with equipment currently being installed.

Access & model is similar to the Nanofab - anyone can pay an hourly fee to go into the Protofab, using key fobs for access. (OASIS "Membership" is ''not required'' to use the Protofab, unless you also want your own desk + private lab space at OASIS.)

Contact the Protofab lab manager [mailto:arin_abed@ucsb.edu Arin Abed] for more information.
// [[User:John_d|Demis D. John]] 19:51, 27 May 2026 (UTC)

===DREAMS Hub awarded 2 projects in GaN and 5G/6G technologies===
[https://viterbischool.usc.edu/news/2024/09/usc-viterbi-led-ca-dreams-hub-is-awarded-31-9-million-in-funding-under-the-microelectronics-commons/ CA DREAMS Hub is awarded $31.9 million in funding under the Microelectronics Commons] -

* $16.2 Million to develop advanced gallium nitride (GaN) semiconductor technologies, with partners including USC, Northrop Grumman, Teledyne Technologies, HRL Laboratories, PseudolithIC, Monde Wireless Inc., Transphorm, UCLA and UC Santa Barbara.
* $15.7 Million in Funding for 5G/6G millimeter-wave Phased-Array Prototypes, with team USC, Northrop Grumman, HRL Laboratories, Teledyne, Caltech, UCLA, UC Santa Barbara, UC San Diego, Vorago, Global Foundries.

// [[User:John_d|Demis D. John]] 16:32, 23 September 2024 (PDT)

===NSF-ATE Award for SBCC and UCSB: New Semiconductor Pathway===
The UCSB NanoFab and CNSI were recently awarded a project by NSF-ATE to build a semiconductor pathway (associates degree or certificate) at Santa Barbara City College, utilizing UCSB Cleanrooms. The project "[https://www.nsf.gov/awardsearch/showAward?AWD_ID=2400982 Expansion of CCPRIME: Central Coast Partnership for Regional Industry-Focused Micro/Nanotechnology Education]" is one of 6 projects funded by an [https://new.nsf.gov/news/nsf-invests-76m-educational-projects-build-skilled Intel-NSF partnership.] The project builds on the existing "[https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps]" already being run twice a year in the [https://www.cnsi.ucsb.edu/facilities/quantum-structures CNSI QSF cleanroom]. // [[User:John_d|Demis D. John]] 13:15, 14 August 2024 (PDT)

===CHIPS Act Award Announced to USC and UCSB NanoFab===
[https://carbajal.house.gov/news/documentsingle.aspx?DocumentID=1672 U.S. Congressman Salud Carbajal congratulates UCSB and the NanoFab] on receiving a [https://www.nist.gov/chips CHIPS & Science Act] award, as part of the [https://microelectronicscommons.org/ California DREAMS Hub (Microelectronics Commons) led by USC].
-- [[User:John d|Demis]] 12:06, 4 October 2023 (PDT)

=== RIE#3 Removed ===
We have removed [[RIE_3_(MRC)|RIE#3]] from the Nanofab, it has gone to the [https://www.ece.ucsb.edu/department-resources/electronics-shop/tcr Teaching Cleanroom]. All user's processes have been transferred to the [[Fluorine_ICP_Etcher_(PlasmaTherm/SLR_Fluorine_ICP)|Fluorine ICP Etcher]]. // [[User:John_d|Demis D. John]] 15:58, 6 August 2024 (PDT)

=== NanoFab staff awarded Goleta's Innovator of the Year 2023 ===
NanoFab staff member [[Demis D. John]] has been awarded the ''City of Goleta's "Innovator of the Year"'' for 2023! The award stems from the UCSB Nanofab's impact on the communities of Santa Barbara County and surrounding regions, in enabling cutting edge technology companies to thrive, which also enables many local careers in advanced high-tech. See the [https://sbscchamber.com/goletas-finest-2023-award-recipients-announced/ full announcement by the Santa Barbara South Coast Chamber of Commerce]. // [[User:John d|Demis D. John]] 13:58, 7 November 2023 (PST)

=== NanoFab Featured in Regional Tech Videos ===
The UCSB NanoFab is showcased as a driver of innovation and enabler of the regional high-tech industry.

See the videos here:
{| class="wikitable"
|[https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false '''''Santa Barbara County: This is TechTopia'''''] [[File:Techtopia_Vid_-_Thumbnail_PlayButton.jpg|none|300x300px|link=https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false]]

|[https://www.youtube.com/watch?v=op746os6eRI '''''UCSB NanoFab: An Innovation Center'''''] [[File:NanoFab_COE_Engineering_Vid_-_thumbnail_2_crop.jpg|none|300x300px|link=https://www.youtube.com/watch?v=op746os6eRI]]
|}

// [[User:John d|John d]] 09:26, 1 November 2023 (PST)




===''[[Template:News_-_Older_Articles|See older articles at this link]]''===
<endfeed />
<noinclude>[[Category:Templates]]</noinclude>

Template:News

2026-08-22T15:30:01Z

John d: added make microchips

<startfeed />


''News from the U.C. Santa Barbara Nanofabrication Facility.''




=== "Make Microchips!" - new book by Nanofab staff ===
Nanofab staff [[Demis D. John]] published an intro-level book for people wanting to learn about making microchips, it is [https://www.amazon.com/dp/B0HDRHG3KM available now]. The book compliments the [https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps] and other [https://nanofab.ucsb.edu/workforce workforce development efforts] Demis has launched, to help people get into the semiconductor industry.
// [[User:John_d|Demis D. John]] 19:02, 18 July 2026 (UTC)

=== Raith PicoMaster Direct-Write Installed ===
We have installed a new H-Line (405nm) Direct-write tool: The [[Maskless_Aligner_(Raith_PicoMaster_XF)]]. The new tool is currently undergoing staff qualifications and we are developing operating procedures. // [[User:John_d|Demis D. John]] 19:02, 18 July 2026 (UTC)

===ProtoFab Opening Summer 2026===
The Nanofab is launching a [https://protofab.oasis.ucsb.edu/ Prototyping Facility called the "Protofab"], which is located at [https://oasis.ucsb.edu/ UCSB's new OASIS building]. Learn more at [https://protofab.oasis.ucsb.edu https://protofab.oasis.ucsb.edu]

The new lab will enable taking your diced chips from the Nanofab, to the Protofab where you can wirebond, attach to PCB's/carriers, align+attach optical fibers etc., to make a real "prototype". The lab is expected to open in Summer 2026, with equipment currently being installed.

Access & model is similar to the Nanofab - anyone can pay an hourly fee to go into the Protofab, using key fobs for access. (OASIS "Membership" is ''not required'' to use the Protofab, unless you also want your own desk + private lab space at OASIS.)

Contact the Protofab lab manager [mailto:arin_abed@ucsb.edu Arin Abed] for more information.
// [[User:John_d|Demis D. John]] 19:51, 27 May 2026 (UTC)

===DREAMS Hub awarded 2 projects in GaN and 5G/6G technologies===
[https://viterbischool.usc.edu/news/2024/09/usc-viterbi-led-ca-dreams-hub-is-awarded-31-9-million-in-funding-under-the-microelectronics-commons/ CA DREAMS Hub is awarded $31.9 million in funding under the Microelectronics Commons] -

* $16.2 Million to develop advanced gallium nitride (GaN) semiconductor technologies, with partners including USC, Northrop Grumman, Teledyne Technologies, HRL Laboratories, PseudolithIC, Monde Wireless Inc., Transphorm, UCLA and UC Santa Barbara.
* $15.7 Million in Funding for 5G/6G millimeter-wave Phased-Array Prototypes, with team USC, Northrop Grumman, HRL Laboratories, Teledyne, Caltech, UCLA, UC Santa Barbara, UC San Diego, Vorago, Global Foundries.

// [[User:John_d|Demis D. John]] 16:32, 23 September 2024 (PDT)

===NSF-ATE Award for SBCC and UCSB: New Semiconductor Pathway===
The UCSB NanoFab and CNSI were recently awarded a project by NSF-ATE to build a semiconductor pathway (associates degree or certificate) at Santa Barbara City College, utilizing UCSB Cleanrooms. The project "[https://www.nsf.gov/awardsearch/showAward?AWD_ID=2400982 Expansion of CCPRIME: Central Coast Partnership for Regional Industry-Focused Micro/Nanotechnology Education]" is one of 6 projects funded by an [https://new.nsf.gov/news/nsf-invests-76m-educational-projects-build-skilled Intel-NSF partnership.] The project builds on the existing "[https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps]" already being run twice a year in the [https://www.cnsi.ucsb.edu/facilities/quantum-structures CNSI QSF cleanroom]. // [[User:John_d|Demis D. John]] 13:15, 14 August 2024 (PDT)

===CHIPS Act Award Announced to USC and UCSB NanoFab===
[https://carbajal.house.gov/news/documentsingle.aspx?DocumentID=1672 U.S. Congressman Salud Carbajal congratulates UCSB and the NanoFab] on receiving a [https://www.nist.gov/chips CHIPS & Science Act] award, as part of the [https://microelectronicscommons.org/ California DREAMS Hub (Microelectronics Commons) led by USC].
-- [[User:John d|Demis]] 12:06, 4 October 2023 (PDT)

=== RIE#3 Removed ===
We have removed [[RIE_3_(MRC)|RIE#3]] from the Nanofab, it has gone to the [https://www.ece.ucsb.edu/department-resources/electronics-shop/tcr Teaching Cleanroom]. All user's processes have been transferred to the [[Fluorine_ICP_Etcher_(PlasmaTherm/SLR_Fluorine_ICP)|Fluorine ICP Etcher]]. // [[User:John_d|Demis D. John]] 15:58, 6 August 2024 (PDT)

=== NanoFab staff awarded Goleta's Innovator of the Year 2023 ===
NanoFab staff member [[Demis D. John]] has been awarded the ''City of Goleta's "Innovator of the Year"'' for 2023! The award stems from the UCSB Nanofab's impact on the communities of Santa Barbara County and surrounding regions, in enabling cutting edge technology companies to thrive, which also enables many local careers in advanced high-tech. See the [https://sbscchamber.com/goletas-finest-2023-award-recipients-announced/ full announcement by the Santa Barbara South Coast Chamber of Commerce]. // [[User:John d|Demis D. John]] 13:58, 7 November 2023 (PST)

=== NanoFab Featured in Regional Tech Videos ===
The UCSB NanoFab is showcased as a driver of innovation and enabler of the regional high-tech industry.

See the videos here:
{| class="wikitable"
|[https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false '''''Santa Barbara County: This is TechTopia'''''] [[File:Techtopia_Vid_-_Thumbnail_PlayButton.jpg|none|300x300px|link=https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false]]

|[https://www.youtube.com/watch?v=op746os6eRI '''''UCSB NanoFab: An Innovation Center'''''] [[File:NanoFab_COE_Engineering_Vid_-_thumbnail_2_crop.jpg|none|300x300px|link=https://www.youtube.com/watch?v=op746os6eRI]]
|}

// [[User:John d|John d]] 09:26, 1 November 2023 (PST)




===''[[Template:News_-_Older_Articles|See older articles at this link]]''===
<endfeed />
<noinclude>[[Category:Templates]]</noinclude>

CAIBE (Oxford Ion Mill)

2026-08-21T15:46:00Z

John d: /* Detailed Specifications */ moves Smaple Saizes to it's own section

{{tool2|{{PAGENAME}}
|picture=CAIBE.jpg
|type = Dry Etch
|super= Bill Millerski
|super2= Lee Sawyer
|location=Bay 2
|description = CAIBE (Chemically Assisted Ion Beam Etcher)
|manufacturer = Oxford Instruments
|model = Ionfab 300 Plus
|materials = Various
|toolid=58
}}
==About==

This is an Oxford Instruments PlasmaLab 300 IBE/RIBE/CAIBE system used for ion beam etching of a variety of materials including metals, oxides, semiconductors. Ion beam etching (IBE) allows control of sidewall etch profiles by tilting and rotating the sample during the etch. Reactive chemistry ("Chemically Assisted Ion Beam Etching", CAIBE) can be used, when appropriate, to enhance the etch rate of materials, such as oxides, polymers, and semiconductors.

This system is used to physically ion beam etch noble and inert metals with Ar ion milling, and to etch other materials that react with chlorine, fluorine, or oxygen using a reactive ion beam. The ion beam is generated in a 15cm diameter 3-grid ion source manufactured by Oxford. The Ion beam voltage & current control the etch rate. Beam voltage (related to ion energy) affects the sputter yield (atoms etched per incident ion) and Ion beam current controls the flux of ions (number of ions in the beam). Etch rate should be roughly linear with beam current. Neutralizing electrons are generated by a plasma bridge neutralizer (PBN) so that samples are not charged by ions during the etch. Samples can be cooled to 5°C or heated to 300°C for etching. He back-side cooling is used to transfer heat from(to) the sample to(from) the cooled(heated) platen.

===Cluster Configuration===
The Ion Mill system is clustered with 2 Oxford ALD systems, allowing the process flexibility of etching followed by ALD passivation or metalization without breaking vacuum.

*Chamber #1: [[Atomic Layer Deposition (Oxford FlexAL)|ALD Metal Films only]]
*Chamber #2: [[CAIBE (Oxford Ion Mill)|CAIBE Oxford Ion Mill]] (this page)
*Chamber #3: [[Atomic Layer Deposition (Oxford FlexAL)|ALD Dielectrics Films only]]

==Detailed Specifications==

*Etch gases include: CF4, Cl2, Ar, O2
*Cl2 available in CAIBE mode (Cl2 not entering ion gun) through a gas ring.
*RIBE (reactive gas entering ion gun during RF discharge) mode for all reactive gases
*Low 1 E -7 Torr ultimate chamber pressure, etch pressure ~1 E-4 Torr
*15cm ion-gun with PBN neutralizer
*Angled etch control from 0 degrees (normal incidence) to 75 degrees.
*Sample Rotated or fixed at controlled position for etching.
*Vb from 50V to over 1000V
*Ib up to 500mA
*He-backside cooling
*Substrate temperature 5C to 300C
*Clustered through vacuum chambers with ALD systems.
*Masking material depends on material being etched and etch gas used

=== Sample sizes: ===
We have metal carriers with metal clips and holes for Helium backside cooling make, with various '''''sample-pocket sizes''''':
*4" wafer mount with backside Helium cooling ports
*2" wafer mount with backside Helium cooling ports
*35 mm square pieces or smaller, mount with backside Helium cooling ports
*Everything is loaded onto 6" metal carriers - Full 6-inch wafers can not be used on the tool at this time.
Smaller sample sizes generally will work fine, it is recommended to block all unused Helium cooling holes for the best sample cooling.

==Recipes==
Recipes can be found on the [https://wiki.nanotech.ucsb.edu/w/index.php?title=Other_Dry_Etching_Recipes#CAIBE_.28Oxford_Ion_Mill.29 '''CAIBE Recipes Page'''].

==Procedures & Documentation==

*[https://wiki.nanotech.ucsb.edu/w/images/4/40/Oxford_Cluster_Tool_Operating_Instructions_Rev_B.pdf Cluster Operating Instructions] - same instructions as ALD, except for the '''following difference''':
**''Make sure to securely attach your samples to the platens with clips, since the holder will be angled and rotated!'' ''6-inch wafers can be loaded as-is.''

*[https://wiki.nanofab.ucsb.edu/w/images/4/4d/Oxford_Ion_Mill_SOP.pdf Ion Mill SOP]
*[//wiki.nanotech.ucsb.edu/wiki/images/7/75/Ion_Beam_Etch_Overview_rev1.pdf Additional Documentation]

CAIBE (Oxford Ion Mill)

2026-08-20T20:11:57Z

John d: removed 6" wafer capability

{{tool2|{{PAGENAME}}
|picture=CAIBE.jpg
|type = Dry Etch
|super= Bill Millerski
|super2= Lee Sawyer
|location=Bay 2
|description = CAIBE (Chemically Assisted Ion Beam Etcher)
|manufacturer = Oxford Instruments
|model = Ionfab 300 Plus
|materials = Various
|toolid=58
}}
==About==

This is an Oxford Instruments PlasmaLab 300 IBE/RIBE/CAIBE system used for ion beam etching of a variety of materials including metals, oxides, semiconductors. Ion beam etching (IBE) allows control of sidewall etch profiles by tilting and rotating the sample during the etch. Reactive chemistry ("Chemically Assisted Ion Beam Etching", CAIBE) can be used, when appropriate, to enhance the etch rate of materials, such as oxides, polymers, and semiconductors.

This system is used to physically ion beam etch noble and inert metals with Ar ion milling, and to etch other materials that react with chlorine, fluorine, or oxygen using a reactive ion beam. The ion beam is generated in a 15cm diameter 3-grid ion source manufactured by Oxford. The Ion beam voltage & current control the etch rate. Beam voltage (related to ion energy) affects the sputter yield (atoms etched per incident ion) and Ion beam current controls the flux of ions (number of ions in the beam). Etch rate should be roughly linear with beam current. Neutralizing electrons are generated by a plasma bridge neutralizer (PBN) so that samples are not charged by ions during the etch. Samples can be cooled to 5°C or heated to 300°C for etching. He back-side cooling is used to transfer heat from(to) the sample to(from) the cooled(heated) platen.

===Cluster Configuration===
The Ion Mill system is clustered with 2 Oxford ALD systems, allowing the process flexibility of etching followed by ALD passivation or metalization without breaking vacuum.

*Chamber #1: [[Atomic Layer Deposition (Oxford FlexAL)|ALD Metal Films only]]
*Chamber #2: [[CAIBE (Oxford Ion Mill)|CAIBE Oxford Ion Mill]] (this page)
*Chamber #3: [[Atomic Layer Deposition (Oxford FlexAL)|ALD Dielectrics Films only]]

==Detailed Specifications==

*Etch gases include: CF4, Cl2, Ar, O2
*Cl2 available in CAIBE mode (Cl2 not entering ion gun) through a gas ring.
*RIBE (reactive gas entering ion gun during RF discharge) mode for all reactive gases
*Low 1 E -7 Torr ultimate chamber pressure, etch pressure ~1 E-4 Torr
*15cm ion-gun with PBN neutralizer
*Angled etch control from 0 degrees (normal incidence) to 75 degrees.
*Sample Rotated or fixed at controlled position for etching.
*Vb from 50V to over 1000V
*Ib up to 500mA
*He-backside cooling
*Substrate temperature 5C to 300C
*Sample sizes:
**4" wafer mount with backside Helium cooling ports
**2" wafer mount with backside Helium cooling ports
**35mm square pieces or smaller, mount with backside Helium cooling ports
**Everything is loaded onto 6" metal carriers - 6" wafers can not be used on the tool at this time.
*Clustered through vacuum chambers with ALD systems.
*Masking material depends on material being etched and etch gas used

==Recipes==
Recipes can be found on the [https://wiki.nanotech.ucsb.edu/w/index.php?title=Other_Dry_Etching_Recipes#CAIBE_.28Oxford_Ion_Mill.29 '''CAIBE Recipes Page'''].

==Procedures & Documentation==

*[https://wiki.nanotech.ucsb.edu/w/images/4/40/Oxford_Cluster_Tool_Operating_Instructions_Rev_B.pdf Cluster Operating Instructions] - same instructions as ALD, except for the '''following difference''':
**''Make sure to securely attach your samples to the platens with clips, since the holder will be angled and rotated!'' ''6-inch wafers can be loaded as-is.''

*[https://wiki.nanofab.ucsb.edu/w/images/4/4d/Oxford_Ion_Mill_SOP.pdf Ion Mill SOP]
*[//wiki.nanotech.ucsb.edu/wiki/images/7/75/Ion_Beam_Etch_Overview_rev1.pdf Additional Documentation]

Main Page

2026-08-12T20:10:53Z

John d: link to google site search

__NOTOC__
{{DISPLAYTITLE:{{FULLPAGENAME}}}}
{{Homepage_Topbanners}}

<center><table class="wikitable" style="height: 40px;">
<th style="background: AliceBlue; font-size: large;">[https://cse.google.com/cse?cx=d3fcf21d634164f56 '''<big>Search the Nanofab Wiki with Google</big>''']
</th></table></center>
{| id="mp-lower" style="margin:4px 0 0 0; width:100%; background:none; border-spacing: 0px;"
| class="MainPageBG" style="width:100%; border:1px solid #cedff2; background:#fff; vertical-align:top; color:#000;" |
{| id="mp-upper" style="width: 100%; margin:4px 0 0 0; background:none; border-spacing: 5px;"
| class="MainPageBG" style="width:65%; border:1px solid #cef2e0; background:#f5fffa; vertical-align:top; color:#000;" |
{| class="wikitable" style="width:100%;"
!Equipment Info
!Recipes + Processes
!Data + Info
| rowspan="2" style="background: #fff;" |
<div align="center" style="font-weight: bold;" valign="top">Other Links:</div>


*[http://signupmonkey.ece.ucsb.edu SignUpMonkey]
*[https://nanofab.ucsb.edu/services Get into the Lab]
*[https://wiki.nanofab.ucsb.edu//wiki/Services#Fabrication_Services_by_NanoFab_Staff Fabrication Services]
*[[Process Group Internships|Internships]]
<hr />

*[http://nanofab.ucsb.edu NanoTech Homepage]
*[[Nanofab Job Postings|NanoFab Job Postings]]
*[https://nanofab.ucsb.edu/staff#directions-parking Directions + Parking]
*[http://www.ece.ucsb.edu UCSB ECE Dept.]
|- style="vertical-align:top;"
|
*[[:Category:Lithography|Lithography]]
*[[:Category:Vacuum Deposition|Deposition]]
*[[:Category:Dry Etch|Dry Etch]]
*[[:Category:Wet Processing|Wet Process]]
*[[:Category:Thermal Processing|Thermal Process]]
*[[:Category:Packaging|Packaging/Bonding]]
*[[Tool List#Measurement .26 Characterization|Metrology/Test]]
|
*[[Lithography Recipes|Lithography]]
*[[Vacuum Deposition Recipes|Deposition]]
*[[Dry Etching Recipes|Dry Etching]]
*[[Wet Etching Recipes|Wet Etching]]
*[[Thermal Processing Recipes|Thermal Process]]
*[[Packaging Recipes|Packaging/Bonding]]
|
*[[Process Group - Process Control Data|Process Control Data]]
*[[Tutorials]] '''← NEW'''
*[[Calculators + Utilities|Calculators + Utilities]]

<hr />

*[[Usage Data and Statistics|Nanofab Data + Info]]
*[[Research|Research + Publications]]
*[[Tech Talks Seminar Series|Tech Talks]]

|}
{| id="mp-left" style="vertical-align:top; background:#f5fffa;"
|-
| style="background:#ffee55; border:1px solid #a3bfb1; color:#000;" |<div style="padding:2px 5px; text-align:left">{{Announcements}}</div>
|-
! style="padding:2px;" |<h3 id="mp-trivia-h2" style="margin:3px; background:#cef2e0; font-size:120%; font-weight:bold; border:1px solid #a3bfb1; text-align:left; color:#000; padding:0.2em 0.4em;">
'''News & Announcements'''
|-
| style="color:#000;" |<div id="mp-trivia" style="padding:2px 5px">{{news}}
<hr>
|-
! style="padding:2px;" |<h3 id="mp-tfa-h2" style="margin:3px; background:#cef2e0; font-size:120%; font-weight:bold; border:1px solid #a3bfb1; text-align:left; color:#000; padding:0.2em 0.4em;">'''General Information'''</h3>
|-
| style="color:#000;" |<div id="mp-trivia" style="padding:2px 5px" ; text-align:center>
{{Homepage_GeneralInfo}}
|}
|}
|}
{{Homepage_BottomBanner}}

Main Page

2026-08-12T20:05:56Z

John d: removed GoogleSiteSearch code

__NOTOC__
{{DISPLAYTITLE:{{FULLPAGENAME}}}}
{{Homepage_Topbanners}}
{| id="mp-lower" style="margin:4px 0 0 0; width:100%; background:none; border-spacing: 0px;"
| class="MainPageBG" style="width:100%; border:1px solid #cedff2; background:#fff; vertical-align:top; color:#000;" |
{| id="mp-upper" style="width: 100%; margin:4px 0 0 0; background:none; border-spacing: 5px;"
| class="MainPageBG" style="width:65%; border:1px solid #cef2e0; background:#f5fffa; vertical-align:top; color:#000;" |
{| class="wikitable" style="width:100%;"
!Equipment Info
!Recipes + Processes
!Data + Info
| rowspan="2" style="background: #fff;" |
<div align="center" style="font-weight: bold;" valign="top">Other Links:</div>


*[http://signupmonkey.ece.ucsb.edu SignUpMonkey]
*[https://nanofab.ucsb.edu/services Get into the Lab]
*[https://wiki.nanofab.ucsb.edu//wiki/Services#Fabrication_Services_by_NanoFab_Staff Fabrication Services]
*[[Process Group Internships|Internships]]
<hr />

*[http://nanofab.ucsb.edu NanoTech Homepage]
*[[Nanofab Job Postings|NanoFab Job Postings]]
*[https://nanofab.ucsb.edu/staff#directions-parking Directions + Parking]
*[http://www.ece.ucsb.edu UCSB ECE Dept.]
|- style="vertical-align:top;"
|
*[[:Category:Lithography|Lithography]]
*[[:Category:Vacuum Deposition|Deposition]]
*[[:Category:Dry Etch|Dry Etch]]
*[[:Category:Wet Processing|Wet Process]]
*[[:Category:Thermal Processing|Thermal Process]]
*[[:Category:Packaging|Packaging/Bonding]]
*[[Tool List#Measurement .26 Characterization|Metrology/Test]]
|
*[[Lithography Recipes|Lithography]]
*[[Vacuum Deposition Recipes|Deposition]]
*[[Dry Etching Recipes|Dry Etching]]
*[[Wet Etching Recipes|Wet Etching]]
*[[Thermal Processing Recipes|Thermal Process]]
*[[Packaging Recipes|Packaging/Bonding]]
|
*[[Process Group - Process Control Data|Process Control Data]]
*[[Tutorials]] '''← NEW'''
*[[Calculators + Utilities|Calculators + Utilities]]

<hr />

*[[Usage Data and Statistics|Nanofab Data + Info]]
*[[Research|Research + Publications]]
*[[Tech Talks Seminar Series|Tech Talks]]

|}
{| id="mp-left" style="vertical-align:top; background:#f5fffa;"
|-
| style="background:#ffee55; border:1px solid #a3bfb1; color:#000;" |<div style="padding:2px 5px; text-align:left">{{Announcements}}</div>
|-
! style="padding:2px;" |<h3 id="mp-trivia-h2" style="margin:3px; background:#cef2e0; font-size:120%; font-weight:bold; border:1px solid #a3bfb1; text-align:left; color:#000; padding:0.2em 0.4em;">
'''News & Announcements'''
|-
| style="color:#000;" |<div id="mp-trivia" style="padding:2px 5px">{{news}}
<hr>
|-
! style="padding:2px;" |<h3 id="mp-tfa-h2" style="margin:3px; background:#cef2e0; font-size:120%; font-weight:bold; border:1px solid #a3bfb1; text-align:left; color:#000; padding:0.2em 0.4em;">'''General Information'''</h3>
|-
| style="color:#000;" |<div id="mp-trivia" style="padding:2px 5px" ; text-align:center>
{{Homepage_GeneralInfo}}
|}
|}
|}
{{Homepage_BottomBanner}}

Main Page

2026-08-12T00:29:57Z

John d: commented-out + added google site search

__NOTOC__
{{DISPLAYTITLE:{{FULLPAGENAME}}}}
{{Homepage_Topbanners}}

{| id="mp-lower" style="margin:4px 0 0 0; width:100%; background:none; border-spacing: 0px;"
| class="MainPageBG" style="width:100%; border:1px solid #cedff2; background:#fff; vertical-align:top; color:#000;" |
{| id="mp-upper" style="width: 100%; margin:4px 0 0 0; background:none; border-spacing: 5px;"
| class="MainPageBG" style="width:65%; border:1px solid #cef2e0; background:#f5fffa; vertical-align:top; color:#000;" |
{| class="wikitable" style="width:100%;"
!Equipment Info
!Recipes + Processes
!Data + Info
| rowspan="2" style="background: #fff;" |
<div align="center" style="font-weight: bold;" valign="top">Other Links:</div>


*[http://signupmonkey.ece.ucsb.edu SignUpMonkey]
*[https://nanofab.ucsb.edu/services Get into the Lab]
*[https://wiki.nanofab.ucsb.edu//wiki/Services#Fabrication_Services_by_NanoFab_Staff Fabrication Services]
*[[Process Group Internships|Internships]]
<hr />

*[http://nanofab.ucsb.edu NanoTech Homepage]
*[[Nanofab Job Postings|NanoFab Job Postings]]
*[https://nanofab.ucsb.edu/staff#directions-parking Directions + Parking]
*[http://www.ece.ucsb.edu UCSB ECE Dept.]
|- style="vertical-align:top;"
|
*[[:Category:Lithography|Lithography]]
*[[:Category:Vacuum Deposition|Deposition]]
*[[:Category:Dry Etch|Dry Etch]]
*[[:Category:Wet Processing|Wet Process]]
*[[:Category:Thermal Processing|Thermal Process]]
*[[:Category:Packaging|Packaging/Bonding]]
*[[Tool List#Measurement .26 Characterization|Metrology/Test]]
|
*[[Lithography Recipes|Lithography]]
*[[Vacuum Deposition Recipes|Deposition]]
*[[Dry Etching Recipes|Dry Etching]]
*[[Wet Etching Recipes|Wet Etching]]
*[[Thermal Processing Recipes|Thermal Process]]
*[[Packaging Recipes|Packaging/Bonding]]
|
*[[Process Group - Process Control Data|Process Control Data]]
*[[Tutorials]] '''← NEW'''
*[[Calculators + Utilities|Calculators + Utilities]]

<hr />

*[[Usage Data and Statistics|Nanofab Data + Info]]
*[[Research|Research + Publications]]
*[[Tech Talks Seminar Series|Tech Talks]]

|}
{| id="mp-left" style="vertical-align:top; background:#f5fffa;"
|-
| style="background:#ffee55; border:1px solid #a3bfb1; color:#000;" |<div style="padding:2px 5px; text-align:left">{{Announcements}}</div>
|-
! style="padding:2px;" |<h3 id="mp-trivia-h2" style="margin:3px; background:#cef2e0; font-size:120%; font-weight:bold; border:1px solid #a3bfb1; text-align:left; color:#000; padding:0.2em 0.4em;">
'''News & Announcements'''
|-
| style="color:#000;" |<div id="mp-trivia" style="padding:2px 5px">{{news}}
<hr>
|-
! style="padding:2px;" |<h3 id="mp-tfa-h2" style="margin:3px; background:#cef2e0; font-size:120%; font-weight:bold; border:1px solid #a3bfb1; text-align:left; color:#000; padding:0.2em 0.4em;">'''General Information'''</h3>
|-
| style="color:#000;" |<div id="mp-trivia" style="padding:2px 5px" ; text-align:center>
{{Homepage_GeneralInfo}}
|}
|}
|}
{{Homepage_BottomBanner}}

Process Group - Process Control Data

2026-08-11T17:48:47Z

John d: /* Maskless Aligner (Heidelberg MLA150) - Process Control */ added by SEM

Process Control Data are standardized processes, run by the NanoFab, allowing for day-to-day or year-by-year comparisons of a tool's performance at the process level. This is similar [https://en.wikipedia.org/wiki/Statistical_process_control Statistical Process Control (SPC)].

These are the same links are found on individual tool pages, in the '''''<<tool page>> > Process Control''''' section.

__TOC__

Data are collected by our [https://nanofab.ucsb.edu/workforce#internships Process Group Interns] and reviewed by [[Staff List#Process Group|Process Group Staff]].
=Deposition, Dielectric (Process Control Data)=
[[File:PECVD SPC Chart Example.png|alt=SPC chart example|thumb|228x228px|Example Process Control Charts (SPC) for thin-film DepCals.|link=]]
[[File:Surfscan 230113A7G2 after low particles.jpg|alt=screenshot of surfscan particle count|thumb|205x205px|Example particle counts taken on each tool+film.|link=]]
[[File:PECVD1 SiO2 F50 WaferMap example.jpg|alt=Screenshot of Filmetrics F50 wafermap of typical DepCals film|thumb|215x215px|Example of DepCals Thickness/Refractive Index uniformity measurement (4% shown here).|link=]]
''Process Control data for various deposition tools in the lab.''

==[[PECVD Recipes#PECVD 1 .28PlasmaTherm 790.29|PECVD #1 (PlasmaTherm 790)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=1270764394 PECVD#1: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=0 PECVD#1: SiO2]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=98787450 PECVD#1: Si3N4]

==[[PECVD Recipes#PECVD 2 .28Advanced Vacuum.29|PECVD #2 (Advanced Vacuum)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=272916741 PECVD#2: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=1313651154 PECVD#2: SiO2]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=773875841 PECVD#2: Si3N4]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=584923738 PECVD#2: Low-Stress Si3N4]
**[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=203400760 Plots of Low-Stress Si3N4 Data]

==[[PECVD Recipes#ICP-PECVD .28Unaxis VLR.29|ICP-PECVD (Unaxis VLR Dep)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948 ICP-PECVD: Plots of SiO2 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=345725577 ICP-PECVD: Plots of Si3N4 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=0 ICP-PECVD: SiO2 Low-Dep Rate (LDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1459210138 ICP-PECVD: SiO2 High-Dep Rate (HDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1670372499 ICP-PECVD: Si3N4]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1517031044 ICP-PECVD: Si3N4 Low-Stress]

==[[Sputtering Recipes#Ion Beam Deposition .28Veeco NEXUS.29|Ion Beam Sputter Deposition (Veeco Nexus)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=2030038046 IBD: Plots of all data]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=0 IBD: SiO2]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=971672318 IBD: Si3N4]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=855566098 IBD: Ta2O5]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=713133870 IBD: Al2O3]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=834404663 IBD: TiO2]

===Old Data (Pre 2022)===
Old data in a different format can be found below:

*[[Old Deposition Data - 2021-12-15]]

<hr style="height:5px">
<hr style="height:5px">
=Deposition, Metal - Process Control Data=
''Process Control data for various deposition tools in the lab.''

== [[Sputter 5 (AJA ATC 2200-V)]] - Process Control ==
[[File:Process Control - Sputter 5 Titanium Sheet Resistance plot.png|alt=Screenshot of Sputter 5 Titanium Sheet Resistance process control chart|thumb|Sputter 5 Titanium - Sheet Resistance - Process Control Chart - '''Example''' data only.

← click a link for live data.|link=]]

=== Sputter 5: Ti ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=695635057#gid=695635057 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Titanium Plots]

=== Sputter 5: Al ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=0#gid=0 Aluminum Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Aluminum Plots]

=== Sputter 5: Cr ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=572205583#gid=572205583 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Chromium Plots]

== [[E-Beam 4 (CHA)]] - Process Control ==
[[File:Process Control - E-Beam 4 Titanium Stress plot.png|alt=Screenshot of E-Beam 4 Titanium Stress - process control chart|thumb|E-Beam 4 Titanium Stress - Process Control Chart. '''Example''' data only -

← click a link for live data.|link=]]

=== E-Beam 4: Ti ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=384597990#gid=384597990 Titanium Plots]

=== E-Beam 4: Au ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=834604706#gid=834604706 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=721807140#gid=721807140 Gold Plots]

=== E-Beam 4: Cr ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1629968393#gid=1629968393 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=701729811#gid=701729811 Chromium Plots]

=== E-Beam 4: Ni ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=649905488#gid=649905488 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1525197973#gid=1525197973 Nickel Plots]

== [[E-Beam 1 (Sharon)]] - Process Control ==

=== E-Beam 1: Ti ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1305007052#gid=1305007052 Titanium Plots]

=== E-Beam 1: Au ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1762267354#gid=1762267354 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1245613525#gid=1245613525 Gold Plots]

=== E-Beam 1: Cr ===
*[https://wiki.nanofab.ucsb.edu/wiki/Process_Group_-_Process_Control_Data?veaction=edit&section=7 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=424169133#gid=424169133 Chromium Plots]

=== E-Beam 1: Ni ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=679240351#gid=679240351 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1463522927#gid=1463522927 Nickel Plots]

<hr style="height:5px">
<hr style="height:5px">
=Etching (Process Control Data)=
''Process Control data for various dry etching tools in the lab.''

==[[ICP Etching Recipes#Process Control Data .28Fluorine ICP Etcher.29|PlasmaTherm SLR Fluorine Etcher]] - Process Control==

=== SiO2 Etching (FL-ICP Process Control) ===
''We have found that SiO2 etching is fairly insensitive to chamber condition.''
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit?usp=sharing SiO2 Etching with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 SiO2 Etching with CHF3/CF4 - '''Plots'''][[File:FL-ICP Process Control Data Example.jpg|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281]]

====Old SiO2 Process Control Data====

*[[Test Data of Etching SiO2 with CHF3/CF4-Fluorine ICP Etcher|SiO2 Etching with CHF3/CF4 (FL-ICP]]) - ''No data prior to 2023-01-20''

=== Si Etching (FL-ICP Process Control) ===
''This Si etch is much more sensitive to chamber condition, allowing us to detect chamber contamination faster.''

*'''Recipe: [[ICP Etching Recipes#Si Etch Recipes (Fluorine ICP Etcher)|SiVertHFv2]]''' - C4F8/SF6/CF4 etch of 100mm Silicon Wafer with ~50% open area and resist mask

*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=0#gid=0 Si Etching with C4F8/SF6/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/CF4 - '''Plots'''][[File:FICP-Si.png|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281]]
==[[ICP Etching Recipes#Process Control Data .28Panasonic 1.29|Panasonic ICP #1]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP1 Process Control Data Example.jpg|alt=example chart of ICP1 SiO2 Process Control Chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4-ICP1|SiO2 Etch with CHF3/CF4 (Panasonic 1)]] - ''No data prior to 2023-01-20''

== [[ICP Etching Recipes#Process Control Data .28Panasonic 2.29|Panasonic ICP#2]] - Process Control ==

=== GaAs Etch with N2/Cl2 - Process Control Data (Panasonic 2) ===

* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=0#gid=0 GaAs Etch with N2/Cl2 - '''Etch Data''']
* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 GaAs Etch with N2/Cl2 - '''Plots'''][[File:GaAs_Etch_ICP2_SPC.png|link=https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281|alt=example ICP2 process control chart|none|thumb|249x249px|[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]]]

=== SiO2 Etch with CHF3/CF4 - Process Control Data (Panasonic 2) ===

*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP2 Process Control Data Example.jpg|alt=example ICP2 process control chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4|SiO2 Etching with CHF3/CF4 - ICP2]] - ''No data prior to 2023-01-20''

==[[ICP Etching Recipes#Process Control Data .28Unaxis VLR.29|Unaxis VLR Etch]] - Process Control==

*[[Unaxis VLR Etch - Process Control Data|InP Etching with Cl2/H/Ar @ 200°C - Unaxis Etch]]

==[[ICP Etching Recipes#Process Control Data .28Oxford ICP Etcher.29|Oxford PlasmaPro Cobra Etcher]] - Process Control==

=== Std InP Ridge Etch Cl2/H2/Ar/200°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/H2/Ar @ 200°C, 1cm piece with ~50% SiO2 hardmask.''

* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Etch Data Tables''']
* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Plots''']
[[File:200C InP.png|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281]]

=== Std InP Ridge Etch: Cl2/CH4/H2/60°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/CH4/H2 @ 60°C, 1cm piece with ~50% SiO2 hardmask. No longer calibrating this recipe.''

*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=1552080791#gid=1552080791 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Plots'''][[File:Oxford-ICP-Etch Process Control Data Example.jpg|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281]]

====Old InP Ridge Etch Data====

*[[Oxford ICP Etcher - Process Control Data|InP Ridge Etch with Cl2/CH4/H2 @ 60°C]] - ''No data prior to 2023-01-20''

=== GaN Etch (Cl2/BCl3/Ar/200°C) ===
Recipe: ''Std GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm ''~1.2µm deep GaN etch with Cl2/BCl3/Ar at 200°C.'' Sapphire substrate with SiO2 mask for GaN.

* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 GaN Etching with Cl2/BCl3/Ar at 200°C - Plots][[File:GaN SPC.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279]]
<hr style="height:5px">
<hr style="height:5px">

== [[DSEIII (PlasmaTherm/Deep Silicon Etcher)|PlasmaTherm DSEIII Deep Silicon Etcher]] - Process Control ==

=== Si Bosch Etching C4F8/SF6/Ar ===
*Recipe: ''STD_Bosch_Si (⭐️Production),'' on 100mm Si Wafer with ~50% open area, photoresist mask, ~40µm deep

*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=0#gid=0 Si Etching with C4F8/SF6/Ar - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/Ar - '''Plots'''][[File:DSE plot.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281]]
<hr style="height:5px">
<hr style="height:5px">

=Lithography (Process Control Data)=
''Process Control Data for Nanofab Lithography/patterning tools.''

==[[Stepper_Recipes#Stepper_3_.28ASML_DUV.29|Stepper #3 (ASML DUV)]] - Process Control==

*''The Process Group regularly measures data on lithography Critical Dimension ("CD") and Wafer-stage Particulate Contamination for this tool, using a sensitive lithography process that will reveal small changes in Dose repeatability and wafer flatness.''
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 '''Plots of CD Repeatability''']
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 '''Data for CD Uniformity and Particulate Contamination''']

:{|
|[[File:ASML CD Cals - Example Table.jpg|alt=ASML CD Calibration data - Screenshot of Table|none|thumb|300x300px|''Example of Data Table with SEM's of 320nm features. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 Click for full data table.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0]]
|[[File:ASML CD Cals - Example Plot.jpg|alt=ASML CD Calibration Data - Screenshot of SPC Plot|none|thumb|''Example SPC Chart - Measured Critical Dimension "CD" versus Date. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 Click for charts.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281]]
|}

== Maskless Aligner (Heidelberg MLA150) - Process Control ==

* ''The Process Group measures the smallest "clean" line-space pitch (by SEM) at different locations on the wafer, and calls this the "best resolution" for that region of the wafer.'' ''Measured with 0.25µm steps.''
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?usp=drive_link '''Data sheet'''], listing measured values, includes links to travelers & SEM's etc.
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?gid=167054213#gid=167054213 '''Plots''' of "best" resolution across wafer] - chart of resolution vs. time

[[File:MLA LithoCal Chart screenshot.png|alt=MLA LithoCal Chart screenshot|none|thumb|Example SPC Charts for MLA LithoCal "best" resolution. ]]
:

Process Group - Process Control Data

2026-08-11T17:43:05Z

John d: /* Maskless Aligner (Heidelberg MLA150) - Process Control */ updated best res definition

Process Control Data are standardized processes, run by the NanoFab, allowing for day-to-day or year-by-year comparisons of a tool's performance at the process level. This is similar [https://en.wikipedia.org/wiki/Statistical_process_control Statistical Process Control (SPC)].

These are the same links are found on individual tool pages, in the '''''<<tool page>> > Process Control''''' section.

__TOC__

Data are collected by our [https://nanofab.ucsb.edu/workforce#internships Process Group Interns] and reviewed by [[Staff List#Process Group|Process Group Staff]].
=Deposition, Dielectric (Process Control Data)=
[[File:PECVD SPC Chart Example.png|alt=SPC chart example|thumb|228x228px|Example Process Control Charts (SPC) for thin-film DepCals.|link=]]
[[File:Surfscan 230113A7G2 after low particles.jpg|alt=screenshot of surfscan particle count|thumb|205x205px|Example particle counts taken on each tool+film.|link=]]
[[File:PECVD1 SiO2 F50 WaferMap example.jpg|alt=Screenshot of Filmetrics F50 wafermap of typical DepCals film|thumb|215x215px|Example of DepCals Thickness/Refractive Index uniformity measurement (4% shown here).|link=]]
''Process Control data for various deposition tools in the lab.''

==[[PECVD Recipes#PECVD 1 .28PlasmaTherm 790.29|PECVD #1 (PlasmaTherm 790)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=1270764394 PECVD#1: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=0 PECVD#1: SiO2]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=98787450 PECVD#1: Si3N4]

==[[PECVD Recipes#PECVD 2 .28Advanced Vacuum.29|PECVD #2 (Advanced Vacuum)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=272916741 PECVD#2: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=1313651154 PECVD#2: SiO2]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=773875841 PECVD#2: Si3N4]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=584923738 PECVD#2: Low-Stress Si3N4]
**[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=203400760 Plots of Low-Stress Si3N4 Data]

==[[PECVD Recipes#ICP-PECVD .28Unaxis VLR.29|ICP-PECVD (Unaxis VLR Dep)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948 ICP-PECVD: Plots of SiO2 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=345725577 ICP-PECVD: Plots of Si3N4 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=0 ICP-PECVD: SiO2 Low-Dep Rate (LDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1459210138 ICP-PECVD: SiO2 High-Dep Rate (HDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1670372499 ICP-PECVD: Si3N4]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1517031044 ICP-PECVD: Si3N4 Low-Stress]

==[[Sputtering Recipes#Ion Beam Deposition .28Veeco NEXUS.29|Ion Beam Sputter Deposition (Veeco Nexus)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=2030038046 IBD: Plots of all data]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=0 IBD: SiO2]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=971672318 IBD: Si3N4]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=855566098 IBD: Ta2O5]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=713133870 IBD: Al2O3]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=834404663 IBD: TiO2]

===Old Data (Pre 2022)===
Old data in a different format can be found below:

*[[Old Deposition Data - 2021-12-15]]

<hr style="height:5px">
<hr style="height:5px">
=Deposition, Metal - Process Control Data=
''Process Control data for various deposition tools in the lab.''

== [[Sputter 5 (AJA ATC 2200-V)]] - Process Control ==
[[File:Process Control - Sputter 5 Titanium Sheet Resistance plot.png|alt=Screenshot of Sputter 5 Titanium Sheet Resistance process control chart|thumb|Sputter 5 Titanium - Sheet Resistance - Process Control Chart - '''Example''' data only.

← click a link for live data.|link=]]

=== Sputter 5: Ti ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=695635057#gid=695635057 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Titanium Plots]

=== Sputter 5: Al ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=0#gid=0 Aluminum Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Aluminum Plots]

=== Sputter 5: Cr ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=572205583#gid=572205583 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Chromium Plots]

== [[E-Beam 4 (CHA)]] - Process Control ==
[[File:Process Control - E-Beam 4 Titanium Stress plot.png|alt=Screenshot of E-Beam 4 Titanium Stress - process control chart|thumb|E-Beam 4 Titanium Stress - Process Control Chart. '''Example''' data only -

← click a link for live data.|link=]]

=== E-Beam 4: Ti ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=384597990#gid=384597990 Titanium Plots]

=== E-Beam 4: Au ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=834604706#gid=834604706 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=721807140#gid=721807140 Gold Plots]

=== E-Beam 4: Cr ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1629968393#gid=1629968393 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=701729811#gid=701729811 Chromium Plots]

=== E-Beam 4: Ni ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=649905488#gid=649905488 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1525197973#gid=1525197973 Nickel Plots]

== [[E-Beam 1 (Sharon)]] - Process Control ==

=== E-Beam 1: Ti ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1305007052#gid=1305007052 Titanium Plots]

=== E-Beam 1: Au ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1762267354#gid=1762267354 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1245613525#gid=1245613525 Gold Plots]

=== E-Beam 1: Cr ===
*[https://wiki.nanofab.ucsb.edu/wiki/Process_Group_-_Process_Control_Data?veaction=edit&section=7 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=424169133#gid=424169133 Chromium Plots]

=== E-Beam 1: Ni ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=679240351#gid=679240351 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1463522927#gid=1463522927 Nickel Plots]

<hr style="height:5px">
<hr style="height:5px">
=Etching (Process Control Data)=
''Process Control data for various dry etching tools in the lab.''

==[[ICP Etching Recipes#Process Control Data .28Fluorine ICP Etcher.29|PlasmaTherm SLR Fluorine Etcher]] - Process Control==

=== SiO2 Etching (FL-ICP Process Control) ===
''We have found that SiO2 etching is fairly insensitive to chamber condition.''
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit?usp=sharing SiO2 Etching with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 SiO2 Etching with CHF3/CF4 - '''Plots'''][[File:FL-ICP Process Control Data Example.jpg|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281]]

====Old SiO2 Process Control Data====

*[[Test Data of Etching SiO2 with CHF3/CF4-Fluorine ICP Etcher|SiO2 Etching with CHF3/CF4 (FL-ICP]]) - ''No data prior to 2023-01-20''

=== Si Etching (FL-ICP Process Control) ===
''This Si etch is much more sensitive to chamber condition, allowing us to detect chamber contamination faster.''

*'''Recipe: [[ICP Etching Recipes#Si Etch Recipes (Fluorine ICP Etcher)|SiVertHFv2]]''' - C4F8/SF6/CF4 etch of 100mm Silicon Wafer with ~50% open area and resist mask

*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=0#gid=0 Si Etching with C4F8/SF6/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/CF4 - '''Plots'''][[File:FICP-Si.png|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281]]
==[[ICP Etching Recipes#Process Control Data .28Panasonic 1.29|Panasonic ICP #1]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP1 Process Control Data Example.jpg|alt=example chart of ICP1 SiO2 Process Control Chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4-ICP1|SiO2 Etch with CHF3/CF4 (Panasonic 1)]] - ''No data prior to 2023-01-20''

== [[ICP Etching Recipes#Process Control Data .28Panasonic 2.29|Panasonic ICP#2]] - Process Control ==

=== GaAs Etch with N2/Cl2 - Process Control Data (Panasonic 2) ===

* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=0#gid=0 GaAs Etch with N2/Cl2 - '''Etch Data''']
* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 GaAs Etch with N2/Cl2 - '''Plots'''][[File:GaAs_Etch_ICP2_SPC.png|link=https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281|alt=example ICP2 process control chart|none|thumb|249x249px|[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]]]

=== SiO2 Etch with CHF3/CF4 - Process Control Data (Panasonic 2) ===

*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP2 Process Control Data Example.jpg|alt=example ICP2 process control chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4|SiO2 Etching with CHF3/CF4 - ICP2]] - ''No data prior to 2023-01-20''

==[[ICP Etching Recipes#Process Control Data .28Unaxis VLR.29|Unaxis VLR Etch]] - Process Control==

*[[Unaxis VLR Etch - Process Control Data|InP Etching with Cl2/H/Ar @ 200°C - Unaxis Etch]]

==[[ICP Etching Recipes#Process Control Data .28Oxford ICP Etcher.29|Oxford PlasmaPro Cobra Etcher]] - Process Control==

=== Std InP Ridge Etch Cl2/H2/Ar/200°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/H2/Ar @ 200°C, 1cm piece with ~50% SiO2 hardmask.''

* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Etch Data Tables''']
* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Plots''']
[[File:200C InP.png|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281]]

=== Std InP Ridge Etch: Cl2/CH4/H2/60°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/CH4/H2 @ 60°C, 1cm piece with ~50% SiO2 hardmask. No longer calibrating this recipe.''

*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=1552080791#gid=1552080791 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Plots'''][[File:Oxford-ICP-Etch Process Control Data Example.jpg|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281]]

====Old InP Ridge Etch Data====

*[[Oxford ICP Etcher - Process Control Data|InP Ridge Etch with Cl2/CH4/H2 @ 60°C]] - ''No data prior to 2023-01-20''

=== GaN Etch (Cl2/BCl3/Ar/200°C) ===
Recipe: ''Std GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm ''~1.2µm deep GaN etch with Cl2/BCl3/Ar at 200°C.'' Sapphire substrate with SiO2 mask for GaN.

* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 GaN Etching with Cl2/BCl3/Ar at 200°C - Plots][[File:GaN SPC.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279]]
<hr style="height:5px">
<hr style="height:5px">

== [[DSEIII (PlasmaTherm/Deep Silicon Etcher)|PlasmaTherm DSEIII Deep Silicon Etcher]] - Process Control ==

=== Si Bosch Etching C4F8/SF6/Ar ===
*Recipe: ''STD_Bosch_Si (⭐️Production),'' on 100mm Si Wafer with ~50% open area, photoresist mask, ~40µm deep

*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=0#gid=0 Si Etching with C4F8/SF6/Ar - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/Ar - '''Plots'''][[File:DSE plot.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281]]
<hr style="height:5px">
<hr style="height:5px">

=Lithography (Process Control Data)=
''Process Control Data for Nanofab Lithography/patterning tools.''

==[[Stepper_Recipes#Stepper_3_.28ASML_DUV.29|Stepper #3 (ASML DUV)]] - Process Control==

*''The Process Group regularly measures data on lithography Critical Dimension ("CD") and Wafer-stage Particulate Contamination for this tool, using a sensitive lithography process that will reveal small changes in Dose repeatability and wafer flatness.''
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 '''Plots of CD Repeatability''']
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 '''Data for CD Uniformity and Particulate Contamination''']

:{|
|[[File:ASML CD Cals - Example Table.jpg|alt=ASML CD Calibration data - Screenshot of Table|none|thumb|300x300px|''Example of Data Table with SEM's of 320nm features. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 Click for full data table.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0]]
|[[File:ASML CD Cals - Example Plot.jpg|alt=ASML CD Calibration Data - Screenshot of SPC Plot|none|thumb|''Example SPC Chart - Measured Critical Dimension "CD" versus Date. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 Click for charts.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281]]
|}

== Maskless Aligner (Heidelberg MLA150) - Process Control ==

* ''The Process Group measures the smallest "clean" line-space pitch at different locations on the wafer, and calls this the "best resolution" for that region of the wafer.'' ''Measured with 0.25µm steps.''
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?usp=drive_link '''Data sheet'''], listing measured values, includes links to travelers & SEM's etc.
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?gid=167054213#gid=167054213 '''Plots''' of "best" resolution across wafer] - chart of resolution vs. time

[[File:MLA LithoCal Chart screenshot.png|alt=MLA LithoCal Chart screenshot|none|thumb|Example SPC Charts for MLA LithoCal "best" resolution. ]]
:

Process Group - Process Control Data

2026-08-11T16:51:18Z

John d:

Process Control Data are standardized processes, run by the NanoFab, allowing for day-to-day or year-by-year comparisons of a tool's performance at the process level. This is similar [https://en.wikipedia.org/wiki/Statistical_process_control Statistical Process Control (SPC)].

These are the same links are found on individual tool pages, in the '''''<<tool page>> > Process Control''''' section.

__TOC__

Data are collected by our [https://nanofab.ucsb.edu/workforce#internships Process Group Interns] and reviewed by [[Staff List#Process Group|Process Group Staff]].
=Deposition, Dielectric (Process Control Data)=
[[File:PECVD SPC Chart Example.png|alt=SPC chart example|thumb|228x228px|Example Process Control Charts (SPC) for thin-film DepCals.|link=]]
[[File:Surfscan 230113A7G2 after low particles.jpg|alt=screenshot of surfscan particle count|thumb|205x205px|Example particle counts taken on each tool+film.|link=]]
[[File:PECVD1 SiO2 F50 WaferMap example.jpg|alt=Screenshot of Filmetrics F50 wafermap of typical DepCals film|thumb|215x215px|Example of DepCals Thickness/Refractive Index uniformity measurement (4% shown here).|link=]]
''Process Control data for various deposition tools in the lab.''

==[[PECVD Recipes#PECVD 1 .28PlasmaTherm 790.29|PECVD #1 (PlasmaTherm 790)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=1270764394 PECVD#1: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=0 PECVD#1: SiO2]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=98787450 PECVD#1: Si3N4]

==[[PECVD Recipes#PECVD 2 .28Advanced Vacuum.29|PECVD #2 (Advanced Vacuum)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=272916741 PECVD#2: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=1313651154 PECVD#2: SiO2]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=773875841 PECVD#2: Si3N4]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=584923738 PECVD#2: Low-Stress Si3N4]
**[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=203400760 Plots of Low-Stress Si3N4 Data]

==[[PECVD Recipes#ICP-PECVD .28Unaxis VLR.29|ICP-PECVD (Unaxis VLR Dep)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948 ICP-PECVD: Plots of SiO2 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=345725577 ICP-PECVD: Plots of Si3N4 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=0 ICP-PECVD: SiO2 Low-Dep Rate (LDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1459210138 ICP-PECVD: SiO2 High-Dep Rate (HDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1670372499 ICP-PECVD: Si3N4]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1517031044 ICP-PECVD: Si3N4 Low-Stress]

==[[Sputtering Recipes#Ion Beam Deposition .28Veeco NEXUS.29|Ion Beam Sputter Deposition (Veeco Nexus)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=2030038046 IBD: Plots of all data]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=0 IBD: SiO2]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=971672318 IBD: Si3N4]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=855566098 IBD: Ta2O5]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=713133870 IBD: Al2O3]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=834404663 IBD: TiO2]

===Old Data (Pre 2022)===
Old data in a different format can be found below:

*[[Old Deposition Data - 2021-12-15]]

<hr style="height:5px">
<hr style="height:5px">
=Deposition, Metal - Process Control Data=
''Process Control data for various deposition tools in the lab.''

== [[Sputter 5 (AJA ATC 2200-V)]] - Process Control ==
[[File:Process Control - Sputter 5 Titanium Sheet Resistance plot.png|alt=Screenshot of Sputter 5 Titanium Sheet Resistance process control chart|thumb|Sputter 5 Titanium - Sheet Resistance - Process Control Chart - '''Example''' data only.

← click a link for live data.|link=]]

=== Sputter 5: Ti ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=695635057#gid=695635057 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Titanium Plots]

=== Sputter 5: Al ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=0#gid=0 Aluminum Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Aluminum Plots]

=== Sputter 5: Cr ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=572205583#gid=572205583 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Chromium Plots]

== [[E-Beam 4 (CHA)]] - Process Control ==
[[File:Process Control - E-Beam 4 Titanium Stress plot.png|alt=Screenshot of E-Beam 4 Titanium Stress - process control chart|thumb|E-Beam 4 Titanium Stress - Process Control Chart. '''Example''' data only -

← click a link for live data.|link=]]

=== E-Beam 4: Ti ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=384597990#gid=384597990 Titanium Plots]

=== E-Beam 4: Au ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=834604706#gid=834604706 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=721807140#gid=721807140 Gold Plots]

=== E-Beam 4: Cr ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1629968393#gid=1629968393 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=701729811#gid=701729811 Chromium Plots]

=== E-Beam 4: Ni ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=649905488#gid=649905488 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1525197973#gid=1525197973 Nickel Plots]

== [[E-Beam 1 (Sharon)]] - Process Control ==

=== E-Beam 1: Ti ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1305007052#gid=1305007052 Titanium Plots]

=== E-Beam 1: Au ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1762267354#gid=1762267354 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1245613525#gid=1245613525 Gold Plots]

=== E-Beam 1: Cr ===
*[https://wiki.nanofab.ucsb.edu/wiki/Process_Group_-_Process_Control_Data?veaction=edit&section=7 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=424169133#gid=424169133 Chromium Plots]

=== E-Beam 1: Ni ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=679240351#gid=679240351 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1463522927#gid=1463522927 Nickel Plots]

<hr style="height:5px">
<hr style="height:5px">
=Etching (Process Control Data)=
''Process Control data for various dry etching tools in the lab.''

==[[ICP Etching Recipes#Process Control Data .28Fluorine ICP Etcher.29|PlasmaTherm SLR Fluorine Etcher]] - Process Control==

=== SiO2 Etching (FL-ICP Process Control) ===
''We have found that SiO2 etching is fairly insensitive to chamber condition.''
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit?usp=sharing SiO2 Etching with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 SiO2 Etching with CHF3/CF4 - '''Plots'''][[File:FL-ICP Process Control Data Example.jpg|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281]]

====Old SiO2 Process Control Data====

*[[Test Data of Etching SiO2 with CHF3/CF4-Fluorine ICP Etcher|SiO2 Etching with CHF3/CF4 (FL-ICP]]) - ''No data prior to 2023-01-20''

=== Si Etching (FL-ICP Process Control) ===
''This Si etch is much more sensitive to chamber condition, allowing us to detect chamber contamination faster.''

*'''Recipe: [[ICP Etching Recipes#Si Etch Recipes (Fluorine ICP Etcher)|SiVertHFv2]]''' - C4F8/SF6/CF4 etch of 100mm Silicon Wafer with ~50% open area and resist mask

*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=0#gid=0 Si Etching with C4F8/SF6/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/CF4 - '''Plots'''][[File:FICP-Si.png|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281]]
==[[ICP Etching Recipes#Process Control Data .28Panasonic 1.29|Panasonic ICP #1]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP1 Process Control Data Example.jpg|alt=example chart of ICP1 SiO2 Process Control Chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4-ICP1|SiO2 Etch with CHF3/CF4 (Panasonic 1)]] - ''No data prior to 2023-01-20''

== [[ICP Etching Recipes#Process Control Data .28Panasonic 2.29|Panasonic ICP#2]] - Process Control ==

=== GaAs Etch with N2/Cl2 - Process Control Data (Panasonic 2) ===

* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=0#gid=0 GaAs Etch with N2/Cl2 - '''Etch Data''']
* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 GaAs Etch with N2/Cl2 - '''Plots'''][[File:GaAs_Etch_ICP2_SPC.png|link=https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281|alt=example ICP2 process control chart|none|thumb|249x249px|[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]]]

=== SiO2 Etch with CHF3/CF4 - Process Control Data (Panasonic 2) ===

*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP2 Process Control Data Example.jpg|alt=example ICP2 process control chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4|SiO2 Etching with CHF3/CF4 - ICP2]] - ''No data prior to 2023-01-20''

==[[ICP Etching Recipes#Process Control Data .28Unaxis VLR.29|Unaxis VLR Etch]] - Process Control==

*[[Unaxis VLR Etch - Process Control Data|InP Etching with Cl2/H/Ar @ 200°C - Unaxis Etch]]

==[[ICP Etching Recipes#Process Control Data .28Oxford ICP Etcher.29|Oxford PlasmaPro Cobra Etcher]] - Process Control==

=== Std InP Ridge Etch Cl2/H2/Ar/200°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/H2/Ar @ 200°C, 1cm piece with ~50% SiO2 hardmask.''

* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Etch Data Tables''']
* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Plots''']
[[File:200C InP.png|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281]]

=== Std InP Ridge Etch: Cl2/CH4/H2/60°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/CH4/H2 @ 60°C, 1cm piece with ~50% SiO2 hardmask. No longer calibrating this recipe.''

*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=1552080791#gid=1552080791 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Plots'''][[File:Oxford-ICP-Etch Process Control Data Example.jpg|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281]]

====Old InP Ridge Etch Data====

*[[Oxford ICP Etcher - Process Control Data|InP Ridge Etch with Cl2/CH4/H2 @ 60°C]] - ''No data prior to 2023-01-20''

=== GaN Etch (Cl2/BCl3/Ar/200°C) ===
Recipe: ''Std GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm ''~1.2µm deep GaN etch with Cl2/BCl3/Ar at 200°C.'' Sapphire substrate with SiO2 mask for GaN.

* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 GaN Etching with Cl2/BCl3/Ar at 200°C - Plots][[File:GaN SPC.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279]]
<hr style="height:5px">
<hr style="height:5px">

== [[DSEIII (PlasmaTherm/Deep Silicon Etcher)|PlasmaTherm DSEIII Deep Silicon Etcher]] - Process Control ==

=== Si Bosch Etching C4F8/SF6/Ar ===
*Recipe: ''STD_Bosch_Si (⭐️Production),'' on 100mm Si Wafer with ~50% open area, photoresist mask, ~40µm deep

*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=0#gid=0 Si Etching with C4F8/SF6/Ar - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/Ar - '''Plots'''][[File:DSE plot.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281]]
<hr style="height:5px">
<hr style="height:5px">

=Lithography (Process Control Data)=
''Process Control Data for Nanofab Lithography/patterning tools.''

==[[Stepper_Recipes#Stepper_3_.28ASML_DUV.29|Stepper #3 (ASML DUV)]] - Process Control==

*''The Process Group regularly measures data on lithography Critical Dimension ("CD") and Wafer-stage Particulate Contamination for this tool, using a sensitive lithography process that will reveal small changes in Dose repeatability and wafer flatness.''
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 '''Plots of CD Repeatability''']
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 '''Data for CD Uniformity and Particulate Contamination''']

:{|
|[[File:ASML CD Cals - Example Table.jpg|alt=ASML CD Calibration data - Screenshot of Table|none|thumb|300x300px|''Example of Data Table with SEM's of 320nm features. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 Click for full data table.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0]]
|[[File:ASML CD Cals - Example Plot.jpg|alt=ASML CD Calibration Data - Screenshot of SPC Plot|none|thumb|''Example SPC Chart - Measured Critical Dimension "CD" versus Date. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 Click for charts.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281]]
|}

== Maskless Aligner (Heidelberg MLA150) - Process Control ==

* ''The Process Group measures the smallest "clean" line-space pitch at different locations on the wafer.'' ''Measured with 0.25µm steps.''
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?usp=drive_link '''Data sheet'''], listing measured values, includes links to travelers & SEM's etc.
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?gid=167054213#gid=167054213 '''Plots''' of "best" resolution across wafer] - chart of resolution vs. time

[[File:MLA LithoCal Chart screenshot.png|alt=MLA LithoCal Chart screenshot|none|thumb|Example SPC Charts for MLA LithoCal "best" resolution. ]]
:

Process Group - Process Control Data

2026-08-11T16:49:40Z

John d: added MLA lithocals to wiki

Process Control Data are standardized processes, run by the NanoFab, allowing for day-to-day or year-by-year comparisons of a tool's performance at the process level. This is similar [https://en.wikipedia.org/wiki/Statistical_process_control Statistical Process Control (SPC)].

These are the same links are found on individual tool pages, in the '''''<<tool page>> > Process Control''''' section.

__TOC__

Data are collected by our [https://nanofab.ucsb.edu/workforce#internships Process Group Interns] and reviewed by [[Staff List#Process Group|Process Group Staff]].
=Deposition, Dielectric (Process Control Data)=
[[File:PECVD SPC Chart Example.png|alt=SPC chart example|thumb|228x228px|Example Process Control Charts (SPC) for thin-film DepCals.|link=]]
[[File:Surfscan 230113A7G2 after low particles.jpg|alt=screenshot of surfscan particle count|thumb|205x205px|Example particle counts taken on each tool+film.|link=]]
[[File:PECVD1 SiO2 F50 WaferMap example.jpg|alt=Screenshot of Filmetrics F50 wafermap of typical DepCals film|thumb|215x215px|Example of DepCals Thickness/Refractive Index uniformity measurement (4% shown here).|link=]]
''Process Control data for various deposition tools in the lab.''

==[[PECVD Recipes#PECVD 1 .28PlasmaTherm 790.29|PECVD #1 (PlasmaTherm 790)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=1270764394 PECVD#1: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=0 PECVD#1: SiO2]
*[https://docs.google.com/spreadsheets/d/1fTDNXxpf4tgNYLIEs_jvehG1KvtXqqTRDBI7sHNAVvo/edit#gid=98787450 PECVD#1: Si3N4]

==[[PECVD Recipes#PECVD 2 .28Advanced Vacuum.29|PECVD #2 (Advanced Vacuum)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=272916741 PECVD#2: Plots of all data]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=1313651154 PECVD#2: SiO2]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=773875841 PECVD#2: Si3N4]
*[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=584923738 PECVD#2: Low-Stress Si3N4]
**[https://docs.google.com/spreadsheets/d/1iSW1eAAg824y9PYYLG9aiaw53PEJ-f9ofylpVlCDq9Y/edit#gid=203400760 Plots of Low-Stress Si3N4 Data]

==[[PECVD Recipes#ICP-PECVD .28Unaxis VLR.29|ICP-PECVD (Unaxis VLR Dep)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=417334948 ICP-PECVD: Plots of SiO2 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=345725577 ICP-PECVD: Plots of Si3N4 Films]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=0 ICP-PECVD: SiO2 Low-Dep Rate (LDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1459210138 ICP-PECVD: SiO2 High-Dep Rate (HDR)]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1670372499 ICP-PECVD: Si3N4]
*[https://docs.google.com/spreadsheets/d/1CuDMKFTTzGLL6CP-FEI_9cOnUaIw-432ppDFssB59wY/edit#gid=1517031044 ICP-PECVD: Si3N4 Low-Stress]

==[[Sputtering Recipes#Ion Beam Deposition .28Veeco NEXUS.29|Ion Beam Sputter Deposition (Veeco Nexus)]] - Process Control==

*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=2030038046 IBD: Plots of all data]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=0 IBD: SiO2]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=971672318 IBD: Si3N4]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=855566098 IBD: Ta2O5]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=713133870 IBD: Al2O3]
*[https://docs.google.com/spreadsheets/d/11A0ac8NU51bmcQ_grQcq9wuPwWnfy1_9MNk2DEo5yyo/edit#gid=834404663 IBD: TiO2]

===Old Data (Pre 2022)===
Old data in a different format can be found below:

*[[Old Deposition Data - 2021-12-15]]

<hr style="height:5px">
<hr style="height:5px">
=Deposition, Metal - Process Control Data=
''Process Control data for various deposition tools in the lab.''

== [[Sputter 5 (AJA ATC 2200-V)]] - Process Control ==
[[File:Process Control - Sputter 5 Titanium Sheet Resistance plot.png|alt=Screenshot of Sputter 5 Titanium Sheet Resistance process control chart|thumb|Sputter 5 Titanium - Sheet Resistance - Process Control Chart - '''Example''' data only.

← click a link for live data.|link=]]

=== Sputter 5: Ti ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=695635057#gid=695635057 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Titanium Plots]

=== Sputter 5: Al ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=0#gid=0 Aluminum Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Aluminum Plots]

=== Sputter 5: Cr ===
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=572205583#gid=572205583 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1HiEBTkZdtZmgdtSs619Tnkn-nbCi8BPW9oZYVybjgt4/edit?gid=1766775909#gid=1766775909 Chromium Plots]

== [[E-Beam 4 (CHA)]] - Process Control ==
[[File:Process Control - E-Beam 4 Titanium Stress plot.png|alt=Screenshot of E-Beam 4 Titanium Stress - process control chart|thumb|E-Beam 4 Titanium Stress - Process Control Chart. '''Example''' data only -

← click a link for live data.|link=]]

=== E-Beam 4: Ti ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=384597990#gid=384597990 Titanium Plots]

=== E-Beam 4: Au ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=834604706#gid=834604706 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=721807140#gid=721807140 Gold Plots]

=== E-Beam 4: Cr ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1629968393#gid=1629968393 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=701729811#gid=701729811 Chromium Plots]

=== E-Beam 4: Ni ===
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=649905488#gid=649905488 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1W7OFMAlRIcbpjm7FsbCh9ZLCCbhEp0bhtAC7UqEmJ5U/edit?gid=1525197973#gid=1525197973 Nickel Plots]

== [[E-Beam 1 (Sharon)]] - Process Control ==

=== E-Beam 1: Ti ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=0#gid=0 Titanium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1305007052#gid=1305007052 Titanium Plots]

=== E-Beam 1: Au ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1762267354#gid=1762267354 Gold Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1245613525#gid=1245613525 Gold Plots]

=== E-Beam 1: Cr ===
*[https://wiki.nanofab.ucsb.edu/wiki/Process_Group_-_Process_Control_Data?veaction=edit&section=7 Chromium Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=424169133#gid=424169133 Chromium Plots]

=== E-Beam 1: Ni ===
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=679240351#gid=679240351 Nickel Datasheet]
*[https://docs.google.com/spreadsheets/d/1biiHilf-DZhizDz2tMp6z7nQBeOYA6r8gnqA1WEHB5A/edit?gid=1463522927#gid=1463522927 Nickel Plots]

<hr style="height:5px">
<hr style="height:5px">
=Etching (Process Control Data)=
''Process Control data for various dry etching tools in the lab.''

==[[ICP Etching Recipes#Process Control Data .28Fluorine ICP Etcher.29|PlasmaTherm SLR Fluorine Etcher]] - Process Control==

=== SiO2 Etching (FL-ICP Process Control) ===
''We have found that SiO2 etching is fairly insensitive to chamber condition.''
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit?usp=sharing SiO2 Etching with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 SiO2 Etching with CHF3/CF4 - '''Plots'''][[File:FL-ICP Process Control Data Example.jpg|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15hYkCqL3UNNayt4sXrvVi4mBj-OSdnF7PE29mQW9AEY/edit#gid=1804752281]]

====Old SiO2 Process Control Data====

*[[Test Data of Etching SiO2 with CHF3/CF4-Fluorine ICP Etcher|SiO2 Etching with CHF3/CF4 (FL-ICP]]) - ''No data prior to 2023-01-20''

=== Si Etching (FL-ICP Process Control) ===
''This Si etch is much more sensitive to chamber condition, allowing us to detect chamber contamination faster.''

*'''Recipe: [[ICP Etching Recipes#Si Etch Recipes (Fluorine ICP Etcher)|SiVertHFv2]]''' - C4F8/SF6/CF4 etch of 100mm Silicon Wafer with ~50% open area and resist mask

*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=0#gid=0 Si Etching with C4F8/SF6/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/CF4 - '''Plots'''][[File:FICP-Si.png|alt=example of Process Control Charts|none|thumb|242x242px|[https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/15iRs-JhfgkMto5rZVtG0hJjcLMiHy039_ahv2nus0UQ/edit?gid=1804752281#gid=1804752281]]
==[[ICP Etching Recipes#Process Control Data .28Panasonic 1.29|Panasonic ICP #1]] - Process Control==

*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP1 Process Control Data Example.jpg|alt=example chart of ICP1 SiO2 Process Control Chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1gBqCYXSl7IqpNL-yI11cuURlfZpTWwXUVM9hY_gGpT8/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4-ICP1|SiO2 Etch with CHF3/CF4 (Panasonic 1)]] - ''No data prior to 2023-01-20''

== [[ICP Etching Recipes#Process Control Data .28Panasonic 2.29|Panasonic ICP#2]] - Process Control ==

=== GaAs Etch with N2/Cl2 - Process Control Data (Panasonic 2) ===

* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=0#gid=0 GaAs Etch with N2/Cl2 - '''Etch Data''']
* [https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 GaAs Etch with N2/Cl2 - '''Plots'''][[File:GaAs_Etch_ICP2_SPC.png|link=https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281|alt=example ICP2 process control chart|none|thumb|249x249px|[https://docs.google.com/spreadsheets/d/16gHOO3PQn_LinrXGPeSTSBf5dnw3leSLh1gq0PLr43w/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]]]

=== SiO2 Etch with CHF3/CF4 - Process Control Data (Panasonic 2) ===

*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit?usp=sharing SiO2 Etch with CHF3/CF4 - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 SiO2 Etch with CHF3/CF4 - '''Plots'''][[File:ICP2 Process Control Data Example.jpg|alt=example ICP2 process control chart|none|thumb|250x250px|[https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1m0l_UK2lDxlgww4f6nfXe4aQedNeDZsLs46jQ5wR4zw/edit#gid=1804752281]]

====Old Process Control Data====

*[[Test Data of etching SiO2 with CHF3/CF4|SiO2 Etching with CHF3/CF4 - ICP2]] - ''No data prior to 2023-01-20''

==[[ICP Etching Recipes#Process Control Data .28Unaxis VLR.29|Unaxis VLR Etch]] - Process Control==

*[[Unaxis VLR Etch - Process Control Data|InP Etching with Cl2/H/Ar @ 200°C - Unaxis Etch]]

==[[ICP Etching Recipes#Process Control Data .28Oxford ICP Etcher.29|Oxford PlasmaPro Cobra Etcher]] - Process Control==

=== Std InP Ridge Etch Cl2/H2/Ar/200°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/H2/Ar @ 200°C, 1cm piece with ~50% SiO2 hardmask.''

* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Etch Data Tables''']
* [https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 "Std InP Ridge Etch" Cl2/H2/Ar 200°C - '''Plots''']
[[File:200C InP.png|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1LE5Cug9uJFYEwu0ZsNsp0W1dTRzcO2EKFhC0wu3w0n4/edit?gid=1804752281#gid=1804752281]]

=== Std InP Ridge Etch: Cl2/CH4/H2/60°C ===
''Calibration / Process testing data taken using the "InP Ridge Etch" process: Cl2/CH4/H2 @ 60°C, 1cm piece with ~50% SiO2 hardmask. No longer calibrating this recipe.''

*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=0#gid=0 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Etch Data Tables''']
*[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit?gid=1552080791#gid=1552080791 "Std InP Ridge Etch" Cl2/CH4/H2/60°C - '''Plots'''][[File:Oxford-ICP-Etch Process Control Data Example.jpg|alt=example SPC chart for Oxford ICP Etcher|none|thumb|276x276px|[https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1cEUB7K5BAg9N4vp3rPZw7g0orFkxeQmRkX34Fb4eZco/edit#gid=1804752281]]

====Old InP Ridge Etch Data====

*[[Oxford ICP Etcher - Process Control Data|InP Ridge Etch with Cl2/CH4/H2 @ 60°C]] - ''No data prior to 2023-01-20''

=== GaN Etch (Cl2/BCl3/Ar/200°C) ===
Recipe: ''Std GaN Etch - BCl3/Cl2/Ar - 200C (Public)'', on 1cm x 1cm ''~1.2µm deep GaN etch with Cl2/BCl3/Ar at 200°C.'' Sapphire substrate with SiO2 mask for GaN.

* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=0#gid=0 GaN Etching with Cl2/BCl3/Ar at 200°C - Etch Data]
* [https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 GaN Etching with Cl2/BCl3/Ar at 200°C - Plots][[File:GaN SPC.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1Pk8VwZlZ2lUf3aL9J2El5ZygqHY040TX3ZAMwa33LpE/edit?gid=507237279#gid=507237279]]
<hr style="height:5px">
<hr style="height:5px">

== [[DSEIII (PlasmaTherm/Deep Silicon Etcher)|PlasmaTherm DSEIII Deep Silicon Etcher]] - Process Control ==

=== Si Bosch Etching C4F8/SF6/Ar ===
*Recipe: ''STD_Bosch_Si (⭐️Production),'' on 100mm Si Wafer with ~50% open area, photoresist mask, ~40µm deep

*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=0#gid=0 Si Etching with C4F8/SF6/Ar - '''Etch Data''']
*[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Si Etching with C4F8/SF6/Ar - '''Plots'''][[File:DSE plot.png|alt=example of Process Control Charts|none|thumb|[https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281 Click for Process Control Charts]|link=https://docs.google.com/spreadsheets/d/1xQcdUH560nT928miZMeP7xxQSwHz_a_EB9s_Kb1LSfg/edit?gid=1804752281#gid=1804752281]]
<hr style="height:5px">
<hr style="height:5px">

=Lithography (Process Control Data)=
''Process Control Data for Nanofab Lithography/patterning tools.''

==[[Stepper_Recipes#Stepper_3_.28ASML_DUV.29|Stepper #3 (ASML DUV)]] - Process Control==

*''The Process Group regularly measures data on lithography Critical Dimension ("CD") and Wafer-stage Particulate Contamination for this tool, using a sensitive lithography process that will reveal small changes in Dose repeatability and wafer flatness.''
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 '''Plots of CD Repeatability''']
*[https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 '''Data for CD Uniformity and Particulate Contamination''']

:{|
|[[File:ASML CD Cals - Example Table.jpg|alt=ASML CD Calibration data - Screenshot of Table|none|thumb|300x300px|''Example of Data Table with SEM's of 320nm features. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0 Click for full data table.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=0]]
|[[File:ASML CD Cals - Example Plot.jpg|alt=ASML CD Calibration Data - Screenshot of SPC Plot|none|thumb|''Example SPC Chart - Measured Critical Dimension "CD" versus Date. [https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281 Click for charts.]''|link=https://docs.google.com/spreadsheets/d/1xW1TFH_QjPMWl9T1jiKzwmYe4B2wg7KY-nqOKUoXttI/edit#gid=1804752281]]
|}

== MLA 150 (Heidelberg) - Proces Control ==

* ''The Process Group measures the smallest "clean" line-space pitch at different locations on the wafer.'' ''Measured with 0.25µm steps.''
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?usp=drive_link Data sheet], including links to travelers etc.
* [https://docs.google.com/spreadsheets/d/1DbvFFNYeKeS1hG0Hnd-vCQs8CfqnMj2ABdjUv3lyssg/edit?gid=167054213#gid=167054213 Plots of "best" resolution across wafer]

[[File:MLA LithoCal Chart screenshot.png|alt=MLA LithoCal Chart screenshot|none|thumb|Example SPC Charts for MLA LithoCal "best" resolution. ]]
:

File:MLA LithoCal Chart screenshot.png

2026-08-10T23:04:08Z

John d:

MLA LithoCal Chart screenshot of LithoCals from 2026-08-10 (right after getting cals running for a few months)

Frequently Asked Questions

2026-07-21T00:48:56Z

John d: /* Publications acknowledging the Nanofab */ added equip and facilities Eng.

'''Email [mailto:NanoFab@ece.ucsb.edu NanoFab@ece.ucsb.edu]''' to contact all the NanoFab staff – one of us will help you as soon as we can!

__TOC__ 

==General NanoFab Questions==

===How do I get access to the lab?===
See the [https://www.nanotech.ucsb.edu/services Services] page and click on the appropriate entity (universtiy/company etc.) to see the process and paperwork needed for your staff to access our lab in-person. The [https://www.nanotech.ucsb.edu/services#comp-k3rx7hk4 hourly rates] are also listed on this page. External universities and companies are welcome to access our lab.

====Can staff perform fabrication for us?====
Yes, for certain types of jobs. [[Services#Fabrication Services by NanoFab Staff|See this page for more info]].

===Who do I contact for an equipment problem or general NanoFab problem?===
For ''general'' NanoFab issues (that affect the whole NanoFab), please contact the [[Brian Thibeault|Lab Director (click for contact info)]] by email or phone.

It's '''much''' better to quickly let us know of a mistake or problem proactively, and let us help you fix it!

====Emergencies====
For immediate or health-related emergencies, call 9-911 from any of the phones in the lab, or 911 from your cell phone. Let them know that you are in '''"Engineering Sciences Building #225"''' at '''"Room #1102 - Gowning Room"'''.

====Specific Equipment Problem====
Always notify maintainers '''''immediately''''' of any unusual problem that may affect other tool users, and also record it in the logbook!

#If you are having trouble with a piece of equipment, please contact the supervisor of that tool '''first'''. The supervisor's contact information can be found posted on the walls above/behind the equipment, on the [[Tool List|tool page]] and on the tool's SignupMonkey page.
##If you need immediate assistance ''during business hours'', you may call/text the tool supervisor's cell phone number, otherwise use their office phone or email.
##If the tool is down, please place a note at the tool in addition to reporting the issue.
#If the engineer is not available, please go to the tool's signup page on [https://signupmonkey.ece.ucsb.edu SignupMonkey] and click the "'''Report a Tool Issue'''" button. This emails all Nanofab Staff ''and'' all users with future reservations ''and'' texts the tool supervisor. This is the preferred method for getting help if the supervisor is not immediately available.
#If the tool is not on SignupMonkey, '''email the NanoFab Staff at [mailto:NanoFab@ece.ucsb.edu NanoFab@ece.ucsb.edu]'''. This emails all staff, so anyone available can help you.

====Contact all NanoFab Staff by Email====
The entire NanoFab staff can be emailed at [mailto:NanoFab@ece.ucsb.edu NanoFab@ece.ucsb.edu]. This allows any staff member who is able to help to respond in a timely manner. Any problem for which you are unsure who to contact, send it to this email address.

====NanoFab On-Call Staff====
For after-hours and weekend emergency situations, please call '''[[Tel:(805) 451-0509|(805) 451-0509]]''' to contact the staff member that is on-call. This is for major issues/emergencies that will affect many users, such as alarms, leaks, wet bench, fume hood issues etc. Please do not call this number for problems with a single process tool that only affects a few users, instead see above.

===After Hours Access===
To enter the facility after hours, please use the '''South-facing''' entrance. There is a card/Symmetry reader on that exterior door.

We DO NOT provide after hours access to the main doors on the West entrance.
===Publications acknowledging the Nanofab===
If you publish on devices or work done using the NanoFab, please add an acknowledgement or line of text stating the following (or similar):<blockquote>''A portion of this work was performed in the UCSB Nanofabrication Facility, an open access laboratory.''</blockquote>This is important for the continued success of the Nanofabrication Facility. This applies to local UCSB researchers as well.

====Authorship on Publications====
If a UCSB staff scientist contributed significant research & development effort (including thinking through fabrication methods), or if you include their data/images in your paper, especially if novel work was developed, you should seriously consider '''adding them as an author''' (while also retaining the above Acknowledgement). Many journals require '''all''' contributing authors to be cited. For example, consider the [https://pnp.ligo.org/ppcomm/Papers.html physics articles with over 1,000 authors], citing ''all'' contributions to the work.

Analysis code authored by staff [https://academia.stackexchange.com/questions/14010/how-do-you-cite-a-github-repository can be cited] if it is on a public repository/online location.

Even for repeat processes performed by our staff, it may be appropriate to include the UCSB Staff member that performed the fabrication - a number of local research groups and companies always include the person who fabricated the devices as authors. Since this is research and development, not a guaranteed off-the-shelf product, every run requires experience to produce good results for your research.

You can specify that the staff member only performed fabrication and process development.

Process knowledge gained from conversations, advice and brainstorming sessions may also constitute significant "intellectual contribution", and warrant authorship, or be worthy of an acknowledgement.

Please consider mentioning equipment engineers and facilities staff that have worked hard to keep your work going!

Feel free to [[Brian Thibeault|contact us]] if you would like to discuss any of these points, and thank you for understanding.

===What Supplies do I need to bring to the lab?===
If you are traveling to use the lab, you should plan to bring your own:

*Optional Cleanroom Toolbelt (our new gowns have no pockets). Two options include:
** [https://www.terrauniversal.com/tool-belt-pocket-49in-waist-white-altessa-grid-uniform-technology-4954-60a.html Uniform Technology Tool Belt] - note the waist size, the 49” belt fits ~36-38” waist or smaller; they have 3 different sizes.
*** We often purchase these with [https://www.terrauniversal.com/tool-belt-pocket-59in-waist-white-altessa-grid-uniform-technology-4954-63a.html one additional pocket].
** [https://www.fishersci.com/shop/products/cleanroom-fannypack-1-ea-white/NC0723118?searchHijack=true&searchTerm=cleanroom-fannypack-1-ea-white&searchType=Rapid&matchedCatNo=NC0723118 HiTEC Fannypack]
*Glassware for chemical processing (developer/water/solvent/acid/base).
**Pyrex required for heating.
**Watch glasses/covers required if heating or leaving unattended.
**Plastic (PP/Polypropylene) or Teflon containers required for HF/KOH.
**Measuring glassware (graduated cylinders etc.)
*Wafers (including Silicon)
*Mask plates for photolithography
*Wafer storage/trays
*Tweezers and hand-tools (scribes)
*Wafer dippers (optional)
*Pens/markers for labeling your items/taking notes.
*Optional Chemical tools:
**Magnetic stirrers,
**Thermometers

The lab provides the following to our users at no additional charge:

*Storage boxes for use within the lab (not to be removed from lab without permission)
*[[Chemical List|Chemicals]] including a selection of photoresists, developers, acids, bases and solvents.
*Metal sources for evaporation and sputter. We don't have every metal, check with staff to see if we have the metal you need.
*Cleanroom-compatible notebooks and paper.
*Ziplock bags, vacuum seal bags & dessicate packets.
*Safety goggles - you are welcome to provide your own as long as they are ANSI Z.87 rated.
*All gowning supplies (hoods/gown/boot covers/masks/gloves etc.)
*Lab Consumables such as napkins, pipettes, tins, razor blades, glass slides, swabs etc.

We highly recommend to take your notes on a digital platform such as tablet/laptop that is portable for use within the lab. Small tablets with pens work very well. <135mm will fit in the cleanroom toolbelts recommended below.

===Can I take supplies from the Nanofab?===
Generally '''NO'''! The napkins, tote boxes, bottles, flashlights, tools and all other supplies are '''nanofab property!''' You are NOT allowed to take any of our supplies to your lab without asking us first. Please do ask staff if there is some supply you'd like to borrow or take, we are usually happy to help.

====Where do I get these supplies for my lab?====
For UCSB users, the [https://www.physics.ucsb.edu/resources/materialsmanagement/storeroom Physics] and [https://www.chem.ucsb.edu/facilities-services#storerooms Chemistry] store rooms sell many common supplies we use, including tweezers, beakers/dishes etc. Otherwise you can search any standard supplier for what you need (Thermo-Fischer Scientific, Mcmaster-Carr, Entegris, Techni-Tool etc. etc.). Ask NanoFab staff if you need something quickly and we can probably help you, or tell you where to purchase the appropriate supplies.

Some common supplies:

* Cleanroom Toolbelt (our new gowns have no pockets); two options include:
** [https://www.terrauniversal.com/tool-belt-pocket-49in-waist-white-altessa-grid-uniform-technology-4954-60a.html Uniform Technology Tool Belt] - note the waist size, the 49” belt fits ~36-38” waist or smaller; they have 3 different sizes.
*** We often purchase these with [https://www.terrauniversal.com/tool-belt-pocket-59in-waist-white-altessa-grid-uniform-technology-4954-63a.html one additional pocket].
** [https://www.fishersci.com/shop/products/cleanroom-fannypack-1-ea-white/NC0723118?searchHijack=true&searchTerm=cleanroom-fannypack-1-ea-white&searchType=Rapid&matchedCatNo=NC0723118 HiTEC Fannypack]
* [https://www.techni-tool.com/product/758TW8104-758TW8104 4-inch wafer tweezers with >200°C PEEK @ Techni-Tool]

===Bring a new chemical/material into the lab===
If you need to bring a new chemical/material into the lab, you '''must ask before doing so'''!

Technically, this includes '''unusual substrate materials'''. We need to make sure we know how to handle, store and dispose of the material, and confirm compatibility/safety.

Here's what you do:

#Check to see if we stock something similar in our [[Chemical List]]. If it's listed there then we have it and you just have to locate it for use. [[Luis Zuzunaga|Luis]] can help you with this.
#Contact [[Brian Thibeault]] and let him know that you will be using this chemical (even if it was previously in the lab), to make sure we are ready for it.
##Check to see if we have an MSDS already - if so, we have previously allowed this in the lab: [[Chemical List]]
##We'll let you know how to store/collect waste for your chemical.
#Make sure you have researched/understand the proper handling and use of this chemical - '''that is YOUR responsibility!'''
#*See the Lab Rules section about this: [https://wiki.nanotech.ucsb.edu/w/index.php?title=Lab_Rules#Chemicals_in_the_Nanofab Lab Rules: Chemicals in the Nanofab]

==Computer/Tech Questions==

=== UCSB NetID Setup ===

* Your UCSB NetID is used for many NanoFab web services.
* You will get and email address and login like '''<code>''YourNetID''@ucsb.edu</code>'''
* It is a Google Account, with GMail and Google Drive access! And we send important emails to this email address.
* '''IMPORTANT:''' '''Email Forwarding Setup:''' Please login to your [http://www.gmail.com gmail.com] email using your ''YourNetID@ucsb.edu'' login, and setup ''Email Forwarding'', to send all emails to your preferred email account.
** Instructions here: [https://support.google.com/mail/answer/10957?hl=en Google: Automatically forward Gmail messages to another account]
* '''Setup a Filter''': To avoid getting too many emails, you can setup a filter in your recipient account to put all ucsb.edu emails into a separate folder
** Instructions here: [https://support.google.com/mail/answer/6579?hl=en Google: Create rules to filter your emails]
** Filter with a rule like <code>To: ''YourNetID''@ucsb.edu</code> to catch all these emails.
** '''Don't ignore these emails, or you might lose cleanroom/tool access by accident!'''

===UCSB NetID Password Reset===
If you need to reset your Net ID password, please do so by going to the following website:

*You need your '''Annex ID''' to reset your password. Your Annex ID was emailed to you when you first got your UCSB NetID. Contact [[Claudia Gutierrez|Claudia]] if you need your NetID Annex ID re-sent to you.
*Got to this website: https://www.im.ucsb.edu/idm/manage
*Select the <code>'''University Affiliate'''</code> option
*Enter your '''Annex ID''' and '''Date Of Birth''' and select <code>'''Reset UCSB Net ID password'''</code>.
*Once you reset your password, you will also need to re-enter this new password in your devices to get access to ''eduroam'' Wifi internet access.

===How do I get my files from the NanoFab computers?===
USB ports are disabled on NanoFab computers to prevent the spread of viruses.

Instead, you can download your files from our '''"Nanofiles" SFTP''' server. As long as you place your files into the proper directory on the tool computer, your files will be synced to the NanoFiles STFP server every hour (or immediately, by running the "''Sync to NanoFiles''" script). You must save into a folder that is named according to your research group/company's name. Exact allowed folder names are found via the below instructions.

For further information on how to access these files, where to place your files (allowed folder names for your Group) and login credentials, do the following:

*Log into [https://signupmonkey.ece.ucsb.edu SignupMonkey]
*Click the '''Files > [https://signupmonkey.ece.ucsb.edu/cgi-bin/users/get-nanofiles.cgi Request Login Credentials]''' link.
*The email you receive will give you instructions on accessing/syncing to the NanoFiles server, including acceptable folder names you can use on the tool computers.
**Remember that ''new folders'' only start syncing to the FTP at ~midnight, and hourly after that. see below for more info.
*You can re-send this email any time by clicking the link on SignupMonkey.
*Please download an FTP ( [https://filezilla-project.org/ Filezilla], [https://winscp.net/ WinSCP], [https://cyberduck.io/ CyberDuck]) program and [[Frequently Asked Questions#I can't connect to the Nanofiles FTP server!|setup the preferences according to this FAQ]] to prevent getting blocked.

====Required Folder Names for Syncing====
Our system requires that your files are stored in a correctly-named folder/directory on the Tool computer, corresponding to your company/group name.

*Click the above "'''[https://signupmonkey.ece.ucsb.edu/cgi-bin/users/get-nanofiles.cgi Request Login Credentials]'''" link, to receive an email that lists the allowed folder names.
*You will '''''not be able to retrieve your files''''' if the folder is incorrectly named or in the wrong location!
*[mailto:NanoFab-it@ece.ucsb.edu Contact our IT staff] if you need help with this, or if need to change the allowed folder names for you.

====When will my FTP folder/files show up?====
The first time you create a folder for your group on a tool (or if you change the folder name), the server will only link to the new folder around midnight that night. So you’ll have to wait until the next morning for the tool to show up in your SFTP sessions

After your folder has been created, the files will automatically sync every hour.

We also have a shortcut on the tool desktops to sync immediately if needed. Run the "''Nanofiles Sync''" shortcut on the desktop to perform the sync right away - your files will be available on the FTP server after that completes.

====I can't connect to the Nanofiles FTP server!====
'''Symptom''': Your SFTP client is suddenly unable to connect to the nanofiles server, with an error like "''Network Error: Connection Refused''". This may also affect other people on the same network as you (who share the same external IP address.)

'''Cause:'''

There are two ways your IP address can be automatically blocked:

#You use the wrong password a few times, or
#Your FTP program tries to make too many connections, so fast that it looks like a [https://en.wikipedia.org/wiki/Denial-of-service_attack DDOS attack] and you get blocked. This may happen when you try to download many files at once.

'''Solutions''':

Email [mailto:nanofab-it@ece.ucsb.edu NanoFab-IT] and request that you be unblocked. To prevent this going forward, here are some tips:

#Many FTP clients have the option to use "''multiple connections''" or "''simultaneous downloads''", which often gets your blocked''.'' Set it to use '''maximum 3 connections''' (which means that you can Browse the folders while downloading two files). Turn off any options that look like they might open more than one connection to the server.
#Also turn off any "'''''Retry X number of times'''''" options.
##See these links for limiting the number of connections for [https://support.hostgator.com/articles/how-to-limit-the-number-of-simultaneous-connections-in-filezilla Filezilla], [https://winscp.net/eng/docs/transfer_queue WinSCP], [https://blog.cyberduck.io/2015/04/17/multiple-connections-for-file-transfers/ CyberDuck].
##'''''WinSCP''''', in particular (and maybe Filezilla), '''DEFAULTS''' to use an unlimited number of connections - so the first time you try to download many files at the same time you will likely get blocked. See the above links to prevent that.
##'''''WinSCP''''' has TWO settings you need to reduce - one under the Bookmark/Connection settings, the other in the main Program Settings/Options. Look carefully for anything that would allow multiple connections or multiple retries and reduce/disable them.
##'''CyberDuck''' has multiple Preferences settings you need to change; in the '''Preferences''':
###Transfers > General > Transfer Files: '''Open single connection'''
###Connection > ''UNcheck'' [_] '''Repeat failed networking tasks'''
#Save your password on your computer with a password manager.
##Your FTP client may also be set to try many "''reconnection attempts''" very fast. If the saved password is wrong, it will quickly reach the limit of authentication failures, and block your IP. Set your FTP client to never retry on failure, just in case it is due to a bad password.

===Wifi Access in the Nanofab===
The Wifi networks "'''''UCSB Secure'''''" (preferred) and "'''''UCSB Wireless'''''" (will ask for login every time) and "'''''eduroam'''''" (also works for other educational institutions) have full coverage in the NanoFab. All UC students/employees can use their NetID's to access these networks (although ''EduRoam'' the full UCSB email address like this ''YourNetID@ucsb.edu'' as your username).

External institutions can request a login from [[Brian Thibeault]].

====Cell Phone Calls====
Verizon Wireless has three cellular repeaters installed in the cleanroom, available via UCSB agreements with the vendor.

Cellular coverage is still not very good in some parts of the lab. However, Wifi Calling (aka. [https://en.wikipedia.org/wiki/Voice_over_IP VoIP]) works very well if your device is connected to one of the aforementioned Wifi (not cellular) networks. You can set your smartphones to make voice calls over Wifi, as long as your cellular carrier supports this. Then when you initiate the call from a region you intend to work from, your device should automatically choose Wifi calling if it has the best coverage. Calling through your computer (eg. online teleconferencing) will also utilize the Wifi network rather than cellular.

"Wifi calling" is often not enabled by default, enable it as follows:

*[https://support.apple.com/en-us/HT203032 Apple iPhone/iOS Wifi Calling setup instructions]
*[https://support.google.com/voice/answer/7649189?co=GENIE.Platform%3DAndroid&hl=en Google Android OS Wifi Calling setup instructions]

It is recommended to use the WiFi network "'''''eduroam'''''" for uninterrupted Wifi-Calling performance, although "UCSB Secure" also works.

====Forcing Calls to use Wifi (not Cellular)====
''Sometimes your mobile device continues to use Cellular even though the signal is weaker than Wifi. The following forces your device to use Wifi only, by disabling the Cellular antenna.''

*Turn on "Airplane Mode" to disable the main cellular antennas.
*While still in Airplane Mode, enable Wifi, and Bluetooth if using BT headphones.
**Connect to the UCSB Wifi Network, and BT devices if desired.
*Place your call as usual - if WiFi Calling is enabled, the call will use Wifi.
**This applies to using internet calls as well, like WhatsApp, Skype, Facetime, Zoom etc. - your phone ''may'' try to use the cellular connection for internet unless you disable it.
*It can take up to 1min after enabling Wifi, for your phone to enable Wifi-Calling. Typically a symbol like "VZW Wi-Fi" or "VoLTE" indicates that Wifi-Calling is enabled.
*When entering or leaving the cleanroom, it may be necessary to dis/reconnect your Wifi antenna in order to enable Wifi-Calling properly, due to your device switching between servers. All antennas in our cleanroom are on a mesh network, for uninterrupted calls throughout the lab.

===Can I add equipment reservations to my phone/computer/online calendar?===

*Yes, log into SignupMonkey, and on the "Future Reservations" column on the right, click on the "iCalendar" link. This links to a ".ics" file that lists all your upcoming equipment reservations. Open this file to add the reservations to your calendar. [[File:SignupMonkey - Add to Calendar - Screen Shot 2017-11-30 at 3.55.11 PM.png|alt=Image showing the iCalendar ".ics" file link on SignupMonkey|none|frame|The "iCalendar" (.ics) file link on SignupMonkey]]Unfortunately deleted reservations will Not be removed from your calendar, because of the difficulty with CalDAV programming. I recommend having a separate calendar that you save your reservations onto.

====Programmatically Accessing Reservation Data====

*To get a URL for accessing reservation data using a program, you can simply copy the URL to the *.ics iCal file mentioned above. This URL contains encrypted login info, so returns the *.ics file without requiring the GUI login form. You can get such a URL of your own future reservations as mentioned above. You can also get a custom search (for example all the future/past reservations from your research group) from the "''Search''" section of Signup Monkey. The results page of any search includes a link at the top for the corresponding iCal file - copy that URL to use in your program/scripts.

==Processing/Fabrication Questions==

===I need help using a tool, where do I get help?===
There are so many little details to remember in the cleanroom, we all sometimes forget something or need a reminder. When in doubt, ask for help!

*First, check to see if printed instructions are found at the tool itself.
*Second, check the Wiki page for that tool - many of our instruction sets and user manuals are posted on the [[Tool List|Tool page]] in the Equipment section (see the left side bar).
*Third, during business hours (eg. 7am-6pm) you can contact the tool maintainer. Contact info is posted on the glass walls above each tool.
*Fourth (maybe first) option, look for an experienced user in the lab who might be able to help. Our users are typically very collaborative, knowledgeable and helpful! A senior member of your group is always a good option.

====User Manuals====
You can find user manuals for many of our tools, and software. Often times these are either

*Printed at the tool itself
*In a PDF on the desktop of the tool's computer
*On the [https://wiki.nanotech.ucsb.edu/w/index.php?title=Frequently_Asked_Questions#How_do_I_get_my_files_from_the_NanoFab_computers.3F Nanofiles FTP] server in the "Manuals" folder. For example, complex analysis software such as the [[Ellipsometer (Woollam)|Ellipsometer]] and [[Atomic Force Microscope (Bruker ICON)|AFM]] manuals are available on Nanofiles FTP.

===Where do I find a recipe for a process (litho/etch/dep etc.)?===
The "''Recipes and Data''" section on the left sidebar lists the different categories of recipes. In those pages, you can see whether a recipe exists for your process, and on which tool. We often include some basic characterization data on the recipes, but you should note that these are approximate only. '''''If you have tight tolerances, you need to characterize the recipe yourself''''' (ie. figure out deposition/etch rate, selectivity, verticality etc.).

For some recipes (etches in particular), we often post the parameter variations/recipe characterizations to show you how different recipe variables affect the etch. If you find that a provided recipe isn't exactly what you need, you can use this information to modify a copy of the recipe to suit your own needs. Please refer to the tool owner for creating your own recipes on each tool, especially for those that have a limited number of saved recipe slots.

Many datasheets provide very usedul process info. For example, the datasheets for lithography photoresists/developers and solvents usually show spin curves (thickness vs. spin speed), exposure dose, bake times, resist profile vs. reflow temp etc.

You can find photolithography datasheets on the [https://wiki.nanotech.ucsb.edu/w/index.php?title=Lithography_Recipes#Chemical_Datasheets Chemical Datasheets] section of the Lithography Recipes page.

=== [[Processing - How Do I…?]] ===
The above page attempts to answer common fabrication questions that we have seen arise in user's fab processes.

===A recipe is indicated as "A" (Available) or "R1" Rank #1 (done once); where do I find info on this recipe?===
If a recipe is marked as "A", ''Allowed'' on one of the recipe tables, this usually means that a graduate student has done this process at some point, but the NanoFab hasn't necessarily verified the process nor has the exact recipe and characterization. Contact anyone in the [[Staff List#Process Group|Process Group]] to get in contact with the research group that developed the recipe.

===My Glassware/supplies are missing, how do I get them back?===
Staff will occasionally collect glassware and supplies that are left out on the bench, after ensuring that the users (as indicated by the glassware labels) are not in the lab. The collected supplies are stored in a locked cabinet in Chase 4.

'''Any staff''' can return your glassware - ask any staff to return your glassware. Staff will record the date/time of the collection, and your group may potentially be charged for the staff time.

Please see the full policy collection here:

[[Lab Rules#Glassware%20Confiscation%20Policy|Lab Rules > '''Glassware Confiscation Policy''']]

==Wiki Questions==
NanoFab users are highly encouraged to contribute their own work, characterizations and corrections to our Wiki! Read on to learn how to do this.

===How do I get a login to the wiki?===
If you have an active [https://signupmonkey.ece.ucsb.edu/ SignupMonkey] login, then you can create a Wiki login yourself.

*Just click the "[https://wiki.nanotech.ucsb.edu/w/index.php?title=Special:CreateAccount Create an Account]" link in the corner of the page,
*Fill in your info, making sure you '''''use the same email address you use for SignupMonkey.'''''
*Then click the link in the confirmation email you receive.
*You will then be able to log in and edit many of the wiki pages. We encourage you to make updates or add your processes!

Contact the [[Wiki Admin]] if you need help.

===How do I edit a page?===
First, you need to login by clicking the “Log In” link in the top-right corner of the page.

Then you simply click ''[Edit]'' on a page you wish to change. The ''[Edit]'' option will only be available for pages that you are authorized to change, which does not include all pages.

''[Edit]'' brings up the ''Visual Editor'', which allows you to type directly into a page without editing any code, like using a regular word processing program. The Visual Editor is the recommended method. Alternatively, ''[Edit Source]'' will show you the wiki markup code for the page, which is also an acceptable way to edit a page but much less intuitive.

Please see the [[Editing_Tutorials|Editing Tutorials]] for more information on editing a page.

Note that NanoFab users are only allowed to edit certain pages, and have some restrictions on their accounts for security purposes. However we do encourage all updates and changes, so please contact the [[Wiki Admin]] if you need help, such as making a new page, uploading images etc. The giant materials/recipe tables are only editable by Admins, so let us know if you have a new recipe/material to add!

==="''Something went wrong''" while saving my edits! How do I keep my edits?===
Sometimes the server will log you out after a long time, even while you are still editing a page!

Then when you try to save the page you might get an error like "'''''Something Went Wrong: We could not save your edits because the session is no longer valid...'''''".

If this happens, DO NOT CLOSE your edited page or you may lose your edits! Instead do the following:

#Hit "Resume editing" on the edited page, to close the "Save Page" dialogue.
#Open a NEW web browser window,
#Go to the [https://wiki.nanotech.ucsb.edu/w/index.php?title=Special:UserLogin NanoFab wiki] in that new window,
#[https://wiki.nanotech.ucsb.edu/w/index.php?title=Special:UserLogin Login to the wiki] on that window (you can click the link to go to the Login page directly)
#On your edited page, Click "'''Save Page'''" again, and after dismissing the error click "'''Try Again'''". You may need to press '''Try Again''' a few times until it figures out that you have logged in, and it will then save your edits.

===What do I do if I find an error on the wiki?===
If you locate a mistake, error or typo, log in and make the change yourself, or let staff know. Staff will see your edits and approve them.

If you don't have edit permission, let [mailto:demis@ucsb.edu Demis] know about the change you wish to make.

===Why aren't my edits showing up?===
While lab users are allowed to edit the wiki, all those edits will be approved by a staff member before going live.

Maskless Aligner (Raith PicoMaster XF)

2026-07-18T19:03:42Z

John d: added WIP notices

{{tool2|{{PAGENAME}}
|picture=XYZ.jpg
|type = Lithography
|super = Biljana Stamenic
|super2 = Lee Sawyer
|location = Bay 6
|description = Direct-Write (Maskless) I-Line Photolithography
|manufacturer = ?
|model = ?
|toolid=?
|materials = I-Line Photoresists
}}
{{ToolActions|
|toolid = ?
|InstructionsURL =
|ProcessControlURL =
|TrainingURL = ?
}}
{{WIP}}

==About==
The MLA150 allows for arbitrary direct-write patterning of I-Line photoresists from an uploaded CAD drawing/file (GDS, DXF, CIF etc.). The system uses a [https://en.wikipedia.org/wiki/Digital_micromirror_device digital micromirror device] ("DMD", an array of MEMS mirrors) for patterning the exposure light-field, to programmatically expose digitized patterns directly onto the sample - no glass photomasks/reticles are required.

Depending on the exposure options and write area, the MLA is able to expose a 100mm wafer in about 30min, and achieves minimum features sizes around 0.5µm, with overlay/alignment accuracy better than 200nm.

The system has a continuous, automatic autofocus, using optical and pneumatic detection of the substrate surface.

The software allows for custom drawings and alignment marks to be exposed onto any feature located on the microscope.

Greyscale lithography allows for photoresist profiles with repeatable slanted or tapered structures, via an 8-bit greyscale bitmap or layer-structured DXF file. See the [[MLA150 - Troubleshooting#Greyscale Lithography Limitations|Greyscale Limitations page]] for more info.

The high-aspect ratio (variable/long focal length) option enables vertical sidewalls on very thick (~100µm) photoresists.

[[File:MLA150 Spatial Light Modulator Description.png|alt=Schematic of spatial light modulator exposure technique.|none|thumb|550x600px|Exposure method using a spatial light modulator, continuously moving stage and continuous autofocus. See [https://heidelberg-instruments.com/key-features/maskless-laser-lithography/ HIMT] for more info.]]

==Detailed Specifications==
{{WIP}}
*Maximum Writeable Area: 150 x 150mm
*Substrate size: 9-inch square or 200mm round down to 5-mm pieces
**''Contact staff for pieces < 5 mm.''
*Wafer / substrate thickness: Max. 9mm / Min. 0.1mm
*Exposure optics:
**[https://en.wikipedia.org/wiki/Digital_micromirror_device Digital micromirror device (DMD)]
**Laser #1: 375nm
**Laser #2: 405nm
**Lens NA = 0.95
*Alignment Accuracy: Global ≤ 500nm; Local ("Field") ≤ 250nm
*Linewidth variation: ≤100nm (relevant to stitched exposure fields)
*Minimum Features: ~0.40µm line/space demonstrated with 0.5µm-thick PR. Requires additional effort. ≥1µm is relatively straightforward.
*Write Grid (Address Unit):
**High Quality Mode (std.): 40nm
**Fast Mode: 100nm

*Additional manufacturer options:
**High-resolution option (Write Mode 1)
**Extended Focus Range
**Variable Focal Depth
**Optical (laser) Autofocus in addition to std. Pneumatic Autofocus
**Greyscale Mode
**(No backside alignment)

==Operating Procedures==
{{WIP}}

===Standard Operating Procedures===

*[https://wiki.nanofab.ucsb.edu/w/images/7/7b/MLA150_SOP_Rev_N_%28LS%29.pdf MLA150 - Standard Operating Procedure] - updated Nov 15th 2024
**''Includes File-upload procedure, CAD Conversion, Exposure and Alignment.''
**User manuals ''are available at the tool and on the tool's computer.''
*[https://wiki.nanofab.ucsb.edu/w/images/9/95/MLA150_Quick_Start_Rev_B.pdf MLA150 Quick Start Guide **Experienced Users Only**]
*[https://wiki.nanotech.ucsb.edu/w/images/4/48/MLA150_Substrate_Template_Rules.pdf Substrate Templates] have been updated, reflecting allowed sample sizes for each focus mode.

=== Video Training ===
*[https://gauchocast.hosted.panopto.com/Panopto/Pages/Viewer.aspx?id=5813cf18-37cb-48f1-aee6-acd50055c65e '''Video Training for MLA150''']
**''Bookmarks in the video can point you to specific solutions/procedures.''
**'''UPDATES to the Video Training''': ''please review the addendums below:''
***New software has been installed, the '''[https://wiki.nanotech.ucsb.edu/w/images/e/ec/MLA150_SOP_Rev_L_%28LS%29.docx.pdf SOP]''' shows the newer menu options.
***CRITICAL: There are now TWO locations on which you must choose "Optical Autofocus". Failure to do so can result in system damage.
***[https://wiki.nanotech.ucsb.edu/w/images/4/48/MLA150_Substrate_Template_Rules.pdf Substrate Templates] have been updated, which are currently not reflected in the video.
***Numerous solved issues have been added to the [[MLA150 - Troubleshooting|'''Troubleshooting page''']].

=== Special Procedures ===

*[[Lithography Calibration - Analyzing a Focus-Exposure Matrix|Calibrating your Process with a Focus-Exposure Matrix (FEM)]] - called ''"Series"'' mode on the MLA
*[[MLA150 - Large Image GDS Generation|Large Image Patterning]] - one way to generate a GDS file out of an arbitrary image (eg. JPG, BMP, PNG etc.)

===[[MLA150 - Troubleshooting|Troubleshooting & Known Bugs]]===

*''See the above page for troubleshooting/recovery info and workarounds to known bugs.''
*Double-side polished transparent substrates can sometimes produce difficulties, due to the exposure light reflecting from the wafer underside. Many users have found ways to make them work properly - contact [[Demis D. John|staff]] if you need help with this.

===Training Procedure===
To get authorized on this tool:

#please study the training videos here: '''[https://gauchocast.hosted.panopto.com/Panopto/Pages/Viewer.aspx?id=5813cf18-37cb-48f1-aee6-acd50055c65e Heidelberg MLA150 Training Video]'''
#"shadow" experienced users in your group, if you have any, and
#when you are ready, click this button to request training:{{ToolTrainingButton|toolid=32}}

==Design Info - CAD layout==

*[[MLA150 - Design Guidelines|Design Guidelines + Tips]] - ''Important info for designing your CAD files, alignment marks etc.''
*[[MLA150 - CAD Files and Templates|CAD Files and Templates]] - ''example CAD designs and useful CAD structures.''

==Recipes==
{{WIP}}
*'''Recipes > Lithography >''' '''[[Maskless Aligner Recipes#Maskless Aligner .28Heidelberg MLA150.29|Maskless Aligner MLA150]]'''
**''Starting recipes for various I-Line photoresists''

=== Calibrate your own Litho process ===
* Use '''Series''' mode exposure for doing an FEM ("Focus-Exposure Matrix") on the MLA150.
* [[Lithography Calibration - Analyzing a Focus-Exposure Matrix]] - how to analyze an FEM for repeatable processes

Litho. recipes for all our photolith. tools can be found on the [[Lithography Recipes#Photolithography%20Recipes|Photolithography Recipes]] page.

Template:News

2026-07-18T19:02:13Z

John d: added Raith PicoMaster

<startfeed />


''News from the U.C. Santa Barbara Nanofabrication Facility.''




=== Raith PicoMaster Direct-Write Installed ===
We have installed a new H-Line (405nm) Direct-write tool: The [[Maskless_Aligner_(Raith_PicoMaster_XF)]]. The new tool is currently undergoing staff qualifications and we are developing operating procedures. // [[User:John_d|Demis D. John]] 19:02, 18 July 2026 (UTC)

===ProtoFab Opening Summer 2026===
The Nanofab is launching a [https://protofab.oasis.ucsb.edu/ Prototyping Facility called the "Protofab"], which is located at [https://oasis.ucsb.edu/ UCSB's new OASIS building]. Learn more at [https://protofab.oasis.ucsb.edu https://protofab.oasis.ucsb.edu]

The new lab will enable taking your diced chips from the Nanofab, to the Protofab where you can wirebond, attach to PCB's/carriers, align+attach optical fibers etc., to make a real "prototype". The lab is expected to open in Summer 2026, with equipment currently being installed.

Access & model is similar to the Nanofab - anyone can pay an hourly fee to go into the Protofab, using key fobs for access. (OASIS "Membership" is ''not required'' to use the Protofab, unless you also want your own desk + private lab space at OASIS.)

Contact the Protofab lab manager [mailto:arin_abed@ucsb.edu Arin Abed] for more information.
// [[User:John_d|Demis D. John]] 19:51, 27 May 2026 (UTC)

===DREAMS Hub awarded 2 projects in GaN and 5G/6G technologies===
[https://viterbischool.usc.edu/news/2024/09/usc-viterbi-led-ca-dreams-hub-is-awarded-31-9-million-in-funding-under-the-microelectronics-commons/ CA DREAMS Hub is awarded $31.9 million in funding under the Microelectronics Commons] -

* $16.2 Million to develop advanced gallium nitride (GaN) semiconductor technologies, with partners including USC, Northrop Grumman, Teledyne Technologies, HRL Laboratories, PseudolithIC, Monde Wireless Inc., Transphorm, UCLA and UC Santa Barbara.
* $15.7 Million in Funding for 5G/6G millimeter-wave Phased-Array Prototypes, with team USC, Northrop Grumman, HRL Laboratories, Teledyne, Caltech, UCLA, UC Santa Barbara, UC San Diego, Vorago, Global Foundries.

// [[User:John_d|Demis D. John]] 16:32, 23 September 2024 (PDT)

===NSF-ATE Award for SBCC and UCSB: New Semiconductor Pathway===
The UCSB NanoFab and CNSI were recently awarded a project by NSF-ATE to build a semiconductor pathway (associates degree or certificate) at Santa Barbara City College, utilizing UCSB Cleanrooms. The project "[https://www.nsf.gov/awardsearch/showAward?AWD_ID=2400982 Expansion of CCPRIME: Central Coast Partnership for Regional Industry-Focused Micro/Nanotechnology Education]" is one of 6 projects funded by an [https://new.nsf.gov/news/nsf-invests-76m-educational-projects-build-skilled Intel-NSF partnership.] The project builds on the existing "[https://nanofab.ucsb.edu/workforce#bootcamps Cleanroom Bootcamps]" already being run twice a year in the [https://www.cnsi.ucsb.edu/facilities/quantum-structures CNSI QSF cleanroom]. // [[User:John_d|Demis D. John]] 13:15, 14 August 2024 (PDT)

===CHIPS Act Award Announced to USC and UCSB NanoFab===
[https://carbajal.house.gov/news/documentsingle.aspx?DocumentID=1672 U.S. Congressman Salud Carbajal congratulates UCSB and the NanoFab] on receiving a [https://www.nist.gov/chips CHIPS & Science Act] award, as part of the [https://microelectronicscommons.org/ California DREAMS Hub (Microelectronics Commons) led by USC].
-- [[User:John d|Demis]] 12:06, 4 October 2023 (PDT)

=== RIE#3 Removed ===
We have removed [[RIE_3_(MRC)|RIE#3]] from the Nanofab, it has gone to the [https://www.ece.ucsb.edu/department-resources/electronics-shop/tcr Teaching Cleanroom]. All user's processes have been transferred to the [[Fluorine_ICP_Etcher_(PlasmaTherm/SLR_Fluorine_ICP)|Fluorine ICP Etcher]]. // [[User:John_d|Demis D. John]] 15:58, 6 August 2024 (PDT)

=== NanoFab staff awarded Goleta's Innovator of the Year 2023 ===
NanoFab staff member [[Demis D. John]] has been awarded the ''City of Goleta's "Innovator of the Year"'' for 2023! The award stems from the UCSB Nanofab's impact on the communities of Santa Barbara County and surrounding regions, in enabling cutting edge technology companies to thrive, which also enables many local careers in advanced high-tech. See the [https://sbscchamber.com/goletas-finest-2023-award-recipients-announced/ full announcement by the Santa Barbara South Coast Chamber of Commerce]. // [[User:John d|Demis D. John]] 13:58, 7 November 2023 (PST)

=== NanoFab Featured in Regional Tech Videos ===
The UCSB NanoFab is showcased as a driver of innovation and enabler of the regional high-tech industry.

See the videos here:
{| class="wikitable"
|[https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false '''''Santa Barbara County: This is TechTopia'''''] [[File:Techtopia_Vid_-_Thumbnail_PlayButton.jpg|none|300x300px|link=https://fast.wistia.net/embed/iframe/l46hsnwg4b?controlsVisibleOnLoad=true&muted=0&playerColor&copyLinkAndThumbnailEnabled=false]]

|[https://www.youtube.com/watch?v=op746os6eRI '''''UCSB NanoFab: An Innovation Center'''''] [[File:NanoFab_COE_Engineering_Vid_-_thumbnail_2_crop.jpg|none|300x300px|link=https://www.youtube.com/watch?v=op746os6eRI]]
|}

// [[User:John d|John d]] 09:26, 1 November 2023 (PST)




===''[[Template:News_-_Older_Articles|See older articles at this link]]''===
<endfeed />
<noinclude>[[Category:Templates]]</noinclude>

Tool List

2026-07-18T18:59:50Z

John d: /* Lithography */ added Raith Picomaster

__NOTOC__
{| class="wikitable" style="width:min-content;"
|
=== Tool Categories ===

* [[:Category:Lithography|Lithography]]
* [[:Category:Vacuum Deposition|Deposition]]
* [[:Category:Dry Etch|Dry Etch]]
* [[:Category:Wet Processing|Wet Process]]
* [[:Category:Thermal Processing|Thermal Process]]
* [[:Category:Packaging|Packaging/Bonding]]
* [[Tool List#Measurement .26 Characterization|Metrology/Test]]
|}

=Lithography=

{|
|- valign="top"
| width="300" |
=====Photoresists and Lithography Chemicals=====

*See the [https://wiki.nanotech.ucsb.edu/w/index.php?title=Lithography_Recipes#Chemicals_Stocked_.2B_Datasheets Chemical Datasheets page].
*[[Automated Coat/Develop System (S-Cubed Flexi)|Auto. Coat/Develop (S-Cubed Flexi)]]

=====Contact Aligners (Optical Exposure)=====

*[[Suss Aligners (SUSS MJB-3)|Contact Aligners (SUSS MJB-3)]]
*[[Contact Aligner (SUSS MA-6)]]
*[[DUV Flood Expose]]

=====Direct-Write Lithography=====

*[[E-Beam Lithography System (Raith EBPG 5150+)]]
*[[SEM 1 (JEOL IT800SHL)|E-Beam Lithography (Nabity v9)]]
*[[Focused Ion-Beam Lithography (Raith Velion)]]
*[[Maskless Aligner (Heidelberg MLA150)]]
*[[Maskless Aligner (Raith PicoMaster XF)]]

=====Other Patterning Systems=====

*[[Holographic Lith/PL Setup (Custom)|Holographic Litho/PL Setup (Custom)]]
| width="400" |
=====Steppers (Optical Exposure)=====

*[[Stepper 2 (AutoStep 200)|Stepper 2 (AutoStep 200, i-line)]]
*[[Stepper 3 (ASML DUV)|Stepper 3 (ASML DUV, Deep-UV)]]

=====Thermal Processing for Photolithography=====

*[[Ovens - Overview of All Lab Ovens|Ovens - Overview of all lab ovens]]
*[[Ovens 1, 2 & 3 (Labline)]]
*[[Oven 4 (Fisher)]]
*[[Oven 5 (Labline)]]
*[[High Temp Oven (Blue M)]]

=====Lithography Support=====

*The [https://wiki.nanotech.ucsb.edu/w/index.php?title=Wet_Benches#Spin_Coat_Benches Spinner Benches] have pre-set hotplates at various temperatures appropriate for common photoresist bakes.
*[https://signupmonkey.ece.ucsb.edu/w/index.php?title=Wet_Benches#Automated_Wet-processing_Spinners_.28POLOS.29 POLOS spinners] on Develop and Solvent benches
*[[Spin Rinse Dryer (SemiTool)|Spin/Rinse/Dryer]]
|-
|}

=Vacuum Deposition=

{|
|- valign="top"
| width="300" |
====Physical Vapor Deposition (PVD)====

=====Thermal Evaporation=====

*[[E-Beam 1 (Sharon)]]
*[[E-Beam 2 (Custom)]]
*[[E-Beam 3 (Temescal)]]
*[[E-Beam 4 (CHA)]]
*[[E-Beam 5 (Plasys)]]
*[[Thermal Evap 1]]
*[[Thermal Evap 2 (Solder)]]

=====Sputter Deposition=====

*[[Sputter 3 (AJA ATC 2000-F)]]
*[[Sputter 4 (AJA ATC 2200-V)]]
*[[Sputter 5 (AJA ATC 2200-V)]]
*[[Ion Beam Deposition (Veeco NEXUS)]]
*[[SEM Sample Coater (Hummer)]]

| width="400" |
=====Chemical Vapor Deposition (CVD)=====

*[[PECVD 1 (PlasmaTherm 790)]]
*[[PECVD 2 (Advanced Vacuum)]]
*[[ICP-PECVD (Unaxis VLR)]]
*[[Molecular Vapor Deposition]]
*[[Atomic Layer Deposision (Oxford FlexAL)|Atomic Layer Deposition (Oxford FlexAL)]]

|}

=Dry Etch=

{|
|- valign="top"
| width="300" |
=====Reactive Ion Etching (RIE)=====

*[[RIE 2 (MRC)]]
*[[RIE 5 (PlasmaTherm)]]

=====Plasma Etching and Cleaning=====

*[[Plasma Clean (YES EcoClean)]]
*[[Plasma Activation (EVG 810)]]
*[[Ashers (Technics PEII)]]

=====Etch Monitoring=====

*[[Laser Etch Monitoring]] (Endpoint Detection)
*Optical Emission Spectra
*Residual Gas Analyzer (RGA)
| width="400" |
=====ICP-RIE=====

*[[ICP Etch 2 (Panasonic E626I)]]
*[[Oxford ICP Etcher (PlasmaPro 100 Cobra)]]
*[[Fluorine ICP Etcher (PlasmaTherm/SLR Fluorine ICP)|Fluorine ICP (PlasmaTherm/SLR Fluorine Etcher)]]
*[[DSEIII (PlasmaTherm/Deep Silicon Etcher)|Plasma-Therm DSE-iii (PlasmaTherm/Deep Silicon Etcher)]]

=====Ion Milling and Reactive Ion Beam Etching=====

*[[CAIBE (Oxford Ion Mill)]]
*[[Focused Ion-Beam Lithography (Raith Velion)]]

=====Other Dry Etching=====

*[[UV Ozone Reactor]]
*[[XeF2 Etch (Xetch)|XeF2 Etch (Xetch)]]
*[[Vapor HF Etch]]

|}

=Wet Processing=
See the [[Chemical List|Chemical List page]] for stocked chemicals such as Developers, Etchants, Solvents etc.
{|
|- valign="top"
| width="300" |
*[[Wet Benches]]
**[[Solvent Cleaning Benches]]
**[[Spin Coat Benches]]
**[[Develop Benches]]
**[[Toxic Corrosive Benches]]
**[[Wet Benches#Wafer Toxic Corrosive Benches|Wafer Toxic Corrosive Bench]]
**[[HF/TMAH Processing Benches]]
**[[Plating Bench]]
| width="400" |
*[[Gold Plating Bench]] (Semcon)
*[[Spin Rinse Dryer (SemiTool)]]
*[[Chemical-Mechanical Polisher (Logitech)]]
*[[Mechanical Polisher (Allied)]]
*[[Automated Coat/Develop System (S-Cubed Flexi)|Auto. Coat/Develop (S-Cubed Flexi)]]
*[https://signupmonkey.ece.ucsb.edu/w/index.php?title=Wet_Benches#Automated_Wet-processing_Spinners_.28POLOS.29 Auto. Wet-Processing Spinners (POLOS)]
|-
|}

=Thermal Processing=
{|
|- valign="top"
| width="400" |
*[[Rapid Thermal Processor (AET RX6)|Rapid Thermal Annealer/Processor "RTA" (AET RX6)]]
*[[Rapid Thermal Processor (SSI Solaris 150)]]
*[[Tube Furnace (Tystar 8300)]]
*[[Tube Furnace Wafer Bonding (Thermco)]]
*[[Tube Furnace AlGaAs Oxidation (Lindberg)]]
*[[Wafer Bonder (SUSS SB6-8E)]]
*[[Wafer Bonder (Logitech WBS7)|Wafer Bonder/Wax Mounting (Logitech WBS2)]]
| width="400" |
*[[Ovens - Overview of All Lab Ovens|Ovens - Overview of all Lab Ovens]]
**[[Ovens 1, 2 & 3 (Labline)]]
**[[Oven 4 (Thermo-Fisher HeraTherm)]]
**[[Oven 5 (Labline)]]
**[[High Temp Oven (Blue M)]]
|-
|}

=Packaging=
''Back-end Fabrication Tools''
{|
|
====Die Singulation / Down-sizing====

*[[Dicing Saw (ADT)]]
*[[Wafer Cleaver (PELCO Flip-Scribe)|Manual Wafer Cleaver (PELCO Flipscribe)]]
*[[Automated Wafer Cleaver (Loomis LSD-155LT)]]

====Other Packaging====

*[[Vacuum Sealer]]
|
====Wafer/Die Bonding====

*[[Flip-Chip Bonder (Finetech)]]

*[[Wafer Bonder (SUSS SB6-8E)]]
*[[Wafer Bonder (Logitech WBS7)|Wafer Bonder/Wax Mounting (Logitech WBS2)]]
|}

=Measurement & Characterization=
''[https://en.wikipedia.org/wiki/Metrology Metrology], Electrical/Optical Testing and Thin-Film/Materials [https://en.wikipedia.org/wiki/Characterization_(materials_science) Characterization] tools''
{|
|- valign="top"
| width="300" |
=====Optical Microscopy=====

*[[Microscopes|Optical Microscopes]] - ''General Use''
*[[Fluorescence Microscope (Olympus MX51)]]
*[[Deep UV Optical Microscope (Olympus)]]
*[[Laser Scanning Confocal M-scope (Olympus LEXT)]]
*[[Digital Microscope (Olympus DSX1000)|Digital Microscope #7 (Olympus DSX1000)]]
*[[Suss Aligners (SUSS MJB-3)#Backside Alignment|Near-IR Inspection Scope (MJB-IR)]]

=====Electron Microscopy=====

*[[SEM 1 (JEOL IT800SHL)]]
*[[Field Emission SEM 2 (JEOL IT800SHL)|SEM 2 (JEOL IT800SHL) w/ EDAX]]
*[[SEM Sample Coater (Hummer)]]

=====Topographical Metrology=====

*[[Step Profilometer (KLA Tencor P-7)]]
*[[Step Profilometer (DektakXT)]]
*[[Atomic Force Microscope (Bruker ICON)|Atomic Force Microsope (Bruker ICON)]]
*[[Laser Scanning Confocal M-scope (Olympus LEXT)]]
| width="400" |

=====Thin-Film/Material Analysis=====

======Thickness + Optical Constants======

*[[Ellipsometer (Woollam)]]
*[[Filmetrics F40-UV Microscope-Mounted|Optical Film Thickness (Microscope-Mounted Filmetrics F-40-UV)]]
*[[Optical Film Thickness & Wafer-Mapping (Filmetrics F50)]]
*[[Optical Film Spectra + Optical Properties (Filmetrics F10-RT-UVX)|Reflection/Transmission Spectra & Optical Film Thickness (Filmetrics F10-RT-UVX)]]

======Electrical Analysis======

*[[Probe Station & Curve Tracer|Probe Station & Source/Meter Units]]
*[[Resistivity Mapper (CDE RESMAP)]]
*[[IR Thermal Microscope (QFI)|Thermal HotSpot IR Microscope (QFI)]]

======Other Properties======

*[[Film Stress (Tencor Flexus)]]
*[[Surface Analysis (KLA/Tencor Surfscan)|Particle Counts (KLA/Tencor Surfscan)]]
*[[Photoluminescence PL Setup (Custom)]]
|-
|}

== [[Decomissioned Tools]] ==
Click the link above for a list of tools that are no longer available in the lab, but the data is retained for legacy purposes.

Maskless Aligner (Raith PicoMaster XF)

2026-07-18T18:59:16Z

John d: pasted MLA150 text

{{tool2|{{PAGENAME}}
|picture=XYZ.jpg
|type = Lithography
|super = Biljana Stamenic
|super2 = Lee Sawyer
|location = Bay 6
|description = Direct-Write (Maskless) I-Line Photolithography
|manufacturer = ?
|model = ?
|toolid=?
|materials = I-Line Photoresists
}}
{{ToolActions|
|toolid = ?
|InstructionsURL =
|ProcessControlURL =
|TrainingURL = ?
}}
==About==
The MLA150 allows for arbitrary direct-write patterning of I-Line photoresists from an uploaded CAD drawing/file (GDS, DXF, CIF etc.). The system uses a [https://en.wikipedia.org/wiki/Digital_micromirror_device digital micromirror device] ("DMD", an array of MEMS mirrors) for patterning the exposure light-field, to programmatically expose digitized patterns directly onto the sample - no glass photomasks/reticles are required.

Depending on the exposure options and write area, the MLA is able to expose a 100mm wafer in about 30min, and achieves minimum features sizes around 0.5µm, with overlay/alignment accuracy better than 200nm.

The system has a continuous, automatic autofocus, using optical and pneumatic detection of the substrate surface.

The software allows for custom drawings and alignment marks to be exposed onto any feature located on the microscope.

Greyscale lithography allows for photoresist profiles with repeatable slanted or tapered structures, via an 8-bit greyscale bitmap or layer-structured DXF file. See the [[MLA150 - Troubleshooting#Greyscale Lithography Limitations|Greyscale Limitations page]] for more info.

The high-aspect ratio (variable/long focal length) option enables vertical sidewalls on very thick (~100µm) photoresists.

[[File:MLA150 Spatial Light Modulator Description.png|alt=Schematic of spatial light modulator exposure technique.|none|thumb|550x600px|Exposure method using a spatial light modulator, continuously moving stage and continuous autofocus. See [https://heidelberg-instruments.com/key-features/maskless-laser-lithography/ HIMT] for more info.]]

==Detailed Specifications==

*Maximum Writeable Area: 150 x 150mm
*Substrate size: 9-inch square or 200mm round down to 5-mm pieces
**''Contact staff for pieces < 5 mm.''
*Wafer / substrate thickness: Max. 9mm / Min. 0.1mm
*Exposure optics:
**[https://en.wikipedia.org/wiki/Digital_micromirror_device Digital micromirror device (DMD)]
**Laser #1: 375nm
**Laser #2: 405nm
**Lens NA = 0.95
*Alignment Accuracy: Global ≤ 500nm; Local ("Field") ≤ 250nm
*Linewidth variation: ≤100nm (relevant to stitched exposure fields)
*Minimum Features: ~0.40µm line/space demonstrated with 0.5µm-thick PR. Requires additional effort. ≥1µm is relatively straightforward.
*Write Grid (Address Unit):
**High Quality Mode (std.): 40nm
**Fast Mode: 100nm

*Additional manufacturer options:
**High-resolution option (Write Mode 1)
**Extended Focus Range
**Variable Focal Depth
**Optical (laser) Autofocus in addition to std. Pneumatic Autofocus
**Greyscale Mode
**(No backside alignment)

==Operating Procedures==

===Standard Operating Procedures===

*[https://wiki.nanofab.ucsb.edu/w/images/7/7b/MLA150_SOP_Rev_N_%28LS%29.pdf MLA150 - Standard Operating Procedure] - updated Nov 15th 2024
**''Includes File-upload procedure, CAD Conversion, Exposure and Alignment.''
**User manuals ''are available at the tool and on the tool's computer.''
*[https://wiki.nanofab.ucsb.edu/w/images/9/95/MLA150_Quick_Start_Rev_B.pdf MLA150 Quick Start Guide **Experienced Users Only**]
*[https://wiki.nanotech.ucsb.edu/w/images/4/48/MLA150_Substrate_Template_Rules.pdf Substrate Templates] have been updated, reflecting allowed sample sizes for each focus mode.

=== Video Training ===
*[https://gauchocast.hosted.panopto.com/Panopto/Pages/Viewer.aspx?id=5813cf18-37cb-48f1-aee6-acd50055c65e '''Video Training for MLA150''']
**''Bookmarks in the video can point you to specific solutions/procedures.''
**'''UPDATES to the Video Training''': ''please review the addendums below:''
***New software has been installed, the '''[https://wiki.nanotech.ucsb.edu/w/images/e/ec/MLA150_SOP_Rev_L_%28LS%29.docx.pdf SOP]''' shows the newer menu options.
***CRITICAL: There are now TWO locations on which you must choose "Optical Autofocus". Failure to do so can result in system damage.
***[https://wiki.nanotech.ucsb.edu/w/images/4/48/MLA150_Substrate_Template_Rules.pdf Substrate Templates] have been updated, which are currently not reflected in the video.
***Numerous solved issues have been added to the [[MLA150 - Troubleshooting|'''Troubleshooting page''']].

=== Special Procedures ===

*[[Lithography Calibration - Analyzing a Focus-Exposure Matrix|Calibrating your Process with a Focus-Exposure Matrix (FEM)]] - called ''"Series"'' mode on the MLA
*[[MLA150 - Large Image GDS Generation|Large Image Patterning]] - one way to generate a GDS file out of an arbitrary image (eg. JPG, BMP, PNG etc.)

===[[MLA150 - Troubleshooting|Troubleshooting & Known Bugs]]===

*''See the above page for troubleshooting/recovery info and workarounds to known bugs.''
*Double-side polished transparent substrates can sometimes produce difficulties, due to the exposure light reflecting from the wafer underside. Many users have found ways to make them work properly - contact [[Demis D. John|staff]] if you need help with this.

===Training Procedure===
To get authorized on this tool:

#please study the training videos here: '''[https://gauchocast.hosted.panopto.com/Panopto/Pages/Viewer.aspx?id=5813cf18-37cb-48f1-aee6-acd50055c65e Heidelberg MLA150 Training Video]'''
#"shadow" experienced users in your group, if you have any, and
#when you are ready, click this button to request training:{{ToolTrainingButton|toolid=32}}

==Design Info - CAD layout==

*[[MLA150 - Design Guidelines|Design Guidelines + Tips]] - ''Important info for designing your CAD files, alignment marks etc.''
*[[MLA150 - CAD Files and Templates|CAD Files and Templates]] - ''example CAD designs and useful CAD structures.''

==Recipes==

*'''Recipes > Lithography >''' '''[[Maskless Aligner Recipes#Maskless Aligner .28Heidelberg MLA150.29|Maskless Aligner MLA150]]'''
**''Starting recipes for various I-Line photoresists''

=== Calibrate your own Litho process ===
* Use '''Series''' mode exposure for doing an FEM ("Focus-Exposure Matrix") on the MLA150.
* [[Lithography Calibration - Analyzing a Focus-Exposure Matrix]] - how to analyze an FEM for repeatable processes

Litho. recipes for all our photolith. tools can be found on the [[Lithography Recipes#Photolithography%20Recipes|Photolithography Recipes]] page.