Process Group Internships

The NanoFab hosts UCSB Undergraduate Interns throughout the school year and summer.

Internship Goals

Our goals are twofold:

1. Increased Tool Uptime: Acquire Process Control Data so NanoFab staff can proactively identify equipment/process problems, and
2. Industry-Relevant Experience: Give Interns hands-on industry-relevant experience to minimize the training required at any microelectronics company/research group.

The skills acquired for each goal are as follows:

Industry-relevant Experience

• Protocols: Interns become comfortable in a busy semiconductor 'fab environment. After 2-3 months of regular usage the interns are fully comfortable with:
  • Cleanroom safety & protocols such as PPE, safe waste disposal etc.
  • Managing their own schedule to accomplish weekly processing tasks.
  • Multi-tasking to run simultaneous processes fast and efficiently.
    • Interns learn new tools only once their current cals have been condensed into a few hours.
  • Communications with
    • lab users (scheduling around other users)
    • equipment staff (reporting tool issues)
    • process supervisors/managers (reviewing process control data)
• Equipment: Become comfortable with learning different SOP's of similar tool types
  • Eg. 4 different plasma depositions, 4 different ICP etchers etc.
  • Once an intern has learned 3 different PECVD deposition tools, it is trivial to learn a new PECVD tool even from an unfamiliar manufacturer.
• MES: Learn to utilize production tracking/communications tools
  • Travelers/Process Followers & associated data directories are created and filled out at run-time for every calibration. (Digital/online via Google Sheets+Drive)
  • Combining Equipment Operating Procedures with Process Travelers instructions at run-time.
  • Data collection with standardized digital filenames & directory structures, available online to all lab users.
• SPC: Perform metrology, process control, create SPC charts
  • Data from the Travelers are entered into online spreadsheets, which calculate SPC charts
  • Some interns create/modify SPC charts when needed for newly developed Cals.
• OCAP/Repair: Work with tool engineers to identify & diagnose equipment problems.
  • If Process Engineers identify an Out-of-Control process, Interns are involved in the communications & testing of tool repairs.

Process Control for Increased Uptime

• Interns run process-control on the lab's most critical/high-usage tools.
• Calibration processes are identical each time (unlike lab user's processes), allowing apples-to-apples comparisons.
• Regular meetings with Process Engineers allow us to proactively identify equipment/process issues, failing tool components, and schedule repairs/remedies sooner than if detected by a lab user.
• Lab users are notified of process anomalies & repair plans, reducing bad outcomes for lab users.
• "Contamination" checks via On-Demand process-checks
  • Determine whether a new process affects other processes on the same tool, by running pre/post Cal Etches.
  • On ICP Etchers, enables data-driven equipment sharing between processes.
  • Enables lab-users to quickly determine whether problems lie with the Equipment/"contamination", another user's process or their own Process.

Job Description: 2 phases

Internships are generally run in 2 phases, with each phase being approx. 1 Quarter (3 months) long.

Phase 1: Deposition Cals (1st Quarter)

• Interns learn 4 different deposition tools, in the following order:
  • Plasmatherm PECVD 1
  • Advanced Vacuum PECVD 2,
  • Unaxis ICP-PECVD,
  • Veeco Ion Beam Deposition
  • 3-4 different films (SiO₂, Si₃N₄, Low-stress-Si₃N₄) are run on each tool.
• Every film undergoes the following metrology:
  • Ellipsometry: Thin-film thickness and refractive index at 2 different wavelengths.
  • Reflectometry Wafer Mapping: Thin-film Uniformity across the wafer.
  • Particle Count: laser-scanning via Surfscan, at two different particle-size/range settings
  • Thin-Film Stress: requires before & after wafer bow measurements via laser scanning
• By the end of 1st Quarter, Interns are running 9-12 thin-film cals every 2 weeks.

Phase 2: EtchCals and LithoCals (2nd Quarter)

• Interns learn 4 different ICP Etchers:
  • Plasmatherm SLR Fluorine Etcher
  • Oxford Cobra III-V Etcher
  • Plasmatherm DSEiii
  • Panasonic ICP #2
  • 1-2 different Etches per tool; one "insensitive" to chamber condition, one "sensitive" to chamber condition.
• Interns learn ASML DUV Stepper lithography: photoresist coating, exposure and develop.
  • Critical particulate-sensitive process, cal shows any particles present
    • Intern's techniques are remedied if particles are detected.
• Metrology on each EtchCal:
  • SEM of manually Cleaved Cross-section
  • Profilometry & Etch-Rate Calculation
  • Etch Selectivity Calculation via pre/post hardmask removal profilometry
• Metro on each LithoCal:
  • SEM for Critical Dimension measurement; multiple locations on wafer.
  • Identification of "hotspot" particulate contamination on wafer/tool.
• By the end of 2nd Quarter, Interns are running LithoCals and ~2 Etchcals weekly, with multiple SEM sessions. They are proficient at SEM by the end of the 2nd quarter.