Oxford ICP Etcher - Process Control Data

Data - InP Ridge Etch (Oxford ICP Etcher)

PECVD SiO2 hardmask, patterned on Stepper #2 (AutoStep 200) & Panasonic ICP #1

InP Ridge Etch: 60°C, 3mT, 800W/65W, Cl2=18, H2=15, CH4=10sccm, time=5min00sec (300sec) Sample Size: 1x1cm, ~30-40% SiO2 masking (NingC's pattern). Silicon carrier, no adhesive.
Date	Sample#	Etch Rate (nm/min)	Etch Selectivity (InP/SiO2)	Comments	SEM Images
5/11/22	NP_60c_010	322	9.76		[1] [2]
5/4/22	NP_60c_009	318	10.5		[1] [2]
4/27/22	NP_60c_008	320	9.2	directly after chamber clean. Identical results to before chamber clean. Chamber appeared clean when opened.	[1] [2]
4/26/22	NP_60c_007	312	9.93	day before chamber clean	[1] [2]
4/19/22	NP_60c_006	330	9.53	Chamber opened and brown gunk observed in chamber right after the etch was done. Etch rate unaffected.	[1] [2]
4/13/22	NP_60c_005	320	11.51	New mask pattern with long lines to cleave through.	[1] [2]
				↑ Changed mask pattern going forward (~50% open area), apparent etch rate changes due to measuring different features.
3/30/22	NP_60c_004	427	11.17	*etched for 3min* ~30-40% SiO2 masking (NingC's pattern)	[1][2]
1/26/22	NP_1_26_003	452	12.9	~30-40% SiO2 masking (NingC's pattern)	[1] [2]

Dependence on Sample Size

We have found that the size of the InP piece loaded (no adhesive, onto Silicon carrier wafer) affects the etch rate, but does not affect the etch profile - ie. etches are still smooth and vertical, but rate varies with sample area.

InP Ridge Etch: 60°C, 3mT, 800W/65W, Cl2=18, H2=15, CH4=10sccm, time=5min05sec (305sec) Silicon carrier, no adhesive.
Date	Sample#	Sample Size (dimensions, mm)	Sample Size (area, mm2)	Etch Rate (nm/min)	Etch Selectivity (InP/SiO2)	Comments	SEM Images
1/11/22	DJ_InPRidge	4.5 x 2.5	11.25	602	64.6nm left	~50% SiO2 masking (GCA Calibration pattern)	[1]
1/12/22	DJ_InPRidge	4.5 x 3	13.5	563	76.4nm left	~50% SiO2 masking (GCA Calibration pattern)	[2]
1/12/22	DJ_InP#3	4.5 x 3	13.5	612	71nm left	~50% SiO2 masking (GCA Calibration pattern)	[3]
1/26/22	NP_?	10 x 10	100	400-450	~250nm left	~30-40% SiO2 masking (NingC's pattern)
1/26/22	NP_?	1/4 of 50mm wafer	490	378	276nm left	~30-40% SiO2 masking (NingC's pattern)	[1]