Difference between revisions of "Oxford ICP Etcher - Process Control Data"

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m (made more recent cals on top of table for Oxford)
m (added entry in Oxford, updated selectivity numbers)
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|Comments
 
|Comments
 
|SEM Images
 
|SEM Images
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|4/13/22
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|NP_60c_005
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|320
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|11.51
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|[https://wiki.nanotech.ucsb.edu/w/images/1/12/Oxford_60c_05_45D_004.jpg <nowiki>[1]</nowiki>] [https://wiki.nanotech.ucsb.edu/w/images/5/56/Oxford_60c_05_CS_002.jpg <nowiki>[2]</nowiki>]
 
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|3/30/22
 
|3/30/22
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|NP_1_26_003
 
|NP_1_26_003
 
|452
 
|452
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|260-280nm left
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|12.9
 
|~30-40% SiO<sub>2</sub> masking (NingC's pattern)
 
|~30-40% SiO<sub>2</sub> masking (NingC's pattern)
 
|[https://wiki.nanotech.ucsb.edu/w/images/e/ef/Oxford_Cal_01_26_22_003New_45d_001.jpg <nowiki>[1]</nowiki>] [https://wiki.nanotech.ucsb.edu/w/images/4/40/Oxford_Cal_01_26_22_031New_CS_001.jpg <nowiki>[2]</nowiki>]
 
|[https://wiki.nanotech.ucsb.edu/w/images/e/ef/Oxford_Cal_01_26_22_003New_45d_001.jpg <nowiki>[1]</nowiki>] [https://wiki.nanotech.ucsb.edu/w/images/4/40/Oxford_Cal_01_26_22_031New_CS_001.jpg <nowiki>[2]</nowiki>]
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|<small>NP_1_26_001</small>
 
|<small>NP_1_26_001</small>
 
|~400nm
 
|~400nm
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|240 nm left
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|~7
 
|~30-40% SiO<sub>2</sub> masking (NingC's pattern)
 
|~30-40% SiO<sub>2</sub> masking (NingC's pattern)
 
|[https://wiki.nanotech.ucsb.edu/w/images/d/dc/Oxford_Cal_1_26_22_001_45D_005.jpg <nowiki>[1]</nowiki>] [https://wiki.nanotech.ucsb.edu/w/images/8/87/Oxford_Cal_1_26_22_001_CS_004.jpg <nowiki>[2]</nowiki>]
 
|[https://wiki.nanotech.ucsb.edu/w/images/d/dc/Oxford_Cal_1_26_22_001_45D_005.jpg <nowiki>[1]</nowiki>] [https://wiki.nanotech.ucsb.edu/w/images/8/87/Oxford_Cal_1_26_22_001_CS_004.jpg <nowiki>[2]</nowiki>]

Revision as of 12:52, 19 April 2022

Data - InP Ridge Etch (Oxford ICP Etcher)

PECVD SiO2 hardmask, patterned on Stepper #2 (AutoStep 200) & Panasonic ICP #1

InP Ridge Etch: 60°C, 3mT, 800W/65W, Cl2=18, H2=15, CH4=10sccm, time=5min00sec (300sec)

Sample Size: 1x1cm, ~30-40% SiO2 masking (NingC's pattern). Silicon carrier, no adhesive.

Date Sample# Etch Rate (nm/min) Etch Selectivity (InP/SiO2) Comments SEM Images
4/13/22 NP_60c_005 320 11.51 [1] [2]
3/30/22 NP_60c_004 427 11.17 *etched for 3min* [1][2]
1/26/22 NP_1_26_003 452 12.9 ~30-40% SiO2 masking (NingC's pattern) [1] [2]
1/26/22 NP_1_26_001 ~400nm ~7 ~30-40% SiO2 masking (NingC's pattern) [1] [2]

Dependence on Sample Size

We have found that the size of the InP piece loaded (no adhesive, onto Silicon carrier wafer) affects the etch rate, but does not affect the etch profile - ie. etches are still smooth and vertical, but rate varies with sample area.

InP Ridge Etch: 60°C, 3mT, 800W/65W, Cl2=18, H2=15, CH4=10sccm, time=5min05sec (305sec)

Silicon carrier, no adhesive.

Date Sample# Sample Size (dimensions, mm) Sample Size (area, mm2) Etch Rate (nm/min) Etch Selectivity (InP/SiO2) Comments SEM Images
1/11/22 DJ_InPRidge 4.5 x 2.5 11.25 602 64.6nm left ~50% SiO2 masking (GCA Calibration pattern) [1]
1/12/22 DJ_InPRidge 4.5 x 3 13.5 563 76.4nm left ~50% SiO2 masking (GCA Calibration pattern) [2]
1/12/22 DJ_InP#3 4.5 x 3 13.5 612 71nm left ~50% SiO2 masking (GCA Calibration pattern) [3]
1/26/22 NP_? 10 x 10 100 400-450 ~250nm left ~30-40% SiO2 masking (NingC's pattern)
1/26/22 NP_? 1/4 of 50mm wafer 490 378 276nm left ~30-40% SiO2 masking (NingC's pattern) [1]
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