ICP Etching Recipes: Difference between revisions
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*[[media:Panasonic1-SiO2-Data-Process-Variation-CHF3-revA.pdf|SiO<sub>2</sub> CHF<sub>3</sub> Etch Variations]] |
*[[media:Panasonic1-SiO2-Data-Process-Variation-CHF3-revA.pdf|SiO<sub>2</sub> CHF<sub>3</sub> Etch Variations]] |
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*CF4/CHF4/O2 "NanoEtch" (TBA) |
*CF4/CHF4/O2 "NanoEtch" (TBA) |
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*Test Data of SiO2 Etch with CHF3/CF4/O2 |
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*Test Data of SiO2 Etch with CHF3/CF4 |
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==SiN<sub>x</sub> Etching (Panasonic 1)== |
==SiN<sub>x</sub> Etching (Panasonic 1)== |
Revision as of 22:32, 8 October 2018
Back to Dry Etching Recipes.
DSEIII_(PlasmaTherm/Deep_Silicon_Etcher)
High Rate Bosch Etch (DSEIII)
Single-Step Low Etch Rate Smooth Sidewall Process (DSEIII)
PlasmaTherm/SLR Fluorine Etcher
Si Single-Step Etching
- Recipes available, to be characterized/added.
SiO2 Etching
- Recipes available, to be characterized/added.
ICP Etch 1 (Panasonic E626I)
SiO2 Etching (Panasonic 1)
- SiO2 Vertical Etch Recipe Parameters - CHF3 "SiOVert"
- Etch rate ≈ 2300Å/min (users must calibrate)
- Selectivity (SiO2:Photoresist) ≈ greater than 1:1 (users must calibrate)
- SiO2 CHF3 Etch Variations
- CF4/CHF4/O2 "NanoEtch" (TBA)
- Test Data of SiO2 Etch with CHF3/CF4/O2
- Test Data of SiO2 Etch with CHF3/CF4
SiNx Etching (Panasonic 1)
Al Etch (Panasonic 1)
Cr Etch (Panasonic 1)
Ti Etch (Panasonic 1)
W-TiW Etch (Panasonic 1)
GaAs-AlGaAs Etch (Panasonic 1)
- GaAs-Nanoscale Etch Recipe - PR mask - Cl2-BCl3-Ar
- AlGaAs Etch Recipes - Cl2N2
- GaAs DRIE via Etch Recipes - Cl2-BCl3-Ar PR passivation
GaN Etch (Panasonic 1)
Photoresist and ARC Etching
Please see the recipes for Panasonic ICP#2 - the same recipes apply.
Etching of DUV42P at standard spin/bake parameters also completes in 45 seconds.
SiC Etch (Panasonic 1)
Sapphire Etch (Panasonic 1)
Old Deleted Recipes
Since there are a limited number of recipe slots on the tool, we occasionally have to delete old, unused recipes.
If you need to free up a recipe slot, please contact Don and he'll help you find an old recipe to replace. We take photographs of old recipes, and save them in case a group needs to revive the recipe. Contact us if your old recipe went missing.
ICP Etch 2 (Panasonic E640)
Recipes starting points for materials without processes listed can be obtained from Panasonic1 recipe files. The chambers are slightly different, but essentially the same, requiring only small program changes to obtain similar results.
SiO2 Etching (Panasonic 2)
- SiO2 Vertical Etch Recipe - CHF3 "SiOVert"
- Direct copy of "SiOVert" from ICP#1, see parameters there.
- SiO2 Vertical Etch Recipe#2 - CF4/CHF3
- SiO2 Nanoscale Etch Recipe - CHF3/O2
- Angled SiO2 sidewall recipe
SiNx Etching (Panasonic 2)
Al Etch (Panasonic 2)
Al2O3 Etching (Panasonic 2)
ALD Al2O3 Etch Rates in BCl3 Chemistry (click for plots of etch rate)
Contributed by Brian Markman, 2018
- BCl3 = 30sccm
- Pressure = 0.50 Pa
- ICP Source RF = 500
- Bias RF = 50W or 250W (250W can burn PR)
- Cooling He Flow/Pressure = 15.0 sccm / 400 Pa
- Etch Rate 50W: 0.66nm/sec
- Etch Rate 250W: 1.0 nm/sec
GaAs Etch (Panasonic 2)
Photoresist and ARC etching
Basic recipes for etching photoresist and Anti-Reflection Coating (ARC) underlayers are as follows:
ARC Etching: DUV-42P or AR6
- O2 = 40 sccm // 0.5 Pa
- ICP = 75W // RF = 75W
- 45 sec for full etching of DUV-42P (same for AR6)
UV6-0.8 Etching
Works very well for photoresist stripping
- O2 = 40 sccm // 1.0 Pa
- ICP = 350W // RF = 100W
- Etch Rate = 518.5nm / 1min
- 2m30sec to fully remove with ~200% overetch
ICP-Etch (Unaxis VLR)
GaAs-AlGaAs Etch (Unaxis VLR)
InP-InGaAs-InAlAs Etch (Unaxis VLR)
- InP-based Material Etch Profile (Cl2N2Ar200C)
- InP-InGaAs Etch Profile (Cl2H2Ar 200C)
- Recipe of Etching SiO2 Mask for Cl2 Etch (ICP#2)
- InP Etch Historical Data (Cl2H2Ar 200C)
- InP Etch Test
- Lower etch-rate InP Etch (Cl2N2 200C)
GaN Etch (Unaxis VLR)
GaSb Etch (Unaxis VLR)
Si Deep RIE (PlasmaTherm/Bosch Etch)
This tool does not exist in this configuration any more, so these recipes are for Reference purposes Only!!! The machine was upgraded to be the new Plasma-Therm Fluorine ICP Etcher - the chamber configuration is now different, making these recipes invalid. For Deep Silicon Etching, the Plasma-Therm DSE-iii is often used. Some single-step Silicon etching is still performed on the SLR Fluorine ICP, due to the slower etch rate.
Bosch and Release Etch (Si Deep RIE)
- Bosch and Release Processes
- Ideal for deep (>>1µm), vertical etching of Silicon. Through-wafer etches are possible (requires carrier wafer).
- Etch rate depends on area of exposed silicon being etched.
- Al2O3 mask (ALD or Sputter) has >9000:1 selectivity
- SiO2 (PECVD) mask has ~100:1 selectivity
- Thermal SiO2 has ~300:1 selectivity.